diff --git a/src/avrdude.conf.in b/src/avrdude.conf.in index 3eec6197..e87fcea8 100644 --- a/src/avrdude.conf.in +++ b/src/avrdude.conf.in @@ -1236,7 +1236,7 @@ programmer # ft232h_jtag # Pin J2-10 (AD3) is RESET # Pin J2-6 is GND # Use the -b flag to set the SPI clock rate eg -b 3750000 is the fastest I could get -# a 16MHz Atmega1280 to program reliably. The 232H is conveniently 5V tolerant. +# a 16 MHz Atmega1280 to program reliably. The 232H is conveniently 5 V tolerant. programmer parent "ft232h" # um232h id = "um232h"; @@ -1254,7 +1254,7 @@ programmer parent "ft232h" # um232h # Brown (Pin 5) is RESET # Black (Pin 10) is GND # Use the -b flag to set the SPI clock rate eg -b 3750000 is the fastest I could get -# a 16MHz Atmega1280 to program reliably. The 232H is conveniently 5V tolerant. +# a 16 MHz Atmega1280 to program reliably. The 232H is conveniently 5 V tolerant. programmer parent "um232h" # c232hm id = "c232hm"; diff --git a/src/avrftdi.c b/src/avrftdi.c index 2cf90cf9..7b85e340 100644 --- a/src/avrftdi.c +++ b/src/avrftdi.c @@ -798,7 +798,7 @@ static int avrftdi_initialize(const PROGRAMMER *pgm, const AVRPART *p) { // Use speed optimization with CAUTION usleep(20*1000); - // Giving rst-pulse of at least 2 avr-clock-cycles, for security (2us @ 1MHz) + // Giving rst-pulse of at least 2 avr-clock-cycles, for security (2 us @ 1 MHz) set_pin(pgm, PIN_AVR_RESET, ON); usleep(20*1000); diff --git a/src/bitbang.c b/src/bitbang.c index 4fdbb7f9..cef636c9 100644 --- a/src/bitbang.c +++ b/src/bitbang.c @@ -156,8 +156,8 @@ static unsigned char bitbang_txrx(const PROGRAMMER *pgm, unsigned char byte) { * if and only if T>t_CLCL (t_CLCL=clock period of target system). * * Due to the delay introduced by "IN" and "OUT"-commands, T is greater - * than 1us (more like 2us) on x86-architectures. So programming works - * safely down to 1MHz target clock. + * than 1us (more like 2 us) on x86-architectures. So programming works + * safely down to 1 MHz target clock. */ b = (byte >> i) & 0x01; diff --git a/src/buspirate.c b/src/buspirate.c index c4bf5f0a..071a2af5 100644 --- a/src/buspirate.c +++ b/src/buspirate.c @@ -568,7 +568,7 @@ static int buspirate_start_mode_bin(PROGRAMMER *pgm) { unsigned short pwm_duty; unsigned short pwm_period; - pwm_period = 16000/(my.cpufreq) - 1; // Oscillator runs at 32MHz, we don't use a prescaler + pwm_period = 16000/(my.cpufreq) - 1; // Oscillator runs at 32 MHz, we don't use a prescaler pwm_duty = pwm_period/2; // 50% duty cycle msg_notice2("setting up PWM for cpufreq\n"); diff --git a/src/ft245r.c b/src/ft245r.c index 674b2c0a..41d75726 100644 --- a/src/ft245r.c +++ b/src/ft245r.c @@ -113,12 +113,12 @@ void ft245r_initpgm(PROGRAMMER *pgm) { /* * Some revisions of the FTDI chips mess up the timing in bitbang mode unless - * the bitclock is set to the max (3MHz). For example, see: + * the bitclock is set to the max (3 MHz). For example, see: * * http://www.ftdichip.com/Support/Documents/TechnicalNotes/TN_120_FT232R%20Errata%20Technical%20Note.pdf * * To work around this problem, set the macro below to 1 to always set the - * bitclock to 3MHz and then issue the same byte repeatedly to get the desired + * bitclock to 3 MHz and then issue the same byte repeatedly to get the desired * timing. * */ @@ -364,7 +364,7 @@ static int ft245r_set_bitclock(const PROGRAMMER *pgm) { } else if(pgm->baudrate) { rate = pgm->baudrate; } else { - rate = 150000; // Should work for all ftdi chips and the avr default internal clock of 1MHz + rate = 150000; // Should work for all ftdi chips and the internal clock of 1 MHz } #if FT245R_BITBANG_VARIABLE_PULSE_WIDTH_WORKAROUND diff --git a/src/pickit2.c b/src/pickit2.c index e4bc1963..8c66342c 100644 --- a/src/pickit2.c +++ b/src/pickit2.c @@ -1011,7 +1011,7 @@ static int pickit2_parseextparams(const PROGRAMMER *pgm, const LISTID extparms) int clock_period = MIN(1000000/clock_rate, 255); // Max period is 255 - clock_rate = (int) (1000000/(clock_period + 5e-7)); // Assume highest speed is 2MHz + clock_rate = (int) (1000000/(clock_period + 5e-7)); // Assume highest speed is 2 MHz pmsg_notice2("%s(): effective clock rate set to 0x%02x\n", __func__, clock_rate); my.clock_period = clock_period; diff --git a/src/xbee.c b/src/xbee.c index 75f8a330..a0591dee 100644 --- a/src/xbee.c +++ b/src/xbee.c @@ -1045,13 +1045,13 @@ static int xbeedev_open(const char *port, union pinfo pinfo, union filedescripto * In this mode, we are NOT talking to an XBee, we are talking directly to * an AVR device that thinks it is talking to an XBee itself. * - * Because, an XBee is a 3.3V device defaulting to 9600baud, and the - * Atmel328P is only rated at a maximum clock rate of 8MHz with a 3.3V + * Because, an XBee is a 3.3V device defaulting to 9600 baud, and the + * Atmel328P is only rated at a maximum clock rate of 8 MHz with a 3.3 V * supply, so there's a high likelihood a remote Atmel328P will be clocked - * at 8MHz. + * at 8 MHz. * * With a direct connection, there's a good chance we're talking to an - * Arduino clocked at 16MHz with an XBee-enabled chip plugged in. The + * Arduino clocked at 16 MHz with an XBee-enabled chip plugged in. The * doubled clock rate means a doubled serial rate. Double 9600 baud == * 19200 baud. */