diff --git a/src/arduino.c b/src/arduino.c index 3f468294..3ca83615 100644 --- a/src/arduino.c +++ b/src/arduino.c @@ -85,13 +85,22 @@ static int arduino_open(PROGRAMMER *pgm, const char *port) { return -1; } - /* Clear DTR and RTS to unload the RESET capacitor - * (for example in Arduino) */ + // This code assumes a negative-logic USB to TTL serial adapter + // Set RTS/DTR high to discharge the series-capacitor, if present serial_set_dtr_rts(&pgm->fd, 0); - usleep(250*1000); - /* Set DTR and RTS back to high */ + /* + * Long wait needed for optiboot: otherwise the second of two bootloader + * calls in quick succession fails: + * + * avrdude -c arduino -qqp m328p -U x.hex; avrdude -c arduino -qqp m328p -U x.hex + */ + usleep(250 * 1000); + // Pull the RTS/DTR line low to reset AVR serial_set_dtr_rts(&pgm->fd, 1); - usleep(50*1000); + usleep(50 * 1000); + // Set the RTS/DTR line back to high + serial_set_dtr_rts(&pgm->fd, 0); + usleep(50 * 1000); /* * drain any extraneous input @@ -106,7 +115,6 @@ static int arduino_open(PROGRAMMER *pgm, const char *port) { static void arduino_close(PROGRAMMER * pgm) { - serial_set_dtr_rts(&pgm->fd, 0); serial_close(&pgm->fd); pgm->fd.ifd = -1; } diff --git a/src/stk500.c b/src/stk500.c index b7788a59..71c35069 100644 --- a/src/stk500.c +++ b/src/stk500.c @@ -97,10 +97,12 @@ int stk500_getsync(const PROGRAMMER *pgm) { for (attempt = 0; attempt < max_sync_attempts; attempt++) { // Restart Arduino bootloader for every sync attempt if (strcmp(pgm->type, "Arduino") == 0 && attempt > 0) { - serial_set_dtr_rts(&pgm->fd, 0); // Set DTR and RTS low - usleep(250*1000); - serial_set_dtr_rts(&pgm->fd, 1); // Set DTR and RTS back to high - usleep(50*1000); + // This code assumes a negative-logic USB to TTL serial adapter + // Pull the RTS/DTR line low to reset AVR: it is still high from open()/last attempt + serial_set_dtr_rts(&pgm->fd, 1); + usleep(20*1000); + // Set the RTS/DTR line back to high + serial_set_dtr_rts(&pgm->fd, 0); stk500_drain(pgm, 0); } diff --git a/src/urclock.c b/src/urclock.c index 1d613e6a..b728be7f 100644 --- a/src/urclock.c +++ b/src/urclock.c @@ -2237,14 +2237,18 @@ static int urclock_open(PROGRAMMER *pgm, const char *port) { if(serial_open(port, pinfo, &pgm->fd) == -1) return -1; - // Clear DTR and RTS to unload the RESET capacitor + // This code assumes a negative-logic USB to TTL serial adapter + // Set RTS/DTR high to discharge the series-capacitor, if present serial_set_dtr_rts(&pgm->fd, 0); - usleep(20*1000); // 20 ms is ample for dis/charging the cap from reset to DTR/RTS - // Set DTR and RTS back to high + usleep(20*1000); + // Pull the RTS/DTR line low to reset AVR serial_set_dtr_rts(&pgm->fd, 1); + usleep(20*1000); + // Set the RTS/DTR line back to high + serial_set_dtr_rts(&pgm->fd, 0); - if((120+ur.delay) > 0) - usleep((120+ur.delay)*1000); // Wait until board comes out of reset + if((100+ur.delay) > 0) + usleep((100+ur.delay)*1000); // Wait until board comes out of reset pmsg_debug("%4ld ms: enter urclock_getsync()\n", avr_mstimestamp()); if(urclock_getsync(pgm) < 0) @@ -2256,7 +2260,6 @@ static int urclock_open(PROGRAMMER *pgm, const char *port) { static void urclock_close(PROGRAMMER *pgm) { - serial_set_dtr_rts(&pgm->fd, 0); serial_close(&pgm->fd); pgm->fd.ifd = -1; if(ur.bloptiversion) // Optiboot needs a pause between two successive avrdude calls diff --git a/src/wiring.c b/src/wiring.c index a0d3cf66..78309c18 100644 --- a/src/wiring.c +++ b/src/wiring.c @@ -175,6 +175,9 @@ static int wiring_open(PROGRAMMER *pgm, const char *port) { serial_set_dtr_rts(&pgm->fd, 1); usleep(50*1000); + + /* Set high, so a direct connection to reset works. */ + serial_set_dtr_rts(&pgm->fd, 0); } /* drain any extraneous input */ @@ -188,7 +191,6 @@ static int wiring_open(PROGRAMMER *pgm, const char *port) { static void wiring_close(PROGRAMMER * pgm) { - serial_set_dtr_rts(&pgm->fd, 0); serial_close(&pgm->fd); pgm->fd.ifd = -1; }