diff --git a/src/avr_opcodes.c b/src/avr_opcodes.c index 42bc5cf3..c3e83925 100644 --- a/src/avr_opcodes.c +++ b/src/avr_opcodes.c @@ -21,507 +21,509 @@ #include "libavrdude.h" const AVR_opcode_data avr_opcodes[164] = { +#define OP_ID(nam) OPCODE_##nam, #nam + // Arithmetic and Logic Instructions - {OPCODE_add, 0xfc00, 0x0c00, 1, OP_AVR1, "0000 11rd dddd rrrr", OTY_ALBI|OTY_RALL, + {OP_ID(add), 0xfc00, 0x0c00, 1, OP_AVR1, "0000 11rd dddd rrrr", OTY_ALBI|OTY_RALL, "add", "Rd, Rr", "Add without Carry", "Rd <-- Rd + Rr", "--HSVNZC", {"1", "1", "1", "1"}, ""}, - {OPCODE_adc, 0xfc00, 0x1c00, 1, OP_AVR1, "0001 11rd dddd rrrr", OTY_ALBI|OTY_RALL, + {OP_ID(adc), 0xfc00, 0x1c00, 1, OP_AVR1, "0001 11rd dddd rrrr", OTY_ALBI|OTY_RALL, "adc", "Rd, Rr", "Add with Carry", "Rd <-- Rd + Rr + C", "--HSVNZC", {"1", "1", "1", "1"}, ""}, - {OPCODE_adiw, 0xff00, 0x9600, 1, OP_AVR2nRC, "1001 0110 KKdd KKKK", OTY_ALBI|OTY_RW24, + {OP_ID(adiw), 0xff00, 0x9600, 1, OP_AVR2nRC, "1001 0110 KKdd KKKK", OTY_ALBI|OTY_RW24, "adiw", "Rd, K", "Add Immediate to Word", "Rd+1:Rd <-- Rd+1:Rd + K", "---SVNZC", {"2", "2", "2", "n/a"}, "d in {24, 26, 28, 30}"}, - {OPCODE_sub, 0xfc00, 0x1800, 1, OP_AVR1, "0001 10rd dddd rrrr", OTY_ALBI|OTY_RALL, + {OP_ID(sub), 0xfc00, 0x1800, 1, OP_AVR1, "0001 10rd dddd rrrr", OTY_ALBI|OTY_RALL, "sub", "Rd, Rr", "Subtract without Carry", "Rd <-- Rd - Rr", "--HSVNZC", {"1", "1", "1", "1"}, ""}, - {OPCODE_subi, 0xf000, 0x5000, 1, OP_AVR1, "0101 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP, + {OP_ID(subi), 0xf000, 0x5000, 1, OP_AVR1, "0101 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP, "subi", "Rd, K", "Subtract Immediate", "Rd <-- Rd - K", "--HSVNZC", {"1", "1", "1", "1"}, "d = 16..31"}, - {OPCODE_sbc, 0xfc00, 0x0800, 1, OP_AVR1, "0000 10rd dddd rrrr", OTY_ALBI|OTY_RALL, + {OP_ID(sbc), 0xfc00, 0x0800, 1, OP_AVR1, "0000 10rd dddd rrrr", OTY_ALBI|OTY_RALL, "sbc", "Rd, Rr", "Subtract with Carry", "Rd <-- Rd - Rr - C", "--HSVNZC", {"1", "1", "1", "1"}, ""}, - {OPCODE_sbci, 0xf000, 0x4000, 1, OP_AVR1, "0100 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP, + {OP_ID(sbci), 0xf000, 0x4000, 1, OP_AVR1, "0100 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP, "sbci", "Rd, K", "Subtract Immediate with Carry", "Rd <-- Rd - K - C", "--HSVNZC", {"1", "1", "1", "1"}, "d = 16..31"}, - {OPCODE_sbiw, 0xff00, 0x9700, 1, OP_AVR2nRC, "1001 0111 KKdd KKKK", OTY_ALBI|OTY_RW24, + {OP_ID(sbiw), 0xff00, 0x9700, 1, OP_AVR2nRC, "1001 0111 KKdd KKKK", OTY_ALBI|OTY_RW24, "sbiw", "Rd, K", "Subtract Immediate from Word", "Rd+1:Rd <-- Rd+1:Rd - K", "---SVNZC", {"2", "2", "2", "n/a"}, "d in {24, 26, 28, 30}"}, - {OPCODE_and, 0xfc00, 0x2000, 1, OP_AVR1, "0010 00rd dddd rrrr", OTY_ALBI|OTY_RALL, + {OP_ID(and), 0xfc00, 0x2000, 1, OP_AVR1, "0010 00rd dddd rrrr", OTY_ALBI|OTY_RALL, "and", "Rd, Rr", "Logical And", "Rd <-- Rd & Rr", "---SVNZ-", {"1", "1", "1", "1"}, ""}, - {OPCODE_andi, 0xf000, 0x7000, 1, OP_AVR1, "0111 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP, + {OP_ID(andi), 0xf000, 0x7000, 1, OP_AVR1, "0111 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP, "andi", "Rd, K", "Logical And with Immediate", "Rd <-- Rd & K", "---SVNZ-", {"1", "1", "1", "1"}, "d = 16..31"}, - {OPCODE_or, 0xfc00, 0x2800, 1, OP_AVR1, "0010 10rd dddd rrrr", OTY_ALBI|OTY_RALL, + {OP_ID(or), 0xfc00, 0x2800, 1, OP_AVR1, "0010 10rd dddd rrrr", OTY_ALBI|OTY_RALL, "or", "Rd, Rr", "Logical Or", "Rd <-- Rd | Rr", "---SVNZ-", {"1", "1", "1", "1"}, ""}, - {OPCODE_ori, 0xf000, 0x6000, 1, OP_AVR1, "0110 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP, + {OP_ID(ori), 0xf000, 0x6000, 1, OP_AVR1, "0110 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP, "ori", "Rd, K", "Logical Or with Immediate", "Rd <-- Rd | K", "---SVNZ-", {"1", "1", "1", "1"}, "d = 16..31"}, - {OPCODE_eor, 0xfc00, 0x2400, 1, OP_AVR1, "0010 01rd dddd rrrr", OTY_ALBI|OTY_RALL, + {OP_ID(eor), 0xfc00, 0x2400, 1, OP_AVR1, "0010 01rd dddd rrrr", OTY_ALBI|OTY_RALL, "eor", "Rd, Rr", "Exclusive or", "Rd <-- Rd ^ Rr", "---SVNZ-", {"1", "1", "1", "1"}, ""}, - {OPCODE_com, 0xfe0f, 0x9400, 1, OP_AVR1, "1001 010d dddd 0000", OTY_ALBI|OTY_RALL, + {OP_ID(com), 0xfe0f, 0x9400, 1, OP_AVR1, "1001 010d dddd 0000", OTY_ALBI|OTY_RALL, "com", "Rd", "One's Complement", "Rd <-- 0xff - Rd", "---SVNZC", {"1", "1", "1", "1"}, ""}, - {OPCODE_neg, 0xfe0f, 0x9401, 1, OP_AVR1, "1001 010d dddd 0001", OTY_ALBI|OTY_RALL, + {OP_ID(neg), 0xfe0f, 0x9401, 1, OP_AVR1, "1001 010d dddd 0001", OTY_ALBI|OTY_RALL, "neg", "Rd", "Two's Complement", "Rd <-- 0x00 - Rd", "--HSVNZC", {"1", "1", "1", "1"}, ""}, - {OPCODE_sbr, 0xf000, 0x6000, 1, OP_AVR1, "0110 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP|OTY_ALIAS, + {OP_ID(sbr), 0xf000, 0x6000, 1, OP_AVR1, "0110 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP|OTY_ALIAS, "sbr", "Rd, K", "Set Bit(s) in Register", "Rd <-- Rd or K", "---SVNZ-", {"1", "1", "1", "1"}, "alias for ori Rd, K; d = 16..31"}, - {OPCODE_cbr, 0xf000, 0x7000, 1, OP_AVR1, "0111 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP|OTY_ALIAS, + {OP_ID(cbr), 0xf000, 0x7000, 1, OP_AVR1, "0111 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP|OTY_ALIAS, "cbr", "Rd, K", "Clear Bit(s) in Register", "Rd <-- Rd & (0xff - K)", "---SVNZ-", {"1", "1", "1", "1"}, "alias for andi Rd, (0xff - K); d = 16..31"}, - {OPCODE_inc, 0xfe0f, 0x9403, 1, OP_AVR1, "1001 010d dddd 0011", OTY_ALBI|OTY_RALL, + {OP_ID(inc), 0xfe0f, 0x9403, 1, OP_AVR1, "1001 010d dddd 0011", OTY_ALBI|OTY_RALL, "inc", "Rd", "Increment", "Rd <-- Rd + 1", "---SVNZ-", {"1", "1", "1", "1"}, ""}, - {OPCODE_dec, 0xfe0f, 0x940a, 1, OP_AVR1, "1001 010d dddd 1010", OTY_ALBI|OTY_RALL, + {OP_ID(dec), 0xfe0f, 0x940a, 1, OP_AVR1, "1001 010d dddd 1010", OTY_ALBI|OTY_RALL, "dec", "Rd", "Decrement", "Rd <-- Rd - 1", "---SVNZ-", {"1", "1", "1", "1"}, ""}, - {OPCODE_tst, 0xfc00, 0x2000, 1, OP_AVR1, "0010 00r= rrrr ====", OTY_ALBI|OTY_RALL|OTY_CONSTRAINT, + {OP_ID(tst), 0xfc00, 0x2000, 1, OP_AVR1, "0010 00r= rrrr ====", OTY_ALBI|OTY_RALL|OTY_CONSTRAINT, "tst", "Rr", "Test for Zero or Minus", "Rr <-- Rr & Rr", "---SVNZ-", {"1", "1", "1", "1"}, "alias for and Rd, Rd"}, - {OPCODE_clr, 0xfc00, 0x2400, 1, OP_AVR1, "0010 01d= dddd ====", OTY_ALBI|OTY_RALL|OTY_CONSTRAINT, + {OP_ID(clr), 0xfc00, 0x2400, 1, OP_AVR1, "0010 01d= dddd ====", OTY_ALBI|OTY_RALL|OTY_CONSTRAINT, "clr", "Rd", "Clear Register", "Rd <-- Rd ^ Rd", "---SVNZ-", {"1", "1", "1", "1"}, "alias for eor Rd, Rd"}, - {OPCODE_ser, 0xff0f, 0xef0f, 1, OP_AVR1, "1110 1111 dddd 1111", OTY_ALBI|OTY_RUPP, + {OP_ID(ser), 0xff0f, 0xef0f, 1, OP_AVR1, "1110 1111 dddd 1111", OTY_ALBI|OTY_RUPP, "ser", "Rd", "Set Register", "Rd <-- 0xff", "--------", {"1", "1", "1", "1"}, "alias for ldi Rd, 0xff; d = 16..31"}, - {OPCODE_mul, 0xfc00, 0x9c00, 1, OP_AVR4, "1001 11rd dddd rrrr", OTY_ALBI|OTY_RALL, + {OP_ID(mul), 0xfc00, 0x9c00, 1, OP_AVR4, "1001 11rd dddd rrrr", OTY_ALBI|OTY_RALL, "mul", "Rd, Rr", "Multiply Unsigned", "R1:R0 <-- Rd x Rr (UU)", "------ZC", {"2", "2", "2", "n/a"}, ""}, - {OPCODE_muls, 0xff00, 0x0200, 1, OP_AVR4, "0000 0010 dddd rrrr", OTY_ALBI|OTY_RUPP, + {OP_ID(muls), 0xff00, 0x0200, 1, OP_AVR4, "0000 0010 dddd rrrr", OTY_ALBI|OTY_RUPP, "muls", "Rd, Rr", "Multiply Signed", "R1:R0 <-- Rd x Rr (SS)", "------ZC", {"2", "2", "2", "n/a"}, "d, r = 16..31"}, - {OPCODE_mulsu, 0xff88, 0x0300, 1, OP_AVR4, "0000 0011 0ddd 0rrr", OTY_ALBI|OTY_RUPP, + {OP_ID(mulsu), 0xff88, 0x0300, 1, OP_AVR4, "0000 0011 0ddd 0rrr", OTY_ALBI|OTY_RUPP, "mulsu", "Rd, Rr", "Multiply Signed with Unsigned", "R1:R0 <-- Rd x Rr (SU)", "------ZC", {"2", "2", "2", "n/a"}, "d, r = 16..23"}, - {OPCODE_fmul, 0xff88, 0x0308, 1, OP_AVR4, "0000 0011 0ddd 1rrr", OTY_ALBI|OTY_RUPP, + {OP_ID(fmul), 0xff88, 0x0308, 1, OP_AVR4, "0000 0011 0ddd 1rrr", OTY_ALBI|OTY_RUPP, "fmul", "Rd, Rr", "Fractional Multiply Unsigned", "R1:R0 <-- Rd x Rr<<1 (UU)", "------ZC", {"2", "2", "2", "n/a"}, "d, r = 16..23"}, - {OPCODE_fmuls, 0xff88, 0x0380, 1, OP_AVR4, "0000 0011 1ddd 0rrr", OTY_ALBI|OTY_RUPP, + {OP_ID(fmuls), 0xff88, 0x0380, 1, OP_AVR4, "0000 0011 1ddd 0rrr", OTY_ALBI|OTY_RUPP, "fmuls", "Rd, Rr", "Fractional Multiply Signed", "R1:R0 <-- Rd x Rr<<1 (SS)", "------ZC", {"2", "2", "2", "n/a"}, "d, r = 16..23"}, - {OPCODE_fmulsu, 0xff88, 0x0388, 1, OP_AVR4, "0000 0011 1ddd 1rrr", OTY_ALBI|OTY_RUPP, + {OP_ID(fmulsu), 0xff88, 0x0388, 1, OP_AVR4, "0000 0011 1ddd 1rrr", OTY_ALBI|OTY_RUPP, "fmulsu", "Rd, Rr", "Fractional Multiply Signed with Unsigned", "R1:R0 <-- Rd x Rr<<1 (SU)", "------ZC", {"2", "2", "2", "n/a"}, "d, r = 16..23"}, - {OPCODE_des, 0xff0f, 0x940b, 1, OP_AVR_XM, "1001 0100 KKKK 1011", OTY_ALBI, + {OP_ID(des), 0xff0f, 0x940b, 1, OP_AVR_XM, "1001 0100 KKKK 1011", OTY_ALBI, "des", "K", "Data Encryption", "if (H = 0) then R15:R0 <-- Encrypt(R15:R0, K) if (H = 1) then R15:R0 <-- Decrypt(R15:R0, K)", "--------", {"n/a", "1/2", "n/a", "n/a"}, ""}, // Branch Instructions (and compare) - {OPCODE_rjmp, 0xf000, 0xc000, 1, OP_AVR1, "1100 kkkk kkkk kkkk", OTY_RJMI, + {OP_ID(rjmp), 0xf000, 0xc000, 1, OP_AVR1, "1100 kkkk kkkk kkkk", OTY_RJMI, "rjmp", "k", "Relative Jump", "PC <-- PC + k + 1", "--------", {"2", "2", "2", "2"}, ""}, - {OPCODE_ijmp, 0xffff, 0x9409, 1, OP_AVR2, "1001 0100 0000 1001", OTY_JMPI, + {OP_ID(ijmp), 0xffff, 0x9409, 1, OP_AVR2, "1001 0100 0000 1001", OTY_JMPI, "ijmp", "Z", "Indirect Jump to (Z)", "PC(15:0) <-- Z, PC(21:16) <-- 0", "--------", {"2", "2", "2", "2"}, ""}, - {OPCODE_eijmp, 0xffff, 0x9419, 1, OP_AVR_XL, "1001 0100 0001 1001", OTY_JMPI, + {OP_ID(eijmp), 0xffff, 0x9419, 1, OP_AVR_XL, "1001 0100 0001 1001", OTY_JMPI, "eijmp", "-", "Extended Indirect Jump to (Z)", "PC(15:0) <-- Z, PC(21:16) <-- EIND", "--------", {"2", "2", "2", "n/a"}, ""}, - {OPCODE_jmp, 0xfe0e, 0x940c, 2, OP_AVR_M, "1001 010k kkkk 110k kkkk kkkk kkkk kkkk", OTY_JMPI, + {OP_ID(jmp), 0xfe0e, 0x940c, 2, OP_AVR_M, "1001 010k kkkk 110k kkkk kkkk kkkk kkkk", OTY_JMPI, "jmp", "k", "Jump", "PC <-- k", "--------", {"3", "3", "3", "n/a"}, ""}, - {OPCODE_rcall, 0xf000, 0xd000, 1, OP_AVR1, "1101 kkkk kkkk kkkk", OTY_RJMX, + {OP_ID(rcall), 0xf000, 0xd000, 1, OP_AVR1, "1101 kkkk kkkk kkkk", OTY_RJMX, "rcall", "k", "Relative Call Subroutine", "PC <-- PC + k + 1", "--------", {"3/4", "2/3", "2/3", "3"}, ""}, - {OPCODE_icall, 0xffff, 0x9509, 1, OP_AVR2, "1001 0101 0000 1001", OTY_JMPX, + {OP_ID(icall), 0xffff, 0x9509, 1, OP_AVR2, "1001 0101 0000 1001", OTY_JMPX, "icall", "Z", "Indirect Call to (Z)", "PC(15:0) <-- Z, PC(21:16) <-- 0", "--------", {"3/4", "2/3", "2/3", "3"}, ""}, - {OPCODE_eicall, 0xffff, 0x9519, 1, OP_AVR_XL, "1001 0101 0001 1001", OTY_JMPX, + {OP_ID(eicall), 0xffff, 0x9519, 1, OP_AVR_XL, "1001 0101 0001 1001", OTY_JMPX, "eicall", "-", "Extended Indirect Call to (Z)", "PC(15:0) <-- Z, PC(21:16) <-- EIND", "--------", {"4", "3", "3", "n/a"}, ""}, - {OPCODE_call, 0xfe0e, 0x940e, 2, OP_AVR_M, "1001 010k kkkk 111k kkkk kkkk kkkk kkkk", OTY_JMPX, + {OP_ID(call), 0xfe0e, 0x940e, 2, OP_AVR_M, "1001 010k kkkk 111k kkkk kkkk kkkk kkkk", OTY_JMPX, "call", "k", "call Subroutine", "PC <-- k, STACK <-- PC, SP <-- SP - 2", "--------", {"4/5", "3/4", "3/4", "n/a"}, ""}, - {OPCODE_ret, 0xffff, 0x9508, 1, OP_AVR1, "1001 0101 0000 1000", OTY_JMPX, + {OP_ID(ret), 0xffff, 0x9508, 1, OP_AVR1, "1001 0101 0000 1000", OTY_JMPX, "ret", "-", "Subroutine Return", "PC <-- STACK", "--------", {"4/5", "4/5", "4/5", "6"}, ""}, - {OPCODE_reti, 0xffff, 0x9518, 1, OP_AVR1, "1001 0101 0001 1000", OTY_JMPX, + {OP_ID(reti), 0xffff, 0x9518, 1, OP_AVR1, "1001 0101 0001 1000", OTY_JMPX, "reti", "-", "Interrupt Return", "PC <-- STACK", "I-------", {"4/5", "4/5", "4/5", "6"}, ""}, - {OPCODE_cpse, 0xfc00, 0x1000, 1, OP_AVR1, "0001 00rd dddd rrrr", OTY_SKPI|OTY_RALL, + {OP_ID(cpse), 0xfc00, 0x1000, 1, OP_AVR1, "0001 00rd dddd rrrr", OTY_SKPI|OTY_RALL, "cpse", "Rd, Rr", "Compare, Skip if Equal", "if(Rd=Rr) PC <-- PC + 2/3", "--------", {"1-3", "1-3", "1-3", "1/2"}, ""}, - {OPCODE_cp, 0xfc00, 0x1400, 1, OP_AVR1, "0001 01rd dddd rrrr", OTY_ALBI|OTY_RALL, + {OP_ID(cp), 0xfc00, 0x1400, 1, OP_AVR1, "0001 01rd dddd rrrr", OTY_ALBI|OTY_RALL, "cp", "Rd, Rr", "Compare", "Rd - Rr", "--HSVNZC", {"1", "1", "1", "1"}, ""}, - {OPCODE_cpc, 0xfc00, 0x0400, 1, OP_AVR1, "0000 01rd dddd rrrr", OTY_ALBI|OTY_RALL, + {OP_ID(cpc), 0xfc00, 0x0400, 1, OP_AVR1, "0000 01rd dddd rrrr", OTY_ALBI|OTY_RALL, "cpc", "Rd, Rr", "Compare with Carry", "Rd - Rr - C", "--HSVNZC", {"1", "1", "1", "1"}, ""}, - {OPCODE_cpi, 0xf000, 0x3000, 1, OP_AVR1, "0011 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP, + {OP_ID(cpi), 0xf000, 0x3000, 1, OP_AVR1, "0011 KKKK dddd KKKK", OTY_ALBI|OTY_RUPP, "cpi", "Rd, K", "Compare with Immediate", "Rd - K", "--HSVNZC", {"1", "1", "1", "1"}, "d = 16..31"}, - {OPCODE_sbrc, 0xfe08, 0xfc00, 1, OP_AVR1, "1111 110r rrrr 0bbb", OTY_SKPI|OTY_RALL, + {OP_ID(sbrc), 0xfe08, 0xfc00, 1, OP_AVR1, "1111 110r rrrr 0bbb", OTY_SKPI|OTY_RALL, "sbrc", "Rr, b", "Skip if Bit in Register Cleared", "if(Rr(b)=0) PC <-- PC + 2/3", "--------", {"1-3", "1-3", "1-3", "1/2"}, ""}, - {OPCODE_sbrs, 0xfe08, 0xfe00, 1, OP_AVR1, "1111 111r rrrr 0bbb", OTY_SKPI|OTY_RALL, + {OP_ID(sbrs), 0xfe08, 0xfe00, 1, OP_AVR1, "1111 111r rrrr 0bbb", OTY_SKPI|OTY_RALL, "sbrs", "Rr, b", "Skip if Bit in Register Set", "if(Rr(b)=1) PC <-- PC + 2/3", "--------", {"1-3", "1-3", "1-3", "1/2"}, ""}, - {OPCODE_sbic, 0xff00, 0x9900, 1, OP_AVR1, "1001 1001 AAAA Abbb", OTY_SKPX, + {OP_ID(sbic), 0xff00, 0x9900, 1, OP_AVR1, "1001 1001 AAAA Abbb", OTY_SKPX, "sbic", "A, b", "Skip if Bit in I/O Register Cleared", "if(I/O(A,b)=0) PC <-- PC + 2/3", "--------", {"1-3", "2-4", "1-3", "1/2"}, ""}, - {OPCODE_sbis, 0xff00, 0x9b00, 1, OP_AVR1, "1001 1011 AAAA Abbb", OTY_SKPX, + {OP_ID(sbis), 0xff00, 0x9b00, 1, OP_AVR1, "1001 1011 AAAA Abbb", OTY_SKPX, "sbis", "A, b", "Skip if Bit in I/O Register Set", "If(I/O(A,b)=1) PC <-- PC + 2/3", "--------", {"1-3", "2-4", "1-3", "1/2"}, ""}, - {OPCODE_brcs, 0xfc07, 0xf000, 1, OP_AVR1, "1111 00kk kkkk k000", OTY_BRAI, + {OP_ID(brcs), 0xfc07, 0xf000, 1, OP_AVR1, "1111 00kk kkkk k000", OTY_BRAI, "brcs", "k", "Branch if Carry Set", "if(C=1) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbs 0, k (C Carry)"}, - {OPCODE_brlo, 0xfc07, 0xf000, 1, OP_AVR1, "1111 00kk kkkk k000", OTY_BRAI|OTY_ALIAS, + {OP_ID(brlo), 0xfc07, 0xf000, 1, OP_AVR1, "1111 00kk kkkk k000", OTY_BRAI|OTY_ALIAS, "brlo", "k", "Branch if Lower", "if(C=1) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbs 0, k (C Carry)"}, - {OPCODE_breq, 0xfc07, 0xf001, 1, OP_AVR1, "1111 00kk kkkk k001", OTY_BRAI, + {OP_ID(breq), 0xfc07, 0xf001, 1, OP_AVR1, "1111 00kk kkkk k001", OTY_BRAI, "breq", "k", "Branch if Equal", "if(Z=1) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbs 1, k (Z Zero)"}, - {OPCODE_brmi, 0xfc07, 0xf002, 1, OP_AVR1, "1111 00kk kkkk k010", OTY_BRAI, + {OP_ID(brmi), 0xfc07, 0xf002, 1, OP_AVR1, "1111 00kk kkkk k010", OTY_BRAI, "brmi", "k", "Branch if Minus", "if(N=1) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbs 2, k (N Negative)"}, - {OPCODE_brvs, 0xfc07, 0xf003, 1, OP_AVR1, "1111 00kk kkkk k011", OTY_BRAI, + {OP_ID(brvs), 0xfc07, 0xf003, 1, OP_AVR1, "1111 00kk kkkk k011", OTY_BRAI, "brvs", "k", "Branch if Overflow Flag is Set", "if(V=1) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbs 3, k (V Overflow in two's complement)"}, - {OPCODE_brlt, 0xfc07, 0xf004, 1, OP_AVR1, "1111 00kk kkkk k100", OTY_BRAI, + {OP_ID(brlt), 0xfc07, 0xf004, 1, OP_AVR1, "1111 00kk kkkk k100", OTY_BRAI, "brlt", "k", "Branch if Less Than, Signed", "if(N^V=1) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbs 4, k (S Sign)"}, - {OPCODE_brhs, 0xfc07, 0xf005, 1, OP_AVR1, "1111 00kk kkkk k101", OTY_BRAI, + {OP_ID(brhs), 0xfc07, 0xf005, 1, OP_AVR1, "1111 00kk kkkk k101", OTY_BRAI, "brhs", "k", "Branch if Half Carry Flag Set", "if(H=1) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbs 5, k (H Half carry)"}, - {OPCODE_brts, 0xfc07, 0xf006, 1, OP_AVR1, "1111 00kk kkkk k110", OTY_BRAI, + {OP_ID(brts), 0xfc07, 0xf006, 1, OP_AVR1, "1111 00kk kkkk k110", OTY_BRAI, "brts", "k", "Branch if T Flag Set", "if(T=1) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbs 6, k (T Transfer bit)"}, - {OPCODE_brie, 0xfc07, 0xf007, 1, OP_AVR1, "1111 00kk kkkk k111", OTY_BRAI, + {OP_ID(brie), 0xfc07, 0xf007, 1, OP_AVR1, "1111 00kk kkkk k111", OTY_BRAI, "brie", "k", "Branch if Interrupt Enabled", "if(I=1) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbs 7, k (I Interrupt enable)"}, - {OPCODE_brbs, 0xfc00, 0xf000, 1, OP_AVR1, "1111 00kk kkkk ksss", OTY_BRAI, + {OP_ID(brbs), 0xfc00, 0xf000, 1, OP_AVR1, "1111 00kk kkkk ksss", OTY_BRAI, "brbs", "s, k", "Branch if Status Flag Set", "if(SREG(s)=1) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, ""}, - {OPCODE_brcc, 0xfc07, 0xf400, 1, OP_AVR1, "1111 01kk kkkk k000", OTY_BRAI, + {OP_ID(brcc), 0xfc07, 0xf400, 1, OP_AVR1, "1111 01kk kkkk k000", OTY_BRAI, "brcc", "k", "Branch if Carry Cleared", "if(C=0) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbc 0, k (C Carry)"}, - {OPCODE_brsh, 0xfc07, 0xf400, 1, OP_AVR1, "1111 01kk kkkk k000", OTY_BRAI|OTY_ALIAS, + {OP_ID(brsh), 0xfc07, 0xf400, 1, OP_AVR1, "1111 01kk kkkk k000", OTY_BRAI|OTY_ALIAS, "brsh", "k", "Branch if Same or Higher", "if(C=0) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbc 0, k (C Carry)"}, - {OPCODE_brne, 0xfc07, 0xf401, 1, OP_AVR1, "1111 01kk kkkk k001", OTY_BRAI, + {OP_ID(brne), 0xfc07, 0xf401, 1, OP_AVR1, "1111 01kk kkkk k001", OTY_BRAI, "brne", "k", "Branch if Not Equal", "if(Z=0) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbc 1, k (Z Zero)"}, - {OPCODE_brpl, 0xfc07, 0xf402, 1, OP_AVR1, "1111 01kk kkkk k010", OTY_BRAI, + {OP_ID(brpl), 0xfc07, 0xf402, 1, OP_AVR1, "1111 01kk kkkk k010", OTY_BRAI, "brpl", "k", "Branch if Plus", "if(N=0) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbc 2, k (N Negative)"}, - {OPCODE_brvc, 0xfc07, 0xf403, 1, OP_AVR1, "1111 01kk kkkk k011", OTY_BRAI, + {OP_ID(brvc), 0xfc07, 0xf403, 1, OP_AVR1, "1111 01kk kkkk k011", OTY_BRAI, "brvc", "k", "Branch if Overflow Flag is Cleared", "if(V=0) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbc 3, k (V Overflow in two's complement)"}, - {OPCODE_brge, 0xfc07, 0xf404, 1, OP_AVR1, "1111 01kk kkkk k100", OTY_BRAI, + {OP_ID(brge), 0xfc07, 0xf404, 1, OP_AVR1, "1111 01kk kkkk k100", OTY_BRAI, "brge", "k", "Branch if Greater or Equal, Signed", "if(N^V=0) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbc 4, k (S Sign)"}, - {OPCODE_brhc, 0xfc07, 0xf405, 1, OP_AVR1, "1111 01kk kkkk k101", OTY_BRAI, + {OP_ID(brhc), 0xfc07, 0xf405, 1, OP_AVR1, "1111 01kk kkkk k101", OTY_BRAI, "brhc", "k", "Branch if Half Carry Flag Cleared", "if(H=0) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbc 5, k (H Half carry)"}, - {OPCODE_brtc, 0xfc07, 0xf406, 1, OP_AVR1, "1111 01kk kkkk k110", OTY_BRAI, + {OP_ID(brtc), 0xfc07, 0xf406, 1, OP_AVR1, "1111 01kk kkkk k110", OTY_BRAI, "brtc", "k", "Branch if T Flag Cleared", "if(T=0) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbc 6, k (T Transfer bit)"}, - {OPCODE_brid, 0xfc07, 0xf407, 1, OP_AVR1, "1111 01kk kkkk k111", OTY_BRAI, + {OP_ID(brid), 0xfc07, 0xf407, 1, OP_AVR1, "1111 01kk kkkk k111", OTY_BRAI, "brid", "k", "Branch if Interrupt Disabled", "if(I=0) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, "alias for brbc 7, k (I Interrupt enable)"}, - {OPCODE_brbc, 0xfc00, 0xf400, 1, OP_AVR1, "1111 01kk kkkk ksss", OTY_BRAI, + {OP_ID(brbc), 0xfc00, 0xf400, 1, OP_AVR1, "1111 01kk kkkk ksss", OTY_BRAI, "brbc", "s, k", "Branch if Status Flag Cleared", "if(SREG(s)=0) then PC <-- PC + k + 1", "--------", {"1/2", "1/2", "1/2", "1/2"}, ""}, // Data Transfer Instructions - {OPCODE_mov, 0xfc00, 0x2c00, 1, OP_AVR1, "0010 11rd dddd rrrr", OTY_XFRI|OTY_RALL, + {OP_ID(mov), 0xfc00, 0x2c00, 1, OP_AVR1, "0010 11rd dddd rrrr", OTY_XFRI|OTY_RALL, "mov", "Rd, Rr", "Copy Register", "Rd <-- Rr", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_movw, 0xff00, 0x0100, 1, OP_AVR25, "0000 0001 dddd rrrr", OTY_XFRI|OTY_REVN, + {OP_ID(movw), 0xff00, 0x0100, 1, OP_AVR25, "0000 0001 dddd rrrr", OTY_XFRI|OTY_REVN, "movw", "Rd, Rr", "Copy Register Pair", "Rd+1:Rd <-- Rr+1:Rr", "--------", {"1", "1", "1", "n/a"}, "d, r in {0, 2, ..., 30}"}, - {OPCODE_ldi, 0xf000, 0xe000, 1, OP_AVR1, "1110 KKKK dddd KKKK", OTY_XFRI|OTY_RUPP, + {OP_ID(ldi), 0xf000, 0xe000, 1, OP_AVR1, "1110 KKKK dddd KKKK", OTY_XFRI|OTY_RUPP, "ldi", "Rd, K", "Load Immediate", "Rd <-- K", "--------", {"1", "1", "1", "1"}, "d = 16..31"}, - {OPCODE_lds, 0xfe0f, 0x9000, 2, OP_AVR2nRC, "1001 000d dddd 0000 kkkk kkkk kkkk kkkk", OTY_XFRX|OTY_RALL, + {OP_ID(lds), 0xfe0f, 0x9000, 2, OP_AVR2nRC, "1001 000d dddd 0000 kkkk kkkk kkkk kkkk", OTY_XFRX|OTY_RALL, "lds", "Rd, k", "Load Direct from data space", "Rd <-- (k)", "--------", {"2", "3", "3", "2"}, ""}, - {OPCODE_lds_rc, 0xf800, 0xa000, 1, OP_AVR_RC, "1010 0aaa dddd aaaa", OTY_XFRX|OTY_RUPP, + {OP_ID(lds_rc), 0xf800, 0xa000, 1, OP_AVR_RC, "1010 0aaa dddd aaaa", OTY_XFRX|OTY_RUPP, "lds", "Rd, a", "Load Direct from data space", "Rd <-- (a)", "--------", {"n/a", "n/a", "n/a", "2"}, "AVRrc only (TPI parts); a = 0x40..0xbf"}, - {OPCODE_ld_1, 0xfe0f, 0x900c, 1, OP_AVR2, "1001 000d dddd 1100", OTY_XFRX|OTY_RALL, + {OP_ID(ld_1), 0xfe0f, 0x900c, 1, OP_AVR2, "1001 000d dddd 1100", OTY_XFRX|OTY_RALL, "ld", "Rd, X", "Load Indirect", "Rd <-- (X)", "--------", {"2", "2", "2", "1/2"}, ""}, - {OPCODE_ld_2, 0xfe0f, 0x900d, 1, OP_AVR2, "1001 000d dddd 1101", OTY_XFRX|OTY_RALL, + {OP_ID(ld_2), 0xfe0f, 0x900d, 1, OP_AVR2, "1001 000d dddd 1101", OTY_XFRX|OTY_RALL, "ld", "Rd, X+", "Load Indirect and Post-Increment", "Rd <-- (X), X <-- X + 1", "--------", {"2", "2", "2", "2/3"}, ""}, - {OPCODE_ld_3, 0xfe0f, 0x900e, 1, OP_AVR2, "1001 000d dddd 1110", OTY_XFRX|OTY_RALL, + {OP_ID(ld_3), 0xfe0f, 0x900e, 1, OP_AVR2, "1001 000d dddd 1110", OTY_XFRX|OTY_RALL, "ld", "Rd, -X", "Load Indirect and Pre-Decrement", "X <-- X - 1, Rd <-- (X)", "--------", {"2", "3", "2", "2/3"}, ""}, - {OPCODE_ld_4, 0xfe0f, 0x8008, 1, OP_AVR2, "1000 000d dddd 1000", OTY_XFRX|OTY_RALL, + {OP_ID(ld_4), 0xfe0f, 0x8008, 1, OP_AVR2, "1000 000d dddd 1000", OTY_XFRX|OTY_RALL, "ld", "Rd, Y", "Load Indirect", "Rd <-- (Y) <-- (Y)", "--------", {"2", "2", "2", "1/2"}, "alias for ldd Rd, Y+0"}, - {OPCODE_ld_5, 0xfe0f, 0x9009, 1, OP_AVR2, "1001 000d dddd 1001", OTY_XFRX|OTY_RALL, + {OP_ID(ld_5), 0xfe0f, 0x9009, 1, OP_AVR2, "1001 000d dddd 1001", OTY_XFRX|OTY_RALL, "ld", "Rd, Y+", "Load Indirect and Post-Increment", "Rd <-- (Y), Y <-- Y + 1", "--------", {"2", "2", "2", "2/3"}, ""}, - {OPCODE_ld_6, 0xfe0f, 0x900a, 1, OP_AVR2, "1001 000d dddd 1010", OTY_XFRX|OTY_RALL, + {OP_ID(ld_6), 0xfe0f, 0x900a, 1, OP_AVR2, "1001 000d dddd 1010", OTY_XFRX|OTY_RALL, "ld", "Rd, -Y", "Load Indirect and Pre-Decrement", "Y <-- Y - 1 Rd <-- (Y)", "--------", {"2", "3", "2", "2/3"}, ""}, - {OPCODE_ldd_1, 0xd208, 0x8008, 1, OP_AVR2nRC, "10q0 qq0d dddd 1qqq", OTY_XFRX|OTY_RALL, + {OP_ID(ldd_1), 0xd208, 0x8008, 1, OP_AVR2nRC, "10q0 qq0d dddd 1qqq", OTY_XFRX|OTY_RALL, "ldd", "Rd, Y+q", "Load Indirect with Displacement", "Rd <-- (Y+q)", "--------", {"2", "3", "2", "n/a"}, ""}, - {OPCODE_ld_7, 0xfe0f, 0x8000, 1, OP_AVR1, "1000 000d dddd 0000", OTY_XFRX|OTY_RALL, + {OP_ID(ld_7), 0xfe0f, 0x8000, 1, OP_AVR1, "1000 000d dddd 0000", OTY_XFRX|OTY_RALL, "ld", "Rd, Z", "Load Indirect", "Rd <-- (Z)", "--------", {"2", "2", "2", "1/2"}, "alias for ldd Rd, Z+0"}, - {OPCODE_ld_8, 0xfe0f, 0x9001, 1, OP_AVR1, "1001 000d dddd 0001", OTY_XFRX|OTY_RALL, + {OP_ID(ld_8), 0xfe0f, 0x9001, 1, OP_AVR1, "1001 000d dddd 0001", OTY_XFRX|OTY_RALL, "ld", "Rd, Z+", "Load Indirect and Post-Increment", "Rd <-- (Z), Z <-- Z + 1", "--------", {"2", "2", "2", "2/3"}, ""}, - {OPCODE_ld_9, 0xfe0f, 0x9002, 1, OP_AVR1, "1001 000d dddd 0010", OTY_XFRX|OTY_RALL, + {OP_ID(ld_9), 0xfe0f, 0x9002, 1, OP_AVR1, "1001 000d dddd 0010", OTY_XFRX|OTY_RALL, "ld", "Rd, -Z", "Load Indirect and Pre-Decrement", "Z <-- Z - 1, Rd <-- (Z)", "--------", {"2", "3", "2", "2/3"}, ""}, - {OPCODE_ldd_2, 0xd208, 0x8000, 1, OP_AVR2nRC, "10q0 qq0d dddd 0qqq", OTY_XFRX|OTY_RALL, + {OP_ID(ldd_2), 0xd208, 0x8000, 1, OP_AVR2nRC, "10q0 qq0d dddd 0qqq", OTY_XFRX|OTY_RALL, "ldd", "Rd, Z+q", "Load Indirect with Displacement", "Rd <-- (Z+q)", "--------", {"2", "3", "2", "n/a"}, ""}, - {OPCODE_sts, 0xfe0f, 0x9200, 2, OP_AVR2nRC, "1001 001r rrrr 0000 kkkk kkkk kkkk kkkk", OTY_XFRX|OTY_RALL, + {OP_ID(sts), 0xfe0f, 0x9200, 2, OP_AVR2nRC, "1001 001r rrrr 0000 kkkk kkkk kkkk kkkk", OTY_XFRX|OTY_RALL, "sts", "k, Rr", "Store Direct to Data Space", "(k) <-- Rr", "--------", {"2", "2", "2", "1"}, ""}, - {OPCODE_sts_rc, 0xf800, 0xa800, 1, OP_AVR_RC, "1010 1aaa rrrr aaaa", OTY_XFRX|OTY_RUPP, + {OP_ID(sts_rc), 0xf800, 0xa800, 1, OP_AVR_RC, "1010 1aaa rrrr aaaa", OTY_XFRX|OTY_RUPP, "sts", "a, Rr", "Store Direct to Data Space", "(a) <-- Rr", "--------", {"n/a", "n/a", "n/a", "1"}, "AVRrc only (TPI parts); a = 0x40..0xbf"}, - {OPCODE_st_1, 0xfe0f, 0x920c, 1, OP_AVR2, "1001 001r rrrr 1100", OTY_XFRX|OTY_RALL, + {OP_ID(st_1), 0xfe0f, 0x920c, 1, OP_AVR2, "1001 001r rrrr 1100", OTY_XFRX|OTY_RALL, "st", "X, Rr", "Store Indirect", "(X) <-- Rr", "--------", {"2", "1", "1", "1"}, ""}, - {OPCODE_st_2, 0xfe0f, 0x920d, 1, OP_AVR2, "1001 001r rrrr 1101", OTY_XFRX|OTY_RALL, + {OP_ID(st_2), 0xfe0f, 0x920d, 1, OP_AVR2, "1001 001r rrrr 1101", OTY_XFRX|OTY_RALL, "st", "X+, Rr", "Store Indirect and Post-Increment", "(X) <-- Rr, X <-- X + 1", "--------", {"2", "1", "1", "1"}, ""}, - {OPCODE_st_3, 0xfe0f, 0x920e, 1, OP_AVR2, "1001 001r rrrr 1110", OTY_XFRX|OTY_RALL, + {OP_ID(st_3), 0xfe0f, 0x920e, 1, OP_AVR2, "1001 001r rrrr 1110", OTY_XFRX|OTY_RALL, "st", "-X, Rr", "Store Indirect and Pre-Decrement", "X <-- X - 1, (X) <-- Rr", "--------", {"2", "2", "1", "1"}, ""}, - {OPCODE_st_4, 0xfe0f, 0x8208, 1, OP_AVR2, "1000 001r rrrr 1000", OTY_XFRX|OTY_RALL, + {OP_ID(st_4), 0xfe0f, 0x8208, 1, OP_AVR2, "1000 001r rrrr 1000", OTY_XFRX|OTY_RALL, "st", "Y, Rr", "Store Indirect", "(Y) <-- Rr", "--------", {"2", "1", "1", "1"}, "alias for std Y+0, Rr"}, - {OPCODE_st_5, 0xfe0f, 0x9209, 1, OP_AVR2, "1001 001r rrrr 1001", OTY_XFRX|OTY_RALL, + {OP_ID(st_5), 0xfe0f, 0x9209, 1, OP_AVR2, "1001 001r rrrr 1001", OTY_XFRX|OTY_RALL, "st", "Y+, Rr", "Store Indirect and Post-Increment", "(Y) <-- Rr, Y <-- Y + 1", "--------", {"2", "1", "1", "1"}, ""}, - {OPCODE_st_6, 0xfe0f, 0x920a, 1, OP_AVR2, "1001 001r rrrr 1010", OTY_XFRX|OTY_RALL, + {OP_ID(st_6), 0xfe0f, 0x920a, 1, OP_AVR2, "1001 001r rrrr 1010", OTY_XFRX|OTY_RALL, "st", "-Y, Rr", "Store Indirect and Pre-Decrement", "Y <-- Y - 1, (Y) <-- Rr", "--------", {"2", "2", "1", "1"}, ""}, - {OPCODE_std_1, 0xd208, 0x8208, 1, OP_AVR2nRC, "10q0 qq1r rrrr 1qqq", OTY_XFRX|OTY_RALL, + {OP_ID(std_1), 0xd208, 0x8208, 1, OP_AVR2nRC, "10q0 qq1r rrrr 1qqq", OTY_XFRX|OTY_RALL, "std", "Y+q, Rr", "Store Indirect with Displacement", "(Y+q) <-- Rr", "--------", {"2", "2", "1", "n/a"}, ""}, - {OPCODE_st_7, 0xfe0f, 0x8200, 1, OP_AVR1, "1000 001r rrrr 0000", OTY_XFRX|OTY_RALL, + {OP_ID(st_7), 0xfe0f, 0x8200, 1, OP_AVR1, "1000 001r rrrr 0000", OTY_XFRX|OTY_RALL, "st", "Z, Rr", "Store Indirect", "(Z) <-- Rr", "--------", {"2", "1", "1", "1"}, "alias for std Z+0, Rr"}, - {OPCODE_st_8, 0xfe0f, 0x9201, 1, OP_AVR1, "1001 001r rrrr 0001", OTY_XFRX|OTY_RALL, + {OP_ID(st_8), 0xfe0f, 0x9201, 1, OP_AVR1, "1001 001r rrrr 0001", OTY_XFRX|OTY_RALL, "st", "Z+, Rr", "Store Indirect and Post-Increment", "(Z) <-- Rr, Z <-- Z + 1", "--------", {"2", "1", "1", "1"}, ""}, - {OPCODE_st_9, 0xfe0f, 0x9202, 1, OP_AVR1, "1001 001r rrrr 0010", OTY_XFRX|OTY_RALL, + {OP_ID(st_9), 0xfe0f, 0x9202, 1, OP_AVR1, "1001 001r rrrr 0010", OTY_XFRX|OTY_RALL, "st", "-Z, Rr", "Store Indirect and Pre-Decrement", "Z <-- Z - 1, (Z) <-- Rr", "--------", {"2", "2", "1", "1"}, ""}, - {OPCODE_std_2, 0xd208, 0x8200, 1, OP_AVR2nRC, "10q0 qq1r rrrr 0qqq", OTY_XFRX|OTY_RALL, + {OP_ID(std_2), 0xd208, 0x8200, 1, OP_AVR2nRC, "10q0 qq1r rrrr 0qqq", OTY_XFRX|OTY_RALL, "std", "Z+q, Rr", "Store Indirect with Displacement", "(Z+q) <-- Rr", "--------", {"2", "2", "1", "n/a"}, ""}, - {OPCODE_lpm_1, 0xffff, 0x95c8, 1, OP_AVR1nRC, "1001 0101 1100 1000", OTY_XFRX, + {OP_ID(lpm_1), 0xffff, 0x95c8, 1, OP_AVR1nRC, "1001 0101 1100 1000", OTY_XFRX, "lpm", "-", "Load Program Memory", "R0 <-- (Z)", "--------", {"3", "3", "3", "n/a"}, ""}, - {OPCODE_lpm_2, 0xfe0f, 0x9004, 1, OP_AVR25, "1001 000d dddd 0100", OTY_XFRX|OTY_RALL, + {OP_ID(lpm_2), 0xfe0f, 0x9004, 1, OP_AVR25, "1001 000d dddd 0100", OTY_XFRX|OTY_RALL, "lpm", "Rd, Z", "Load Program Memory", "Rd <-- (Z)", "--------", {"3", "3", "3", "n/a"}, ""}, - {OPCODE_lpm_3, 0xfe0f, 0x9005, 1, OP_AVR25, "1001 000d dddd 0101", OTY_XFRX|OTY_RALL, + {OP_ID(lpm_3), 0xfe0f, 0x9005, 1, OP_AVR25, "1001 000d dddd 0101", OTY_XFRX|OTY_RALL, "lpm", "Rd, Z+", "Load Program Memory and Post- Increment", "Rd <-- (Z), Z <-- Z + 1", "--------", {"3", "3", "3", "n/a"}, ""}, - {OPCODE_elpm_1, 0xffff, 0x95d8, 1, OP_AVR_L, "1001 0101 1101 1000", OTY_XFRX, + {OP_ID(elpm_1), 0xffff, 0x95d8, 1, OP_AVR_L, "1001 0101 1101 1000", OTY_XFRX, "elpm", "R0, Z", "Extended Load Program Memory", "R0 <-- (RAMPZ:Z)", "--------", {"3", "3", "3", "n/a"}, ""}, - {OPCODE_elpm_2, 0xfe0f, 0x9006, 1, OP_AVR_L, "1001 000d dddd 0110", OTY_XFRX|OTY_RALL, + {OP_ID(elpm_2), 0xfe0f, 0x9006, 1, OP_AVR_L, "1001 000d dddd 0110", OTY_XFRX|OTY_RALL, "elpm", "Rd, Z", "Extended Load Program Memory", "Rd <-- (RAMPZ:Z)", "--------", {"3", "3", "3", "n/a"}, ""}, - {OPCODE_elpm_3, 0xfe0f, 0x9007, 1, OP_AVR_L, "1001 000d dddd 0111", OTY_XFRX|OTY_RALL, + {OP_ID(elpm_3), 0xfe0f, 0x9007, 1, OP_AVR_L, "1001 000d dddd 0111", OTY_XFRX|OTY_RALL, "elpm", "Rd, Z+", "Extended Load Program Memory and Post-Increment", "Rd <-- (RAMPZ:Z), Z <-- Z + 1", "--------", {"3", "3", "3", "n/a"}, ""}, - {OPCODE_spm, 0xffff, 0x95e8, 1, OP_AVR25, "1001 0101 1110 1000", OTY_XFRX, + {OP_ID(spm), 0xffff, 0x95e8, 1, OP_AVR25, "1001 0101 1110 1000", OTY_XFRX, "spm", "Z", "Store Program Memory", "(RAMPZ:Z) <-- R1:R0", "--------", {"-", "-", "-", "-"}, ""}, - {OPCODE_spm_zz, 0xffff, 0x95f8, 1, OP_AVR_XTM, "1001 0101 1111 1000", OTY_XFRX, + {OP_ID(spm_zz), 0xffff, 0x95f8, 1, OP_AVR_XTM, "1001 0101 1111 1000", OTY_XFRX, "spm", "Z+", "Store Program Memory and Post-Increment by 2", "(RAMPZ:Z) <-- R1:R0, Z <-- Z + 2", "--------", {"n/a", "-", "-", "n/a"}, ""}, - {OPCODE_in, 0xf800, 0xb000, 1, OP_AVR1, "1011 0AAd dddd AAAA", OTY_XFRX|OTY_RALL, + {OP_ID(in), 0xf800, 0xb000, 1, OP_AVR1, "1011 0AAd dddd AAAA", OTY_XFRX|OTY_RALL, "in", "Rd, A", "In from I/O Location", "Rd <-- I/O(A)", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_out, 0xf800, 0xb800, 1, OP_AVR1, "1011 1AAr rrrr AAAA", OTY_XFRX|OTY_RALL, + {OP_ID(out), 0xf800, 0xb800, 1, OP_AVR1, "1011 1AAr rrrr AAAA", OTY_XFRX|OTY_RALL, "out", "A, Rr", "Out to I/O Location", "I/O(A) <-- Rr", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_push, 0xfe0f, 0x920f, 1, OP_AVR2, "1001 001r rrrr 1111", OTY_XFRX|OTY_RALL, + {OP_ID(push), 0xfe0f, 0x920f, 1, OP_AVR2, "1001 001r rrrr 1111", OTY_XFRX|OTY_RALL, "push", "Rr", "Push Register on Stack", "STACK <-- Rr", "--------", {"2", "1", "1", "1"}, ""}, - {OPCODE_pop, 0xfe0f, 0x900f, 1, OP_AVR2, "1001 000d dddd 1111", OTY_XFRX|OTY_RALL, + {OP_ID(pop), 0xfe0f, 0x900f, 1, OP_AVR2, "1001 000d dddd 1111", OTY_XFRX|OTY_RALL, "pop", "Rd", "Pop Register from Stack", "Rd <-- STACK", "--------", {"2", "2", "2", "3"}, ""}, - {OPCODE_xch, 0xfe0f, 0x9204, 1, OP_AVR_XM, "1001 001d dddd 0100", OTY_XFRX|OTY_RALL, + {OP_ID(xch), 0xfe0f, 0x9204, 1, OP_AVR_XM, "1001 001d dddd 0100", OTY_XFRX|OTY_RALL, "xch", "Z, Rd", "Exchange", "(Z) <-- Rd, Rd <-- (Z)", "--------", {"n/a", "1", "n/a", "n/a"}, ""}, - {OPCODE_las, 0xfe0f, 0x9205, 1, OP_AVR_XM, "1001 001d dddd 0101", OTY_ALBX|OTY_RALL, + {OP_ID(las), 0xfe0f, 0x9205, 1, OP_AVR_XM, "1001 001d dddd 0101", OTY_ALBX|OTY_RALL, "las", "Z, Rd", "Load and Set", "(Z) <-- Rd | (Z), Rd <-- (Z)", "--------", {"n/a", "1", "n/a", "n/a"}, ""}, - {OPCODE_lac, 0xfe0f, 0x9206, 1, OP_AVR_XM, "1001 001d dddd 0110", OTY_ALBX|OTY_RALL, + {OP_ID(lac), 0xfe0f, 0x9206, 1, OP_AVR_XM, "1001 001d dddd 0110", OTY_ALBX|OTY_RALL, "lac", "Z, Rd", "Load and Clear", "(Z) <-- (0xff - Rd) & (Z), Rd <-- (Z)", "--------", {"n/a", "1", "n/a", "n/a"}, ""}, - {OPCODE_lat, 0xfe0f, 0x9207, 1, OP_AVR_XM, "1001 001d dddd 0111", OTY_ALBX|OTY_RALL, + {OP_ID(lat), 0xfe0f, 0x9207, 1, OP_AVR_XM, "1001 001d dddd 0111", OTY_ALBX|OTY_RALL, "lat", "Z, Rd", "Load and Toggle", "(Z) <-- Rd ^ (Z), Rd <-- (Z)", "--------", {"n/a", "1", "n/a", "n/a"}, ""}, // Bit and Bit-test Instructions - {OPCODE_lsl, 0xfc00, 0x0c00, 1, OP_AVR1, "0000 11d= dddd ====", OTY_ALBI|OTY_RALL|OTY_CONSTRAINT, + {OP_ID(lsl), 0xfc00, 0x0c00, 1, OP_AVR1, "0000 11d= dddd ====", OTY_ALBI|OTY_RALL|OTY_CONSTRAINT, "lsl", "Rd", "Logical Shift Left", "C <-- Rd(7) <-- Rd(6) ... Rd(1) <-- Rd(0) <-- 0", "--H-VNZC", {"1", "1", "1", "1"}, "alias for add Rd, Rd"}, - {OPCODE_lsr, 0xfe0f, 0x9406, 1, OP_AVR1, "1001 010d dddd 0110", OTY_ALBI|OTY_RALL, + {OP_ID(lsr), 0xfe0f, 0x9406, 1, OP_AVR1, "1001 010d dddd 0110", OTY_ALBI|OTY_RALL, "lsr", "Rd", "Logical Shift Right", "0 --> Rd(7) --> Rd(6) ... Rd(1) --> Rd(0) --> C", "----VNZC", {"1", "1", "1", "1"}, ""}, - {OPCODE_rol, 0xfc00, 0x1c00, 1, OP_AVR1, "0001 11d= dddd ====", OTY_ALBI|OTY_RALL|OTY_CONSTRAINT, + {OP_ID(rol), 0xfc00, 0x1c00, 1, OP_AVR1, "0001 11d= dddd ====", OTY_ALBI|OTY_RALL|OTY_CONSTRAINT, "rol", "Rd", "Rotate Left Through Carry", "C <-- Rd(7) <-- Rd(6) ... Rd(1) <-- Rd(0) <-- C", "--H-VNZC", {"1", "1", "1", "1"}, "alias for adc Rd, Rd"}, - {OPCODE_ror, 0xfe0f, 0x9407, 1, OP_AVR1, "1001 010d dddd 0111", OTY_ALBI|OTY_RALL, + {OP_ID(ror), 0xfe0f, 0x9407, 1, OP_AVR1, "1001 010d dddd 0111", OTY_ALBI|OTY_RALL, "ror", "Rd", "Rotate Right Through Carry", "C --> Rd(7) --> Rd(6) ... Rd(1) --> Rd(0) --> C", "----VNZC", {"1", "1", "1", "1"}, ""}, - {OPCODE_asr, 0xfe0f, 0x9405, 1, OP_AVR1, "1001 010d dddd 0101", OTY_ALBI|OTY_RALL, + {OP_ID(asr), 0xfe0f, 0x9405, 1, OP_AVR1, "1001 010d dddd 0101", OTY_ALBI|OTY_RALL, "asr", "Rd", "Arithmetic Shift Right", "Rd(7) --> Rd(7) --> Rd(6) ... Rd(1) --> Rd(0) --> C", "----VNZC", {"1", "1", "1", "1"}, ""}, - {OPCODE_swap, 0xfe0f, 0x9402, 1, OP_AVR1, "1001 010d dddd 0010", OTY_ALBI|OTY_RALL, + {OP_ID(swap), 0xfe0f, 0x9402, 1, OP_AVR1, "1001 010d dddd 0010", OTY_ALBI|OTY_RALL, "swap", "Rd", "Swap Nibbles", "Rd(3..0) <--> Rd(7..4)", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_bset, 0xff8f, 0x9408, 1, OP_AVR1, "1001 0100 0sss 1000", OTY_ALBX, + {OP_ID(bset), 0xff8f, 0x9408, 1, OP_AVR1, "1001 0100 0sss 1000", OTY_ALBX, "bset", "s", "Flag Set", "SREG(s) <-- 1", "SREG-bit", {"1", "1", "1", "1"}, "s = 0-7 = C,Z,N,V,S,H,T,I"}, - {OPCODE_bclr, 0xff8f, 0x9488, 1, OP_AVR1, "1001 0100 1sss 1000", OTY_ALBI, + {OP_ID(bclr), 0xff8f, 0x9488, 1, OP_AVR1, "1001 0100 1sss 1000", OTY_ALBI, "bclr", "s", "Flag Clear", "SREG(s) <-- 0", "SREG-bit", {"1", "1", "1", "1"}, "s = 0-7 = C,Z,N,V,S,H,T,I"}, - {OPCODE_sbi, 0xff00, 0x9a00, 1, OP_AVR1, "1001 1010 AAAA Abbb", OTY_ALBX, + {OP_ID(sbi), 0xff00, 0x9a00, 1, OP_AVR1, "1001 1010 AAAA Abbb", OTY_ALBX, "sbi", "A, b", "Set Bit in I/O Register", "I/O(A,b) <-- 1", "--------", {"2", "1", "1", "1"}, ""}, - {OPCODE_cbi, 0xff00, 0x9800, 1, OP_AVR1, "1001 1000 AAAA Abbb", OTY_ALBX, + {OP_ID(cbi), 0xff00, 0x9800, 1, OP_AVR1, "1001 1000 AAAA Abbb", OTY_ALBX, "cbi", "A, b", "Clear Bit in I/O Register", "I/O(A,b) <-- 0", "--------", {"2", "1", "1", "1"}, ""}, - {OPCODE_bst, 0xfe08, 0xfa00, 1, OP_AVR1, "1111 101r rrrr 0bbb", OTY_ALBI|OTY_RALL, + {OP_ID(bst), 0xfe08, 0xfa00, 1, OP_AVR1, "1111 101r rrrr 0bbb", OTY_ALBI|OTY_RALL, "bst", "Rr, b", "Bit Store from Register to T", "T <-- Rr(b)", "-T------", {"1", "1", "1", "1"}, ""}, - {OPCODE_bld, 0xfe08, 0xf800, 1, OP_AVR1, "1111 100d dddd 0bbb", OTY_ALBI|OTY_RALL, + {OP_ID(bld), 0xfe08, 0xf800, 1, OP_AVR1, "1111 100d dddd 0bbb", OTY_ALBI|OTY_RALL, "bld", "Rd, b", "Bit load from T to Register", "Rd(b) <-- T", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_sec, 0xffff, 0x9408, 1, OP_AVR1, "1001 0100 0000 1000", OTY_ALBI, + {OP_ID(sec), 0xffff, 0x9408, 1, OP_AVR1, "1001 0100 0000 1000", OTY_ALBI, "sec", "-", "Set Carry", "C <-- 1", "-------C", {"1", "1", "1", "1"}, "alias for bset 0"}, - {OPCODE_clc, 0xffff, 0x9488, 1, OP_AVR1, "1001 0100 1000 1000", OTY_ALBI, + {OP_ID(clc), 0xffff, 0x9488, 1, OP_AVR1, "1001 0100 1000 1000", OTY_ALBI, "clc", "-", "Clear Carry", "C <-- 0", "-------C", {"1", "1", "1", "1"}, "alias for bclr 0"}, - {OPCODE_sen, 0xffff, 0x9428, 1, OP_AVR1, "1001 0100 0010 1000", OTY_ALBI, + {OP_ID(sen), 0xffff, 0x9428, 1, OP_AVR1, "1001 0100 0010 1000", OTY_ALBI, "sen", "-", "Set Negative Flag", "N <-- 1", "-----N--", {"1", "1", "1", "1"}, "alias for bset 2"}, - {OPCODE_cln, 0xffff, 0x94a8, 1, OP_AVR1, "1001 0100 1010 1000", OTY_ALBI, + {OP_ID(cln), 0xffff, 0x94a8, 1, OP_AVR1, "1001 0100 1010 1000", OTY_ALBI, "cln", "-", "Clear Negative Flag", "N <-- 0", "-----N--", {"1", "1", "1", "1"}, "alias for bclr 2"}, - {OPCODE_sez, 0xffff, 0x9418, 1, OP_AVR1, "1001 0100 0001 1000", OTY_ALBI, + {OP_ID(sez), 0xffff, 0x9418, 1, OP_AVR1, "1001 0100 0001 1000", OTY_ALBI, "sez", "-", "Set Zero Flag", "Z <-- 1", "------Z-", {"1", "1", "1", "1"}, "alias for bset 1"}, - {OPCODE_clz, 0xffff, 0x9498, 1, OP_AVR1, "1001 0100 1001 1000", OTY_ALBI, + {OP_ID(clz), 0xffff, 0x9498, 1, OP_AVR1, "1001 0100 1001 1000", OTY_ALBI, "clz", "-", "Clear Zero Flag", "Z <-- 0", "------Z-", {"1", "1", "1", "1"}, "alias for bclr 1"}, - {OPCODE_sei, 0xffff, 0x9478, 1, OP_AVR1, "1001 0100 0111 1000", OTY_ALBX, + {OP_ID(sei), 0xffff, 0x9478, 1, OP_AVR1, "1001 0100 0111 1000", OTY_ALBX, "sei", "-", "Global Interrupt Enable", "I <-- 1", "I-------", {"1", "1", "1", "1"}, "alias for bset 7"}, - {OPCODE_cli, 0xffff, 0x94f8, 1, OP_AVR1, "1001 0100 1111 1000", OTY_ALBI, + {OP_ID(cli), 0xffff, 0x94f8, 1, OP_AVR1, "1001 0100 1111 1000", OTY_ALBI, "cli", "-", "Global Interrupt Disable", "I <-- 0", "I-------", {"1", "1", "1", "1"}, "alias for bclr 7"}, - {OPCODE_ses, 0xffff, 0x9448, 1, OP_AVR1, "1001 0100 0100 1000", OTY_ALBI, + {OP_ID(ses), 0xffff, 0x9448, 1, OP_AVR1, "1001 0100 0100 1000", OTY_ALBI, "ses", "-", "Set Signed Test Flag", "S <-- 1", "---S----", {"1", "1", "1", "1"}, "alias for bset 4"}, - {OPCODE_cls, 0xffff, 0x94c8, 1, OP_AVR1, "1001 0100 1100 1000", OTY_ALBI, + {OP_ID(cls), 0xffff, 0x94c8, 1, OP_AVR1, "1001 0100 1100 1000", OTY_ALBI, "cls", "-", "Clear Signed Test Flag", "S <-- 0", "---S----", {"1", "1", "1", "1"}, "alias for bclr 4"}, - {OPCODE_sev, 0xffff, 0x9438, 1, OP_AVR1, "1001 0100 0011 1000", OTY_ALBI, + {OP_ID(sev), 0xffff, 0x9438, 1, OP_AVR1, "1001 0100 0011 1000", OTY_ALBI, "sev", "-", "Set Two's Complement Overflow", "V <-- 1", "----V---", {"1", "1", "1", "1"}, "alias for bset 3"}, - {OPCODE_clv, 0xffff, 0x94b8, 1, OP_AVR1, "1001 0100 1011 1000", OTY_ALBI, + {OP_ID(clv), 0xffff, 0x94b8, 1, OP_AVR1, "1001 0100 1011 1000", OTY_ALBI, "clv", "-", "Clear Two's Complement Overflow", "V <-- 0", "----V---", {"1", "1", "1", "1"}, "alias for bclr 3"}, - {OPCODE_set, 0xffff, 0x9468, 1, OP_AVR1, "1001 0100 0110 1000", OTY_ALBI, + {OP_ID(set), 0xffff, 0x9468, 1, OP_AVR1, "1001 0100 0110 1000", OTY_ALBI, "set", "-", "Set T in SREG", "T <-- 1", "-T------", {"1", "1", "1", "1"}, "alias for bset 6"}, - {OPCODE_clt, 0xffff, 0x94e8, 1, OP_AVR1, "1001 0100 1110 1000", OTY_ALBI, + {OP_ID(clt), 0xffff, 0x94e8, 1, OP_AVR1, "1001 0100 1110 1000", OTY_ALBI, "clt", "-", "Clear T in SREG", "T <-- 0", "-T------", {"1", "1", "1", "1"}, "alias for bclr 6"}, - {OPCODE_seh, 0xffff, 0x9458, 1, OP_AVR1, "1001 0100 0101 1000", OTY_ALBI, + {OP_ID(seh), 0xffff, 0x9458, 1, OP_AVR1, "1001 0100 0101 1000", OTY_ALBI, "seh", "-", "Set Half Carry Flag in SREG", "H <-- 1", "--H-----", {"1", "1", "1", "1"}, "alias for bset 5"}, - {OPCODE_clh, 0xffff, 0x94d8, 1, OP_AVR1, "1001 0100 1101 1000", OTY_ALBI, + {OP_ID(clh), 0xffff, 0x94d8, 1, OP_AVR1, "1001 0100 1101 1000", OTY_ALBI, "clh", "-", "Clear Half Carry Flag in SREG", "H <-- 0", "--H-----", {"1", "1", "1", "1"}, "alias for bclr 5"}, // MCU Control Instructions - {OPCODE_break, 0xffff, 0x9598, 1, OP_AVR1, "1001 0101 1001 1000", OTY_MCUX, + {OP_ID(break), 0xffff, 0x9598, 1, OP_AVR1, "1001 0101 1001 1000", OTY_MCUX, "break", "-", "Break", "(cf documentation)", "--------", {"-", "-", "-", "-"}, "not available on all parts"}, - {OPCODE_nop, 0xffff, 0x0000, 1, OP_AVR1, "0000 0000 0000 0000", OTY_MCUI, + {OP_ID(nop), 0xffff, 0x0000, 1, OP_AVR1, "0000 0000 0000 0000", OTY_MCUI, "nop", "-", "No Operation", "-", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_sleep, 0xffff, 0x9588, 1, OP_AVR1, "1001 0101 1000 1000", OTY_MCUX, + {OP_ID(sleep), 0xffff, 0x9588, 1, OP_AVR1, "1001 0101 1000 1000", OTY_MCUX, "sleep", "-", "Sleep", "(cf documentation)", "--------", {"-", "-", "-", "-"}, ""}, - {OPCODE_wdr, 0xffff, 0x95a8, 1, OP_AVR1, "1001 0101 1010 1000", OTY_MCUI, + {OP_ID(wdr), 0xffff, 0x95a8, 1, OP_AVR1, "1001 0101 1010 1000", OTY_MCUI, "wdr", "-", "Watchdog Reset", "(cf documentation)", "--------", {"1", "1", "1", "1"}, ""}, // Unallocated codes - {OPCODE_x_nop_1, 0xff00, 0x0000, 1, OP_AVR_ILL, "0000 0000 xxxx xxxx", OTY_MCUI, + {OP_ID(u_nop_1), 0xff00, 0x0000, 1, OP_AVR_ILL, "0000 0000 xxxx xxxx", OTY_MCUI, "u/nop", "-", "alt No Operation", "-", "--------", {"1", "1", "1", "1"}, "xxxx xxxx != 0000 0000"}, - {OPCODE_x_nop_2, 0xfe0f, 0x9003, 1, OP_AVR_ILL, "1001 000x xxxx 0011", OTY_MCUI, + {OP_ID(u_nop_2), 0xfe0f, 0x9003, 1, OP_AVR_ILL, "1001 000x xxxx 0011", OTY_MCUI, "u/nop", "-", "alt No Operation", "-", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_x_nop_3, 0xfe0f, 0x9008, 1, OP_AVR_ILL, "1001 000x xxxx 1000", OTY_MCUI, + {OP_ID(u_nop_3), 0xfe0f, 0x9008, 1, OP_AVR_ILL, "1001 000x xxxx 1000", OTY_MCUI, "u/nop", "-", "alt No Operation", "-", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_x_nop_4, 0xfe0f, 0x900b, 1, OP_AVR_ILL, "1001 000x xxxx 1011", OTY_MCUI, + {OP_ID(u_nop_4), 0xfe0f, 0x900b, 1, OP_AVR_ILL, "1001 000x xxxx 1011", OTY_MCUI, "u/nop", "-", "alt No Operation", "-", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_x_nop_5, 0xfe0f, 0x9203, 1, OP_AVR_ILL, "1001 001x xxxx 0011", OTY_MCUI, + {OP_ID(u_nop_5), 0xfe0f, 0x9203, 1, OP_AVR_ILL, "1001 001x xxxx 0011", OTY_MCUI, "u/nop", "-", "alt No Operation", "-", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_x_nop_6, 0xfe0f, 0x9208, 1, OP_AVR_ILL, "1001 001x xxxx 1000", OTY_MCUI, + {OP_ID(u_nop_6), 0xfe0f, 0x9208, 1, OP_AVR_ILL, "1001 001x xxxx 1000", OTY_MCUI, "u/nop", "-", "alt No Operation", "-", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_x_nop_7, 0xfe0f, 0x920b, 1, OP_AVR_ILL, "1001 001x xxxx 1011", OTY_MCUI, + {OP_ID(u_nop_7), 0xfe0f, 0x920b, 1, OP_AVR_ILL, "1001 001x xxxx 1011", OTY_MCUI, "u/nop", "-", "alt No Operation", "-", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_x_icall, 0xff1f, 0x9509, 1, OP_AVR_ILL, "1001 0101 xxx0 1001", OTY_JMPX, + {OP_ID(u_icall), 0xff1f, 0x9509, 1, OP_AVR_ILL, "1001 0101 xxx0 1001", OTY_JMPX, "u/icall", "Z", "alt Indirect Call to (Z)", "PC(15:0) <-- Z, PC(21:16) <-- 0", "--------", {"3/4", "2/3", "2/3", "3"}, "xxx != 000"}, - {OPCODE_x_eicall, 0xff1f, 0x9519, 1, OP_AVR_ILL, "1001 0101 xxx1 1001", OTY_JMPX, + {OP_ID(u_eicall), 0xff1f, 0x9519, 1, OP_AVR_ILL, "1001 0101 xxx1 1001", OTY_JMPX, "u/eicall", "-", "alt Extended Indirect Call to (Z)", "PC(15:0) <-- Z, PC(21:16) <-- EIND", "--------", {"4", "3", "3", "n/a"}, "xxx != 000"}, - {OPCODE_x_ret, 0xff9f, 0x9508, 1, OP_AVR_ILL, "1001 0101 0xx0 1000", OTY_JMPX, + {OP_ID(u_ret), 0xff9f, 0x9508, 1, OP_AVR_ILL, "1001 0101 0xx0 1000", OTY_JMPX, "u/ret", "-", "alt Subroutine Return", "PC <-- STACK", "--------", {"4/5", "4/5", "4/5", "6"}, "xx != 00"}, - {OPCODE_x_reti, 0xff9f, 0x9518, 1, OP_AVR_ILL, "1001 0101 0xx1 1000", OTY_JMPX, + {OP_ID(u_reti), 0xff9f, 0x9518, 1, OP_AVR_ILL, "1001 0101 0xx1 1000", OTY_JMPX, "u/reti", "-", "alt Interrupt Return", "PC <-- STACK", "I-------", {"4/5", "4/5", "4/5", "6"}, "xx != 00"}, - {OPCODE_x_nop_8, 0xffff, 0x95b8, 1, OP_AVR_ILL, "1001 0101 1011 1000", OTY_MCUI, + {OP_ID(u_nop_8), 0xffff, 0x95b8, 1, OP_AVR_ILL, "1001 0101 1011 1000", OTY_MCUI, "u/nop", "-", "alt No Operation", "-", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_x_nop_9, 0xfe0f, 0x9404, 1, OP_AVR_ILL, "1001 010x xxxx 0100", OTY_MCUI, + {OP_ID(u_nop_9), 0xfe0f, 0x9404, 1, OP_AVR_ILL, "1001 010x xxxx 0100", OTY_MCUI, "u/nop", "-", "alt No Operation", "-", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_x_nop_a, 0xff0f, 0x950b, 1, OP_AVR_ILL, "1001 0101 xxxx 1011", OTY_MCUI, + {OP_ID(u_nop_a), 0xff0f, 0x950b, 1, OP_AVR_ILL, "1001 0101 xxxx 1011", OTY_MCUI, "u/nop", "-", "alt No Operation", "-", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_x_ijmp, 0xff1f, 0x9409, 1, OP_AVR_ILL, "1001 0100 xxx0 1001", OTY_JMPI, + {OP_ID(u_ijmp), 0xff1f, 0x9409, 1, OP_AVR_ILL, "1001 0100 xxx0 1001", OTY_JMPI, "u/ijmp", "Z", "alt Indirect Jump to (Z)", "PC(15:0) <-- Z, PC(21:16) <-- 0", "--------", {"2", "2", "2", "2"}, "xxx != 000"}, - {OPCODE_x_eijmp, 0xff1f, 0x9419, 1, OP_AVR_ILL, "1001 0100 xxx1 1001", OTY_JMPI, + {OP_ID(u_eijmp), 0xff1f, 0x9419, 1, OP_AVR_ILL, "1001 0100 xxx1 1001", OTY_JMPI, "u/eijmp", "-", "alt Extended Indirect Jump to (Z)", "PC(15:0) <-- Z, PC(21:16) <-- EIND", "--------", {"2", "2", "2", "n/a"}, "xxx != 000"}, - {OPCODE_x_bld, 0xfe08, 0xf808, 1, OP_AVR_ILL, "1111 100d dddd 1bbb", OTY_ALBI|OTY_RALL, + {OP_ID(u_bld), 0xfe08, 0xf808, 1, OP_AVR_ILL, "1111 100d dddd 1bbb", OTY_ALBI|OTY_RALL, "u/bld", "Rd, b", "alt Bit load from T to Register", "Rd(b) <-- T", "--------", {"1", "1", "1", "1"}, ""}, - {OPCODE_x_bst, 0xfe08, 0xfa08, 1, OP_AVR_ILL, "1111 101r rrrr 1bbb", OTY_ALBI|OTY_RALL, + {OP_ID(u_bst), 0xfe08, 0xfa08, 1, OP_AVR_ILL, "1111 101r rrrr 1bbb", OTY_ALBI|OTY_RALL, "u/bst", "Rr, b", "alt Bit Store from Register to T", "T <-- Rr(b)", "-T------", {"1", "1", "1", "1"}, ""}, - {OPCODE_x_sbrc, 0xfe08, 0xfc08, 1, OP_AVR_ILL, "1111 110r rrrr 1bbb", OTY_SKPI|OTY_RALL, + {OP_ID(u_sbrc), 0xfe08, 0xfc08, 1, OP_AVR_ILL, "1111 110r rrrr 1bbb", OTY_SKPI|OTY_RALL, "u/sbrc", "Rr, b", "alt Skip if Bit in Register Cleared", "if(Rr(b)=0) PC <-- PC + 2/3", "--------", {"1-3", "1-3", "1-3", "1/2"}, ""}, - {OPCODE_x_sbrs, 0xfe08, 0xfe08, 1, OP_AVR_ILL, "1111 111r rrrr 1bbb", OTY_SKPI|OTY_RALL, + {OP_ID(u_sbrs), 0xfe08, 0xfe08, 1, OP_AVR_ILL, "1111 111r rrrr 1bbb", OTY_SKPI|OTY_RALL, "u/sbrs", "Rr, b", "alt Skip if Bit in Register Set", "if(Rr(b)=1) PC <-- PC + 2/3", "--------", {"1-3", "1-3", "1-3", "1/2"}, ""}, }; diff --git a/src/disasm.c b/src/disasm.c index ccd0718a..67f9b79b 100644 --- a/src/disasm.c +++ b/src/disasm.c @@ -420,26 +420,26 @@ int disasm_init(const AVRPART *p) { Register_Opcode(wdr_Callback, "1001 0101 1010 1000", OPCODE_wdr); // Also register unallocated opcodes - Register_Opcode(nop_Callback, "0000 0000 xxxx xxxx", OPCODE_x_nop_1); - Register_Opcode(nop_Callback, "1001 000x xxxx 0011", OPCODE_x_nop_2); - Register_Opcode(nop_Callback, "1001 000x xxxx 1000", OPCODE_x_nop_3); - Register_Opcode(nop_Callback, "1001 000x xxxx 1011", OPCODE_x_nop_4); - Register_Opcode(nop_Callback, "1001 001x xxxx 0011", OPCODE_x_nop_5); - Register_Opcode(nop_Callback, "1001 001x xxxx 1000", OPCODE_x_nop_6); - Register_Opcode(nop_Callback, "1001 001x xxxx 1011", OPCODE_x_nop_7); - Register_Opcode(icall_Callback, "1001 0101 xxx0 1001", OPCODE_x_icall); - Register_Opcode(eicall_Callback, "1001 0101 xxx1 1001", OPCODE_x_eicall); - Register_Opcode(ret_Callback, "1001 0101 0xx0 1000", OPCODE_x_ret); - Register_Opcode(reti_Callback, "1001 0101 0xx1 1000", OPCODE_x_reti); - Register_Opcode(nop_Callback, "1001 0101 1011 1000", OPCODE_x_nop_8); - Register_Opcode(nop_Callback, "1001 010x xxxx 0100", OPCODE_x_nop_9); - Register_Opcode(nop_Callback, "1001 0101 xxxx 1011", OPCODE_x_nop_a); - Register_Opcode(ijmp_Callback, "1001 0100 xxx0 1001", OPCODE_x_ijmp); - Register_Opcode(eijmp_Callback, "1001 0100 xxx1 1001", OPCODE_x_eijmp); - Register_Opcode(bld_Callback, "1111 100d dddd 1bbb", OPCODE_x_bld); - Register_Opcode(bst_Callback, "1111 101d dddd 1bbb", OPCODE_x_bst); - Register_Opcode(sbrc_Callback, "1111 110r rrrr 1bbb", OPCODE_x_sbrc); - Register_Opcode(sbrs_Callback, "1111 111r rrrr 1bbb", OPCODE_x_sbrs); + Register_Opcode(nop_Callback, "0000 0000 xxxx xxxx", OPCODE_u_nop_1); + Register_Opcode(nop_Callback, "1001 000x xxxx 0011", OPCODE_u_nop_2); + Register_Opcode(nop_Callback, "1001 000x xxxx 1000", OPCODE_u_nop_3); + Register_Opcode(nop_Callback, "1001 000x xxxx 1011", OPCODE_u_nop_4); + Register_Opcode(nop_Callback, "1001 001x xxxx 0011", OPCODE_u_nop_5); + Register_Opcode(nop_Callback, "1001 001x xxxx 1000", OPCODE_u_nop_6); + Register_Opcode(nop_Callback, "1001 001x xxxx 1011", OPCODE_u_nop_7); + Register_Opcode(icall_Callback, "1001 0101 xxx0 1001", OPCODE_u_icall); + Register_Opcode(eicall_Callback, "1001 0101 xxx1 1001", OPCODE_u_eicall); + Register_Opcode(ret_Callback, "1001 0101 0xx0 1000", OPCODE_u_ret); + Register_Opcode(reti_Callback, "1001 0101 0xx1 1000", OPCODE_u_reti); + Register_Opcode(nop_Callback, "1001 0101 1011 1000", OPCODE_u_nop_8); + Register_Opcode(nop_Callback, "1001 010x xxxx 0100", OPCODE_u_nop_9); + Register_Opcode(nop_Callback, "1001 0101 xxxx 1011", OPCODE_u_nop_a); + Register_Opcode(ijmp_Callback, "1001 0100 xxx0 1001", OPCODE_u_ijmp); + Register_Opcode(eijmp_Callback, "1001 0100 xxx1 1001", OPCODE_u_eijmp); + Register_Opcode(bld_Callback, "1111 100d dddd 1bbb", OPCODE_u_bld); + Register_Opcode(bst_Callback, "1111 101d dddd 1bbb", OPCODE_u_bst); + Register_Opcode(sbrc_Callback, "1111 110r rrrr 1bbb", OPCODE_u_sbrc); + Register_Opcode(sbrs_Callback, "1111 111r rrrr 1bbb", OPCODE_u_sbrs); qsort(cx->dis_op, cx->dis_n_ops, sizeof(Disasm_opcode), Comparison); diff --git a/src/libavrdude.h b/src/libavrdude.h index 740310e0..b1203a45 100644 --- a/src/libavrdude.h +++ b/src/libavrdude.h @@ -1538,11 +1538,11 @@ typedef enum { OPCODE_ses, OPCODE_cls, OPCODE_sev, OPCODE_clv, OPCODE_set, OPCODE_clt, OPCODE_seh, OPCODE_clh, OPCODE_break, OPCODE_nop, OPCODE_sleep, OPCODE_wdr, - OPCODE_x_nop_1, OPCODE_x_nop_2, OPCODE_x_nop_3, OPCODE_x_nop_4, - OPCODE_x_nop_5, OPCODE_x_nop_6, OPCODE_x_nop_7, OPCODE_x_icall, - OPCODE_x_eicall, OPCODE_x_ret, OPCODE_x_reti, OPCODE_x_nop_8, - OPCODE_x_nop_9, OPCODE_x_nop_a, OPCODE_x_ijmp, OPCODE_x_eijmp, - OPCODE_x_bld, OPCODE_x_bst, OPCODE_x_sbrc, OPCODE_x_sbrs, + OPCODE_u_nop_1, OPCODE_u_nop_2, OPCODE_u_nop_3, OPCODE_u_nop_4, + OPCODE_u_nop_5, OPCODE_u_nop_6, OPCODE_u_nop_7, OPCODE_u_icall, + OPCODE_u_eicall, OPCODE_u_ret, OPCODE_u_reti, OPCODE_u_nop_8, + OPCODE_u_nop_9, OPCODE_u_nop_a, OPCODE_u_ijmp, OPCODE_u_eijmp, + OPCODE_u_bld, OPCODE_u_bst, OPCODE_u_sbrc, OPCODE_u_sbrs, } AVR_opcode; typedef struct { @@ -1615,17 +1615,18 @@ typedef enum { #define OTY_CONSTRAINT 0x2000 // Opcode has constraints: Rr == Rd (tst, clr, lsl, rol) typedef struct { - AVR_opcode mnemo; // OPCODE_add, ... + AVR_opcode mnemo; // Eg, OPCODE_add + const char *idname; // Unique id, eg, "ldx_1" (for error msgs or debugging) int mask, value, nwords; - AVR_archlevel avrlevel; // Eg, OP_AVR1 - const char *bits; // Eg, "0000 11rd dddd rrrr" - int type; // Eg, OTY_ALBI|OTY_RALL + AVR_archlevel avrlevel; // OP_AVR1 + const char *bits; // "0000 11rd dddd rrrr" + int type; // OTY_ALBI|OTY_RALL const char *opcode, // "add" *operands, // "Rd, Rr" *description, // "Add without Carry" *operation, // "Rd <-- Rd + Rr" - *flags, // "Z,C,N,V,S,H" + *flags, // "--HSVNZC" *clock[OP_AVR_cycle_N], // Timings for AVRe, AVRxm, AVRxt and AVRrc *remarks; } AVR_opcode_data;