diff --git a/src/avrintel.c b/src/avrintel.c index 7980b88a..b3f3028b 100644 --- a/src/avrintel.c +++ b/src/avrintel.c @@ -8,8 +8,8 @@ * Published under GNU General Public License, version 3 (GPL-3.0) * Meta-author Stefan Rueger * - * v 1.43 - * 11.03.2025 + * v 1.44 + * 22.03.2025 * */ @@ -138,63 +138,63 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown //mcu_name flstart, flsize, pgsiz, nb, bootsz, eestart, eesize, ep, rambeg, ramsiz, // Mem //mcu_name nf, nl, ni, isr_names, nc, cfg_table, // ISRs, Config //mcu_name nr, rgftab_table, nu, uartparams, // Register file, UART - //mcu_name np, ports_list}, // Ports + //mcu_name np, ports_list, wdt_type}, // Ports, WDT //ATtiny4 atdf, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"ATtiny4", 0, F_AVR8L, {0x1E, 0x8F, 0x0A}, // ID /*ATtiny4*/ 0, 0x00200, 0x010, 0, 0, 0, 0, 0, 0x0040, 0x0020, // Mem /*ATtiny4*/ 1, 1, 10, vtab_attiny9, 4, cfgtab_attiny4, // ISRs, Config /*ATtiny4*/ 36, rgftab_attiny4, 0, UART_NONE, // Register file, UART - /*ATtiny4*/ 1, ports_attiny4}, // Ports + /*ATtiny4*/ 1, ports_attiny4, WDT_CLASSIC4}, // Ports, WDT //ATtiny5 atdf, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"ATtiny5", 1, F_AVR8L, {0x1E, 0x8F, 0x09}, // ID /*ATtiny5*/ 0, 0x00200, 0x010, 0, 0, 0, 0, 0, 0x0040, 0x0020, // Mem /*ATtiny5*/ 1, 1, 11, vtab_attiny10, 4, cfgtab_attiny4, // ISRs, Config /*ATtiny5*/ 41, rgftab_attiny5, 0, UART_NONE, // Register file, UART - /*ATtiny5*/ 1, ports_attiny4}, // Ports + /*ATtiny5*/ 1, ports_attiny4, WDT_CLASSIC4}, // Ports, WDT //ATtiny9 atdf, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"ATtiny9", 2, F_AVR8L, {0x1E, 0x90, 0x08}, // ID /*ATtiny9*/ 0, 0x00400, 0x010, 0, 0, 0, 0, 0, 0x0040, 0x0020, // Mem /*ATtiny9*/ 1, 1, 10, vtab_attiny9, 4, cfgtab_attiny4, // ISRs, Config /*ATtiny9*/ 36, rgftab_attiny4, 0, UART_NONE, // Register file, UART - /*ATtiny9*/ 1, ports_attiny4}, // Ports + /*ATtiny9*/ 1, ports_attiny4, WDT_CLASSIC4}, // Ports, WDT //ATtiny10 atdf, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"ATtiny10", 3, F_AVR8L, {0x1E, 0x90, 0x03}, // ID /*ATtiny10*/ 0, 0x00400, 0x010, 0, 0, 0, 0, 0, 0x0040, 0x0020, // Mem /*ATtiny10*/ 1, 1, 11, vtab_attiny10, 4, cfgtab_attiny4, // ISRs, Config /*ATtiny10*/ 41, rgftab_attiny5, 0, UART_NONE, // Register file, UART - /*ATtiny10*/ 1, ports_attiny4}, // Ports + /*ATtiny10*/ 1, ports_attiny4, WDT_CLASSIC4}, // Ports, WDT //ATtiny20 atdf, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"ATtiny20", 4, F_AVR8L, {0x1E, 0x91, 0x0F}, // ID /*ATtiny20*/ 0, 0x00800, 0x020, 0, 0, 0, 0, 0, 0x0040, 0x0080, // Mem /*ATtiny20*/ 1, 1, 17, vtab_attiny20, 5, cfgtab_attiny20, // ISRs, Config /*ATtiny20*/ 61, rgftab_attiny20, 0, UART_NONE, // Register file, UART - /*ATtiny20*/ 2, ports_attiny20}, // Ports + /*ATtiny20*/ 2, ports_attiny20, WDT_CLASSIC4}, // Ports, WDT //ATtiny40 atdf, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"ATtiny40", 5, F_AVR8L, {0x1E, 0x92, 0x0E}, // ID /*ATtiny40*/ 0, 0x01000, 0x040, 0, 0, 0, 0, 0, 0x0040, 0x0100, // Mem /*ATtiny40*/ 1, 1, 18, vtab_attiny40, 5, cfgtab_attiny20, // ISRs, Config /*ATtiny40*/ 63, rgftab_attiny40, 0, UART_NONE, // Register file, UART - /*ATtiny40*/ 3, ports_attiny40}, // Ports + /*ATtiny40*/ 3, ports_attiny40, WDT_CLASSIC4}, // Ports, WDT //ATtiny102 atdf, avrdude, boot size (manual) // Sources {"ATtiny102", 6, F_AVR8L, {0x1E, 0x90, 0x0C}, // ID /*ATtiny102*/ 0, 0x00400, 0x010, 0, 0, 0, 0, 0, 0x0040, 0x0020, // Mem /*ATtiny102*/ 1, 1, 16, vtab_attiny104, 5, cfgtab_attiny102, // ISRs, Config /*ATtiny102*/ 55, rgftab_attiny102, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATtiny102*/ 2, ports_attiny102}, // Ports + /*ATtiny102*/ 2, ports_attiny102, WDT_CLASSIC4}, // Ports, WDT //ATtiny104 atdf, avrdude, boot size (manual) // Sources {"ATtiny104", 7, F_AVR8L, {0x1E, 0x90, 0x0B}, // ID /*ATtiny104*/ 0, 0x00400, 0x010, 0, 0, 0, 0, 0, 0x0040, 0x0020, // Mem /*ATtiny104*/ 1, 1, 16, vtab_attiny104, 5, cfgtab_attiny102, // ISRs, Config /*ATtiny104*/ 55, rgftab_attiny102, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATtiny104*/ 2, ports_attiny104}, // Ports + /*ATtiny104*/ 2, ports_attiny104, WDT_CLASSIC4}, // Ports, WDT //ATtiny11 atdf, avr-gcc 12.2.0, avrdude // Sources @@ -202,1610 +202,1610 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown /*ATtiny11*/ 0, 0x00400, 0x001, 0, 0, 0, 0, 0, 0x0060, 0x0020, // Mem /*ATtiny11*/ 1, 1, 5, vtab_attiny11, 4, cfgtab_attiny11, // ISRs, Config /*ATtiny11*/ 14, rgftab_attiny11, 0, UART_NONE, // Register file, UART - /*ATtiny11*/ 1, ports_attiny11}, // Ports + /*ATtiny11*/ 1, ports_attiny11, WDT_CLASSIC3}, // Ports, WDT //ATtiny12 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny12", 9, F_AVR8, {0x1E, 0x90, 0x05}, // ID /*ATtiny12*/ 0, 0x00400, 0x001, 0, 0, 0, 0x0040, 2, 0x0060, 0x0020, // Mem /*ATtiny12*/ 1, 1, 6, vtab_attiny12, 6, cfgtab_attiny12, // ISRs, Config /*ATtiny12*/ 18, rgftab_attiny12, 0, UART_NONE, // Register file, UART - /*ATtiny12*/ 1, ports_attiny11}, // Ports + /*ATtiny12*/ 1, ports_attiny11, WDT_CLASSIC3}, // Ports, WDT //ATtiny13 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny13", 10, F_AVR8, {0x1E, 0x90, 0x07}, // ID /*ATtiny13*/ 0, 0x00400, 0x020, 0, 0, 0, 0x0040, 4, 0x0060, 0x0040, // Mem /*ATtiny13*/ 2, 1, 10, vtab_attiny13a, 10, cfgtab_attiny13, // ISRs, Config /*ATtiny13*/ 35, rgftab_attiny13, 0, UART_NONE, // Register file, UART - /*ATtiny13*/ 1, ports_attiny13}, // Ports + /*ATtiny13*/ 1, ports_attiny13, WDT_CLASSIC4}, // Ports, WDT //ATtiny13A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny13A", 11, F_AVR8, {0x1E, 0x90, 0x07}, // ID /*ATtiny13A*/ 0, 0x00400, 0x020, 0, 0, 0, 0x0040, 4, 0x0060, 0x0040, // Mem /*ATtiny13A*/ 2, 1, 10, vtab_attiny13a, 10, cfgtab_attiny13, // ISRs, Config /*ATtiny13A*/ 37, rgftab_attiny13a, 0, UART_NONE, // Register file, UART - /*ATtiny13A*/ 1, ports_attiny13}, // Ports + /*ATtiny13A*/ 1, ports_attiny13, WDT_CLASSIC4}, // Ports, WDT //ATtiny15 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny15", 12, F_AVR8, {0x1E, 0x90, 0x06}, // ID /*ATtiny15*/ 0, 0x00400, 0x001, 0, 0, 0, 0x0040, 2, 0x0060, 0x0020, // Mem /*ATtiny15*/ 1, 1, 9, vtab_attiny15, 6, cfgtab_attiny15, // ISRs, Config /*ATtiny15*/ 28, rgftab_attiny15, 0, UART_NONE, // Register file, UART - /*ATtiny15*/ 1, ports_attiny11}, // Ports + /*ATtiny15*/ 1, ports_attiny11, WDT_CLASSIC3}, // Ports, WDT //ATtiny22 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"ATtiny22", 13, F_AVR8, {0x1E, 0x91, 0x06}, // ID /*ATtiny22*/ 0, 0x00800, 0x001, 0, 0, 0, 0x0080, 1, 0x0060, 0x0080, // Mem /*ATtiny22*/ 1, 1, 3, vtab_attiny22, 3, cfgtab_attiny22, // ISRs, Config /*ATtiny22*/ 0, NULL, 0, UART_NONE, // Register file, UART - /*ATtiny22*/ 1, ports_attiny22}, // Ports + /*ATtiny22*/ 1, ports_attiny22, WDT_CLASSIC3}, // Ports, WDT //ATtiny24 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny24", 14, F_AVR8, {0x1E, 0x91, 0x0B}, // ID /*ATtiny24*/ 0, 0x00800, 0x020, 0, 0, 0, 0x0080, 4, 0x0060, 0x0080, // Mem /*ATtiny24*/ 3, 1, 17, vtab_attiny84a, 11, cfgtab_attiny24, // ISRs, Config /*ATtiny24*/ 55, rgftab_attiny24, 0, UART_NONE, // Register file, UART - /*ATtiny24*/ 2, ports_attiny441}, // Ports + /*ATtiny24*/ 2, ports_attiny441, WDT_CLASSIC4}, // Ports, WDT //ATtiny24A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny24A", 15, F_AVR8, {0x1E, 0x91, 0x0B}, // ID /*ATtiny24A*/ 0, 0x00800, 0x020, 0, 0, 0, 0x0080, 4, 0x0060, 0x0080, // Mem /*ATtiny24A*/ 3, 1, 17, vtab_attiny84a, 11, cfgtab_attiny24, // ISRs, Config /*ATtiny24A*/ 55, rgftab_attiny24, 0, UART_NONE, // Register file, UART - /*ATtiny24A*/ 2, ports_attiny441}, // Ports + /*ATtiny24A*/ 2, ports_attiny441, WDT_CLASSIC4}, // Ports, WDT //ATtiny25 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny25", 16, F_AVR8, {0x1E, 0x91, 0x08}, // ID /*ATtiny25*/ 0, 0x00800, 0x020, 0, 0, 0, 0x0080, 4, 0x0060, 0x0080, // Mem /*ATtiny25*/ 3, 1, 15, vtab_attiny85, 11, cfgtab_attiny25, // ISRs, Config /*ATtiny25*/ 55, rgftab_attiny25, 0, UART_NONE, // Register file, UART - /*ATtiny25*/ 1, ports_attiny13}, // Ports + /*ATtiny25*/ 1, ports_attiny13, WDT_CLASSIC4}, // Ports, WDT //ATtiny26 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny26", 17, F_AVR8, {0x1E, 0x91, 0x09}, // ID /*ATtiny26*/ 0, 0x00800, 0x020, 0, 0, 0, 0x0080, 4, 0x0060, 0x0080, // Mem /*ATtiny26*/ 2, 1, 12, vtab_attiny26, 8, cfgtab_attiny26, // ISRs, Config /*ATtiny26*/ 37, rgftab_attiny26, 0, UART_NONE, // Register file, UART - /*ATtiny26*/ 2, ports_attiny26}, // Ports + /*ATtiny26*/ 2, ports_attiny26, WDT_CLASSIC3}, // Ports, WDT //ATtiny28 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny28", 18, F_AVR8, {0x1E, 0x91, 0x07}, // ID /*ATtiny28*/ 0, 0x00800, 0x002, 0, 0, 0, 0, 0, 0x0060, 0x0020, // Mem /*ATtiny28*/ 1, 1, 6, vtab_attiny28, 3, cfgtab_attiny28, // ISRs, Config /*ATtiny28*/ 20, rgftab_attiny28, 0, UART_NONE, // Register file, UART - /*ATtiny28*/ 3, ports_attiny28}, // Ports + /*ATtiny28*/ 3, ports_attiny28, WDT_CLASSIC3}, // Ports, WDT //ATtiny43U atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny43U", 19, F_AVR8, {0x1E, 0x92, 0x0C}, // ID /*ATtiny43U*/ 0, 0x01000, 0x040, 0, 0, 0, 0x0040, 4, 0x0060, 0x0100, // Mem /*ATtiny43U*/ 3, 1, 16, vtab_attiny43u, 11, cfgtab_attiny43u, // ISRs, Config /*ATtiny43U*/ 54, rgftab_attiny43u, 0, UART_NONE, // Register file, UART - /*ATtiny43U*/ 2, ports_attiny26}, // Ports + /*ATtiny43U*/ 2, ports_attiny26, WDT_CLASSIC4}, // Ports, WDT //ATtiny44 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny44", 20, F_AVR8, {0x1E, 0x92, 0x07}, // ID /*ATtiny44*/ 0, 0x01000, 0x040, 0, 0, 0, 0x0100, 4, 0x0060, 0x0100, // Mem /*ATtiny44*/ 3, 1, 17, vtab_attiny84a, 11, cfgtab_attiny24, // ISRs, Config /*ATtiny44*/ 55, rgftab_attiny44, 0, UART_NONE, // Register file, UART - /*ATtiny44*/ 2, ports_attiny441}, // Ports + /*ATtiny44*/ 2, ports_attiny441, WDT_CLASSIC4}, // Ports, WDT //ATtiny44A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny44A", 21, F_AVR8, {0x1E, 0x92, 0x07}, // ID /*ATtiny44A*/ 0, 0x01000, 0x040, 0, 0, 0, 0x0100, 4, 0x0060, 0x0100, // Mem /*ATtiny44A*/ 3, 1, 17, vtab_attiny84a, 11, cfgtab_attiny24, // ISRs, Config /*ATtiny44A*/ 55, rgftab_attiny44, 0, UART_NONE, // Register file, UART - /*ATtiny44A*/ 2, ports_attiny441}, // Ports + /*ATtiny44A*/ 2, ports_attiny441, WDT_CLASSIC4}, // Ports, WDT //ATtiny45 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny45", 22, F_AVR8, {0x1E, 0x92, 0x06}, // ID /*ATtiny45*/ 0, 0x01000, 0x040, 0, 0, 0, 0x0100, 4, 0x0060, 0x0100, // Mem /*ATtiny45*/ 3, 1, 15, vtab_attiny85, 11, cfgtab_attiny25, // ISRs, Config /*ATtiny45*/ 55, rgftab_attiny45, 0, UART_NONE, // Register file, UART - /*ATtiny45*/ 1, ports_attiny13}, // Ports + /*ATtiny45*/ 1, ports_attiny13, WDT_CLASSIC4}, // Ports, WDT //ATtiny48 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny48", 23, F_AVR8, {0x1E, 0x92, 0x09}, // ID /*ATtiny48*/ 0, 0x01000, 0x040, 0, 0, 0, 0x0040, 4, 0x0100, 0x0100, // Mem /*ATtiny48*/ 3, 1, 20, vtab_attiny88, 11, cfgtab_attiny48, // ISRs, Config /*ATtiny48*/ 74, rgftab_attiny48, 0, UART_NONE, // Register file, UART - /*ATtiny48*/ 4, ports_attiny48}, // Ports + /*ATtiny48*/ 4, ports_attiny48, WDT_CLASSIC4}, // Ports, WDT //ATtiny84 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny84", 24, F_AVR8, {0x1E, 0x93, 0x0C}, // ID /*ATtiny84*/ 0, 0x02000, 0x040, 0, 0, 0, 0x0200, 4, 0x0060, 0x0200, // Mem /*ATtiny84*/ 3, 1, 17, vtab_attiny84a, 11, cfgtab_attiny24, // ISRs, Config /*ATtiny84*/ 55, rgftab_attiny84, 0, UART_NONE, // Register file, UART - /*ATtiny84*/ 2, ports_attiny441}, // Ports + /*ATtiny84*/ 2, ports_attiny441, WDT_CLASSIC4}, // Ports, WDT //ATtiny84A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny84A", 25, F_AVR8, {0x1E, 0x93, 0x0C}, // ID /*ATtiny84A*/ 0, 0x02000, 0x040, 0, 0, 0, 0x0200, 4, 0x0060, 0x0200, // Mem /*ATtiny84A*/ 3, 1, 17, vtab_attiny84a, 11, cfgtab_attiny24, // ISRs, Config /*ATtiny84A*/ 55, rgftab_attiny84, 0, UART_NONE, // Register file, UART - /*ATtiny84A*/ 2, ports_attiny441}, // Ports + /*ATtiny84A*/ 2, ports_attiny441, WDT_CLASSIC4}, // Ports, WDT //ATtiny85 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny85", 26, F_AVR8, {0x1E, 0x93, 0x0B}, // ID /*ATtiny85*/ 0, 0x02000, 0x040, 0, 0, 0, 0x0200, 4, 0x0060, 0x0200, // Mem /*ATtiny85*/ 3, 1, 15, vtab_attiny85, 11, cfgtab_attiny25, // ISRs, Config /*ATtiny85*/ 55, rgftab_attiny45, 0, UART_NONE, // Register file, UART - /*ATtiny85*/ 1, ports_attiny13}, // Ports + /*ATtiny85*/ 1, ports_attiny13, WDT_CLASSIC4}, // Ports, WDT //ATtiny87 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny87", 27, F_AVR8, {0x1E, 0x93, 0x87}, // ID /*ATtiny87*/ 0, 0x02000, 0x080, 0, 0, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*ATtiny87*/ 3, 1, 20, vtab_attiny167, 11, cfgtab_attiny87, // ISRs, Config /*ATtiny87*/ 80, rgftab_attiny87, 1, UART_LIN, // Register file, UART - /*ATtiny87*/ 2, ports_attiny87}, // Ports + /*ATtiny87*/ 2, ports_attiny87, WDT_CLASSIC4}, // Ports, WDT //ATtiny88 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny88", 28, F_AVR8, {0x1E, 0x93, 0x11}, // ID /*ATtiny88*/ 0, 0x02000, 0x040, 0, 0, 0, 0x0040, 4, 0x0100, 0x0200, // Mem /*ATtiny88*/ 3, 1, 20, vtab_attiny88, 11, cfgtab_attiny48, // ISRs, Config /*ATtiny88*/ 74, rgftab_attiny88, 0, UART_NONE, // Register file, UART - /*ATtiny88*/ 4, ports_attiny48}, // Ports + /*ATtiny88*/ 4, ports_attiny48, WDT_CLASSIC4}, // Ports, WDT //ATtiny167 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny167", 29, F_AVR8, {0x1E, 0x94, 0x87}, // ID /*ATtiny167*/ 0, 0x04000, 0x080, 0, 0, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*ATtiny167*/ 3, 1, 20, vtab_attiny167, 11, cfgtab_attiny87, // ISRs, Config /*ATtiny167*/ 80, rgftab_attiny87, 1, UART_LIN, // Register file, UART - /*ATtiny167*/ 2, ports_attiny87}, // Ports + /*ATtiny167*/ 2, ports_attiny87, WDT_CLASSIC4}, // Ports, WDT //ATtiny261 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny261", 30, F_AVR8, {0x1E, 0x91, 0x0C}, // ID /*ATtiny261*/ 0, 0x00800, 0x020, 0, 0, 0, 0x0080, 4, 0x0060, 0x0080, // Mem /*ATtiny261*/ 3, 1, 19, vtab_attiny861a, 11, cfgtab_attiny43u, // ISRs, Config /*ATtiny261*/ 63, rgftab_attiny261, 0, UART_NONE, // Register file, UART - /*ATtiny261*/ 2, ports_attiny26}, // Ports + /*ATtiny261*/ 2, ports_attiny26, WDT_CLASSIC4}, // Ports, WDT //ATtiny261A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny261A", 31, F_AVR8, {0x1E, 0x91, 0x0C}, // ID /*ATtiny261A*/ 0, 0x00800, 0x020, 0, 0, 0, 0x0080, 4, 0x0060, 0x0080, // Mem /*ATtiny261A*/ 3, 1, 19, vtab_attiny861a, 11, cfgtab_attiny43u, // ISRs, Config /*ATtiny261A*/ 63, rgftab_attiny261, 0, UART_NONE, // Register file, UART - /*ATtiny261A*/ 2, ports_attiny26}, // Ports + /*ATtiny261A*/ 2, ports_attiny26, WDT_CLASSIC4}, // Ports, WDT //ATtiny441 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny441", 32, F_AVR8, {0x1E, 0x92, 0x15}, // ID /*ATtiny441*/ 0, 0x01000, 0x010, 0, 0, 0, 0x0100, 4, 0x0100, 0x0100, // Mem /*ATtiny441*/ 3, 1, 30, vtab_attiny841, 14, cfgtab_attiny441, // ISRs, Config /*ATtiny441*/ 101, rgftab_attiny441, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATtiny441*/ 2, ports_attiny441}, // Ports + /*ATtiny441*/ 2, ports_attiny441, WDT_CLASSIC4}, // Ports, WDT //ATtiny461 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny461", 33, F_AVR8, {0x1E, 0x92, 0x08}, // ID /*ATtiny461*/ 0, 0x01000, 0x040, 0, 0, 0, 0x0100, 4, 0x0060, 0x0100, // Mem /*ATtiny461*/ 3, 1, 19, vtab_attiny861a, 11, cfgtab_attiny43u, // ISRs, Config /*ATtiny461*/ 63, rgftab_attiny461, 0, UART_NONE, // Register file, UART - /*ATtiny461*/ 2, ports_attiny26}, // Ports + /*ATtiny461*/ 2, ports_attiny26, WDT_CLASSIC4}, // Ports, WDT //ATtiny461A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny461A", 34, F_AVR8, {0x1E, 0x92, 0x08}, // ID /*ATtiny461A*/ 0, 0x01000, 0x040, 0, 0, 0, 0x0100, 4, 0x0060, 0x0100, // Mem /*ATtiny461A*/ 3, 1, 19, vtab_attiny861a, 11, cfgtab_attiny43u, // ISRs, Config /*ATtiny461A*/ 63, rgftab_attiny461, 0, UART_NONE, // Register file, UART - /*ATtiny461A*/ 2, ports_attiny26}, // Ports + /*ATtiny461A*/ 2, ports_attiny26, WDT_CLASSIC4}, // Ports, WDT //ATtiny828 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny828", 35, F_AVR8, {0x1E, 0x93, 0x14}, // ID /*ATtiny828*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0100, 4, 0x0100, 0x0200, // Mem /*ATtiny828*/ 3, 1, 26, vtab_attiny828r, 16, cfgtab_attiny828, // ISRs, Config /*ATtiny828*/ 94, rgftab_attiny828, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATtiny828*/ 4, ports_attiny828}, // Ports + /*ATtiny828*/ 4, ports_attiny828, WDT_CLASSIC4}, // Ports, WDT //ATtiny828R avrdude, from ATtiny828 // Sources {"ATtiny828R", 36, F_AVR8, {0x1E, 0x93, 0x14}, // ID /*ATtiny828R*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0100, 4, 0x0100, 0x0200, // Mem /*ATtiny828R*/ 3, 1, 26, vtab_attiny828r, 16, cfgtab_attiny828, // ISRs, Config /*ATtiny828R*/ 94, rgftab_attiny828, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATtiny828R*/ 4, ports_attiny828}, // Ports + /*ATtiny828R*/ 4, ports_attiny828, WDT_CLASSIC4}, // Ports, WDT //ATtiny841 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny841", 37, F_AVR8, {0x1E, 0x93, 0x15}, // ID /*ATtiny841*/ 0, 0x02000, 0x010, 0, 0, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*ATtiny841*/ 3, 1, 30, vtab_attiny841, 14, cfgtab_attiny441, // ISRs, Config /*ATtiny841*/ 101, rgftab_attiny441, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATtiny841*/ 2, ports_attiny441}, // Ports + /*ATtiny841*/ 2, ports_attiny441, WDT_CLASSIC4}, // Ports, WDT //ATtiny861 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny861", 38, F_AVR8, {0x1E, 0x93, 0x0D}, // ID /*ATtiny861*/ 0, 0x02000, 0x040, 0, 0, 0, 0x0200, 4, 0x0060, 0x0200, // Mem /*ATtiny861*/ 3, 1, 19, vtab_attiny861a, 11, cfgtab_attiny43u, // ISRs, Config /*ATtiny861*/ 63, rgftab_attiny861, 0, UART_NONE, // Register file, UART - /*ATtiny861*/ 2, ports_attiny26}, // Ports + /*ATtiny861*/ 2, ports_attiny26, WDT_CLASSIC4}, // Ports, WDT //ATtiny861A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny861A", 39, F_AVR8, {0x1E, 0x93, 0x0D}, // ID /*ATtiny861A*/ 0, 0x02000, 0x040, 0, 0, 0, 0x0200, 4, 0x0060, 0x0200, // Mem /*ATtiny861A*/ 3, 1, 19, vtab_attiny861a, 11, cfgtab_attiny43u, // ISRs, Config /*ATtiny861A*/ 63, rgftab_attiny861, 0, UART_NONE, // Register file, UART - /*ATtiny861A*/ 2, ports_attiny26}, // Ports + /*ATtiny861A*/ 2, ports_attiny26, WDT_CLASSIC4}, // Ports, WDT //ATtiny1634 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny1634", 40, F_AVR8, {0x1E, 0x94, 0x12}, // ID /*ATtiny1634*/ 0, 0x04000, 0x020, 0, 0, 0, 0x0100, 4, 0x0100, 0x0400, // Mem /*ATtiny1634*/ 3, 1, 28, vtab_attiny1634r, 13, cfgtab_attiny1634, // ISRs, Config /*ATtiny1634*/ 89, rgftab_attiny1634, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATtiny1634*/ 3, ports_attiny1634}, // Ports + /*ATtiny1634*/ 3, ports_attiny1634, WDT_CLASSIC4}, // Ports, WDT //ATtiny1634R avrdude, from ATtiny1634 // Sources {"ATtiny1634R", 41, F_AVR8, {0x1E, 0x94, 0x12}, // ID /*ATtiny1634R*/ 0, 0x04000, 0x020, 0, 0, 0, 0x0100, 4, 0x0100, 0x0400, // Mem /*ATtiny1634R*/ 3, 1, 28, vtab_attiny1634r, 13, cfgtab_attiny1634, // ISRs, Config /*ATtiny1634R*/ 89, rgftab_attiny1634, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATtiny1634R*/ 3, ports_attiny1634}, // Ports + /*ATtiny1634R*/ 3, ports_attiny1634, WDT_CLASSIC4}, // Ports, WDT //ATtiny2313 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny2313", 42, F_AVR8, {0x1E, 0x91, 0x0A}, // ID /*ATtiny2313*/ 0, 0x00800, 0x020, 0, 0, 0, 0x0080, 4, 0x0060, 0x0080, // Mem /*ATtiny2313*/ 3, 1, 19, vtab_attiny2313, 11, cfgtab_attiny2313, // ISRs, Config /*ATtiny2313*/ 54, rgftab_attiny2313, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATtiny2313*/ 3, ports_attiny2313}, // Ports + /*ATtiny2313*/ 3, ports_attiny2313, WDT_CLASSIC4}, // Ports, WDT //ATtiny2313A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny2313A", 43, F_AVR8, {0x1E, 0x91, 0x0A}, // ID /*ATtiny2313A*/ 0, 0x00800, 0x020, 0, 0, 0, 0x0080, 4, 0x0060, 0x0080, // Mem /*ATtiny2313A*/ 3, 1, 21, vtab_attiny4313, 11, cfgtab_attiny2313a, // ISRs, Config /*ATtiny2313A*/ 58, rgftab_attiny2313a, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATtiny2313A*/ 3, ports_attiny2313}, // Ports + /*ATtiny2313A*/ 3, ports_attiny2313, WDT_CLASSIC4}, // Ports, WDT //ATtiny4313 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny4313", 44, F_AVR8, {0x1E, 0x92, 0x0D}, // ID /*ATtiny4313*/ 0, 0x01000, 0x040, 0, 0, 0, 0x0100, 4, 0x0060, 0x0100, // Mem /*ATtiny4313*/ 3, 1, 21, vtab_attiny4313, 11, cfgtab_attiny2313a, // ISRs, Config /*ATtiny4313*/ 58, rgftab_attiny4313, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATtiny4313*/ 3, ports_attiny2313}, // Ports + /*ATtiny4313*/ 3, ports_attiny2313, WDT_CLASSIC4}, // Ports, WDT //ATmega8 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega8", 45, F_AVR8, {0x1E, 0x93, 0x07}, // ID /*ATmega8*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0060, 0x0400, // Mem /*ATmega8*/ 2, 1, 19, vtab_atmega8a, 13, cfgtab_atmega8, // ISRs, Config /*ATmega8*/ 61, rgftab_atmega8, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega8*/ 3, ports_atmega8}, // Ports + /*ATmega8*/ 3, ports_atmega8, WDT_CLASSIC3}, // Ports, WDT //ATmega8A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega8A", 46, F_AVR8, {0x1E, 0x93, 0x07}, // ID /*ATmega8A*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0060, 0x0400, // Mem /*ATmega8A*/ 2, 1, 19, vtab_atmega8a, 13, cfgtab_atmega8, // ISRs, Config /*ATmega8A*/ 61, rgftab_atmega8, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega8A*/ 3, ports_atmega8}, // Ports + /*ATmega8A*/ 3, ports_atmega8, WDT_CLASSIC3}, // Ports, WDT //ATmega8HVA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega8HVA", 47, F_AVR8, {0x1E, 0x93, 0x10}, // ID /*ATmega8HVA*/ 0, 0x02000, 0x080, 0, 0, 0, 0x0100, 4, 0x0100, 0x0200, // Mem /*ATmega8HVA*/ 1, 1, 21, vtab_atmega16hva, 7, cfgtab_atmega8hva, // ISRs, Config /*ATmega8HVA*/ 74, rgftab_atmega8hva, 0, UART_NONE, // Register file, UART - /*ATmega8HVA*/ 3, ports_atmega16hva2}, // Ports + /*ATmega8HVA*/ 3, ports_atmega16hva2, WDT_CLASSIC4}, // Ports, WDT //ATmega8U2 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega8U2", 48, F_AVR8, {0x1E, 0x93, 0x89}, // ID /*ATmega8U2*/ 0, 0x02000, 0x080, 4, 0x0200, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*ATmega8U2*/ 3, 1, 29, vtab_atmega32u2, 15, cfgtab_atmega8u2, // ISRs, Config /*ATmega8U2*/ 92, rgftab_atmega8u2, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega8U2*/ 3, ports_at90usb162}, // Ports + /*ATmega8U2*/ 3, ports_at90usb162, WDT_CLASSIC4}, // Ports, WDT //ATmega16 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega16", 49, F_AVR8, {0x1E, 0x94, 0x03}, // ID /*ATmega16*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0060, 0x0400, // Mem /*ATmega16*/ 2, 1, 21, vtab_atmega16a, 13, cfgtab_atmega16, // ISRs, Config /*ATmega16*/ 70, rgftab_atmega16, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega16*/ 4, ports_atmega16}, // Ports + /*ATmega16*/ 4, ports_atmega16, WDT_CLASSIC3}, // Ports, WDT //ATmega16A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega16A", 50, F_AVR8, {0x1E, 0x94, 0x03}, // ID /*ATmega16A*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0060, 0x0400, // Mem /*ATmega16A*/ 2, 1, 21, vtab_atmega16a, 13, cfgtab_atmega16, // ISRs, Config /*ATmega16A*/ 70, rgftab_atmega16a, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega16A*/ 4, ports_atmega16}, // Ports + /*ATmega16A*/ 4, ports_atmega16, WDT_CLASSIC3}, // Ports, WDT //ATmega16HVA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega16HVA", 51, F_AVR8, {0x1E, 0x94, 0x0C}, // ID /*ATmega16HVA*/ 0, 0x04000, 0x080, 0, 0, 0, 0x0100, 4, 0x0100, 0x0200, // Mem /*ATmega16HVA*/ 1, 1, 21, vtab_atmega16hva, 7, cfgtab_atmega8hva, // ISRs, Config /*ATmega16HVA*/ 74, rgftab_atmega8hva, 0, UART_NONE, // Register file, UART - /*ATmega16HVA*/ 3, ports_atmega16hva2}, // Ports + /*ATmega16HVA*/ 3, ports_atmega16hva2, WDT_CLASSIC4}, // Ports, WDT //ATmega16HVB atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega16HVB", 52, F_AVR8, {0x1E, 0x94, 0x0D}, // ID /*ATmega16HVB*/ 0, 0x04000, 0x080, 4, 0x0200, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega16HVB*/ 2, 1, 29, vtab_atmega32hvbrevb, 12, cfgtab_atmega16hvb, // ISRs, Config /*ATmega16HVB*/ 91, rgftab_atmega32hvbrevb, 0, UART_NONE, // Register file, UART - /*ATmega16HVB*/ 3, ports_atmega32hvbrevb}, // Ports + /*ATmega16HVB*/ 3, ports_atmega32hvbrevb, WDT_CLASSIC4}, // Ports, WDT //ATmega16HVBrevB atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega16HVBrevB", 53, F_AVR8, {0x1E, 0x94, 0x0D}, // ID /*ATmega16HVBrevB*/ 0, 0x04000, 0x080, 4, 0x0200, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega16HVBrevB*/ 2, 1, 29, vtab_atmega32hvbrevb, 12, cfgtab_atmega16hvbrevb, // ISRs, Config /*ATmega16HVBrevB*/ 91, rgftab_atmega32hvbrevb, 0, UART_NONE, // Register file, UART - /*ATmega16HVBrevB*/ 3, ports_atmega32hvbrevb}, // Ports + /*ATmega16HVBrevB*/ 3, ports_atmega32hvbrevb, WDT_CLASSIC4}, // Ports, WDT //ATmega16M1 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega16M1", 54, F_AVR8, {0x1E, 0x94, 0x84}, // ID /*ATmega16M1*/ 0, 0x04000, 0x080, 4, 0x0200, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega16M1*/ 3, 1, 31, vtab_atmega64m1, 17, cfgtab_atmega16m1, // ISRs, Config /*ATmega16M1*/ 136, rgftab_atmega16m1, 1, UART_LIN, // Register file, UART - /*ATmega16M1*/ 4, ports_atmega16m1}, // Ports + /*ATmega16M1*/ 4, ports_atmega16m1, WDT_CLASSIC4}, // Ports, WDT //ATmega16HVA2 xml, avr-gcc 12.2.0 // Sources {"ATmega16HVA2", 55, F_AVR8, {0x1E, 0x94, 0x0E}, // ID /*ATmega16HVA2*/ 0, 0x04000, 0x080, -1, -1, 0, 0x0100, -1, 0x0100, 0x0400, // Mem /*ATmega16HVA2*/ 2, 1, 22, vtab_atmega16hva2, 9, cfgtab_atmega16hva2, // ISRs, Config /*ATmega16HVA2*/ 0, NULL, 0, UART_NONE, // Register file, UART - /*ATmega16HVA2*/ 3, ports_atmega16hva2}, // Ports + /*ATmega16HVA2*/ 3, ports_atmega16hva2, WDT_CLASSIC4}, // Ports, WDT //ATmega16U2 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega16U2", 56, F_AVR8, {0x1E, 0x94, 0x89}, // ID /*ATmega16U2*/ 0, 0x04000, 0x080, 4, 0x0200, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*ATmega16U2*/ 3, 1, 29, vtab_atmega32u2, 15, cfgtab_at90usb162, // ISRs, Config /*ATmega16U2*/ 92, rgftab_atmega8u2, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega16U2*/ 3, ports_at90usb162}, // Ports + /*ATmega16U2*/ 3, ports_at90usb162, WDT_CLASSIC4}, // Ports, WDT //ATmega16U4 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega16U4", 57, F_AVR8, {0x1E, 0x94, 0x88}, // ID /*ATmega16U4*/ 0, 0x04000, 0x080, 4, 0x0200, 0, 0x0200, 4, 0x0100, 0x0500, // Mem /*ATmega16U4*/ 3, 1, 43, vtab_atmega32u4, 15, cfgtab_atmega16u4, // ISRs, Config /*ATmega16U4*/ 139, rgftab_atmega16u4, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega16U4*/ 5, ports_atmega16u4}, // Ports + /*ATmega16U4*/ 5, ports_atmega16u4, WDT_CLASSIC4}, // Ports, WDT //ATmega32 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega32", 58, F_AVR8, {0x1E, 0x95, 0x02}, // ID /*ATmega32*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0060, 0x0800, // Mem /*ATmega32*/ 2, 1, 21, vtab_atmega323, 13, cfgtab_atmega32, // ISRs, Config /*ATmega32*/ 68, rgftab_atmega32, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega32*/ 4, ports_atmega16}, // Ports + /*ATmega32*/ 4, ports_atmega16, WDT_CLASSIC3}, // Ports, WDT //ATmega32A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega32A", 59, F_AVR8, {0x1E, 0x95, 0x02}, // ID /*ATmega32A*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0060, 0x0800, // Mem /*ATmega32A*/ 2, 1, 21, vtab_atmega323, 13, cfgtab_atmega32, // ISRs, Config /*ATmega32A*/ 66, rgftab_atmega32a, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega32A*/ 4, ports_atmega16}, // Ports + /*ATmega32A*/ 4, ports_atmega16, WDT_CLASSIC3}, // Ports, WDT //ATmega32HVB atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega32HVB", 60, F_AVR8, {0x1E, 0x95, 0x10}, // ID /*ATmega32HVB*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega32HVB*/ 2, 1, 29, vtab_atmega32hvbrevb, 12, cfgtab_atmega32hvb, // ISRs, Config /*ATmega32HVB*/ 91, rgftab_atmega32hvbrevb, 0, UART_NONE, // Register file, UART - /*ATmega32HVB*/ 3, ports_atmega32hvbrevb}, // Ports + /*ATmega32HVB*/ 3, ports_atmega32hvbrevb, WDT_CLASSIC4}, // Ports, WDT //ATmega32HVBrevB atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega32HVBrevB", 61, F_AVR8, {0x1E, 0x95, 0x10}, // ID /*ATmega32HVBrevB*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega32HVBrevB*/ 2, 1, 29, vtab_atmega32hvbrevb, 12, cfgtab_atmega32hvbrevb, // ISRs, Config /*ATmega32HVBrevB*/ 91, rgftab_atmega32hvbrevb, 0, UART_NONE, // Register file, UART - /*ATmega32HVBrevB*/ 3, ports_atmega32hvbrevb}, // Ports + /*ATmega32HVBrevB*/ 3, ports_atmega32hvbrevb, WDT_CLASSIC4}, // Ports, WDT //ATmega32C1 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega32C1", 62, F_AVR8, {0x1E, 0x95, 0x86}, // ID /*ATmega32C1*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega32C1*/ 3, 1, 31, vtab_atmega64m1, 17, cfgtab_atmega32c1, // ISRs, Config /*ATmega32C1*/ 117, rgftab_atmega32c1, 1, UART_LIN, // Register file, UART - /*ATmega32C1*/ 4, ports_atmega16m1}, // Ports + /*ATmega32C1*/ 4, ports_atmega16m1, WDT_CLASSIC4}, // Ports, WDT //ATmega32M1 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega32M1", 63, F_AVR8, {0x1E, 0x95, 0x84}, // ID /*ATmega32M1*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega32M1*/ 3, 1, 31, vtab_atmega64m1, 17, cfgtab_atmega32c1, // ISRs, Config /*ATmega32M1*/ 136, rgftab_atmega16m1, 1, UART_LIN, // Register file, UART - /*ATmega32M1*/ 4, ports_atmega16m1}, // Ports + /*ATmega32M1*/ 4, ports_atmega16m1, WDT_CLASSIC4}, // Ports, WDT //ATmega32HVE2 avrdude, boot size (manual) // Sources {"ATmega32HVE2", 379, F_AVR8, {0x1E, 0x95, 0x13}, // ID /*ATmega32HVE2*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, -1, -1, // Mem /*ATmega32HVE2*/ 2, 1, 25, vtab_atmega64hve2, 13, cfgtab_atmega64hve2, // ISRs, Config /*ATmega32HVE2*/ 0, NULL, 0, UART_UNKNOWN, // Register file, UART - /*ATmega32HVE2*/ 0, NULL}, // Ports + /*ATmega32HVE2*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //ATmega32U2 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega32U2", 64, F_AVR8, {0x1E, 0x95, 0x8A}, // ID /*ATmega32U2*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0400, // Mem /*ATmega32U2*/ 3, 1, 29, vtab_atmega32u2, 15, cfgtab_atmega32u2, // ISRs, Config /*ATmega32U2*/ 92, rgftab_atmega8u2, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega32U2*/ 3, ports_at90usb162}, // Ports + /*ATmega32U2*/ 3, ports_at90usb162, WDT_CLASSIC4}, // Ports, WDT //ATmega32U4 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega32U4", 65, F_AVR8, {0x1E, 0x95, 0x87}, // ID /*ATmega32U4*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0a00, // Mem /*ATmega32U4*/ 3, 1, 43, vtab_atmega32u4, 15, cfgtab_atmega32u4, // ISRs, Config /*ATmega32U4*/ 139, rgftab_atmega16u4, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega32U4*/ 5, ports_atmega16u4}, // Ports + /*ATmega32U4*/ 5, ports_atmega16u4, WDT_CLASSIC4}, // Ports, WDT //ATmega32U6 xml, avr-gcc 12.2.0, boot size (manual) // Sources {"ATmega32U6", 66, F_AVR8, {0x1E, 0x95, 0x88}, // ID /*ATmega32U6*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, -1, 0x0100, 0x0a00, // Mem /*ATmega32U6*/ 3, 1, 38, vtab_atmega32u6, 15, cfgtab_atmega32u6, // ISRs, Config /*ATmega32U6*/ 0, NULL, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega32U6*/ 6, ports_atmega32u6}, // Ports + /*ATmega32U6*/ 6, ports_atmega32u6, WDT_CLASSIC4}, // Ports, WDT //ATmega48 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega48", 67, F_AVR8, {0x1E, 0x92, 0x05}, // ID /*ATmega48*/ 0, 0x01000, 0x040, 0, 0, 0, 0x0100, 4, 0x0100, 0x0200, // Mem /*ATmega48*/ 3, 1, 26, vtab_atmega328p, 11, cfgtab_atmega48, // ISRs, Config /*ATmega48*/ 81, rgftab_atmega48, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega48*/ 3, ports_atmega328}, // Ports + /*ATmega48*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega48A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega48A", 68, F_AVR8, {0x1E, 0x92, 0x05}, // ID /*ATmega48A*/ 0, 0x01000, 0x040, 0, 0, 0, 0x0100, 4, 0x0100, 0x0200, // Mem /*ATmega48A*/ 3, 1, 26, vtab_atmega328p, 11, cfgtab_atmega48, // ISRs, Config /*ATmega48A*/ 82, rgftab_atmega48a, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega48A*/ 3, ports_atmega328}, // Ports + /*ATmega48A*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega48P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega48P", 69, F_AVR8, {0x1E, 0x92, 0x0A}, // ID /*ATmega48P*/ 0, 0x01000, 0x040, 0, 0, 0, 0x0100, 4, 0x0100, 0x0200, // Mem /*ATmega48P*/ 3, 1, 26, vtab_atmega328p, 11, cfgtab_atmega48, // ISRs, Config /*ATmega48P*/ 81, rgftab_atmega48, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega48P*/ 3, ports_atmega328}, // Ports + /*ATmega48P*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega48PA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega48PA", 70, F_AVR8, {0x1E, 0x92, 0x0A}, // ID /*ATmega48PA*/ 0, 0x01000, 0x040, 0, 0, 0, 0x0100, 4, 0x0100, 0x0200, // Mem /*ATmega48PA*/ 3, 1, 26, vtab_atmega328p, 11, cfgtab_atmega48, // ISRs, Config /*ATmega48PA*/ 82, rgftab_atmega48a, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega48PA*/ 3, ports_atmega328}, // Ports + /*ATmega48PA*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega48PB atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega48PB", 71, F_AVR8, {0x1E, 0x92, 0x10}, // ID /*ATmega48PB*/ 0, 0x01000, 0x040, 0, 0, 0, 0x0100, 4, 0x0100, 0x0200, // Mem /*ATmega48PB*/ 3, 1, 27, vtab_atmega168pb, 11, cfgtab_atmega48pb, // ISRs, Config /*ATmega48PB*/ 95, rgftab_atmega48pb, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega48PB*/ 4, ports_atmega328pb}, // Ports + /*ATmega48PB*/ 4, ports_atmega328pb, WDT_CLASSIC4}, // Ports, WDT //ATmega64 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega64", 72, F_AVR8, {0x1E, 0x96, 0x02}, // ID /*ATmega64*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega64*/ 3, 1, 35, vtab_atmega128a, 15, cfgtab_atmega64, // ISRs, Config /*ATmega64*/ 103, rgftab_atmega64, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega64*/ 7, ports_atmega64}, // Ports + /*ATmega64*/ 7, ports_atmega64, WDT_CLASSIC3}, // Ports, WDT //ATmega64A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega64A", 73, F_AVR8, {0x1E, 0x96, 0x02}, // ID /*ATmega64A*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega64A*/ 3, 1, 35, vtab_atmega128a, 15, cfgtab_atmega64, // ISRs, Config /*ATmega64A*/ 103, rgftab_atmega64, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega64A*/ 7, ports_atmega64}, // Ports + /*ATmega64A*/ 7, ports_atmega64, WDT_CLASSIC3}, // Ports, WDT //ATmega64HVE xml, avr-gcc 12.2.0, boot size (manual) // Sources {"ATmega64HVE", 74, F_AVR8, {0x1E, 0x96, 0x10}, // ID /*ATmega64HVE*/ 0, 0x10000, 0x080, 4, 0x0400, 0, 0x0400, -1, 0x0100, 0x1000, // Mem /*ATmega64HVE*/ 2, 1, 25, vtab_atmega64hve2, 13, cfgtab_atmega64hve, // ISRs, Config /*ATmega64HVE*/ 0, NULL, 1, UART_LIN, // Register file, UART - /*ATmega64HVE*/ 2, ports_atmega64hve}, // Ports + /*ATmega64HVE*/ 2, ports_atmega64hve, WDT_CLASSIC4}, // Ports, WDT //ATmega64C1 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega64C1", 75, F_AVR8, {0x1E, 0x96, 0x86}, // ID /*ATmega64C1*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega64C1*/ 3, 1, 31, vtab_atmega64m1, 17, cfgtab_atmega64c1, // ISRs, Config /*ATmega64C1*/ 122, rgftab_atmega64c1, 1, UART_LIN, // Register file, UART - /*ATmega64C1*/ 4, ports_atmega16m1}, // Ports + /*ATmega64C1*/ 4, ports_atmega16m1, WDT_CLASSIC4}, // Ports, WDT //ATmega64M1 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega64M1", 76, F_AVR8, {0x1E, 0x96, 0x84}, // ID /*ATmega64M1*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega64M1*/ 3, 1, 31, vtab_atmega64m1, 17, cfgtab_atmega64c1, // ISRs, Config /*ATmega64M1*/ 136, rgftab_atmega64m1, 1, UART_LIN, // Register file, UART - /*ATmega64M1*/ 4, ports_atmega16m1}, // Ports + /*ATmega64M1*/ 4, ports_atmega16m1, WDT_CLASSIC4}, // Ports, WDT //ATmega64HVE2 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega64HVE2", 77, F_AVR8, {0x1E, 0x96, 0x10}, // ID /*ATmega64HVE2*/ 0, 0x10000, 0x080, 4, 0x0400, 0, 0x0400, 4, 0x0100, 0x1000, // Mem /*ATmega64HVE2*/ 2, 1, 25, vtab_atmega64hve2, 13, cfgtab_atmega64hve2, // ISRs, Config /*ATmega64HVE2*/ 89, rgftab_atmega64hve2, 1, UART_LIN, // Register file, UART - /*ATmega64HVE2*/ 2, ports_atmega64hve}, // Ports + /*ATmega64HVE2*/ 2, ports_atmega64hve, WDT_CLASSIC4}, // Ports, WDT //ATmega64RFR2 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega64RFR2", 78, F_AVR8, {0x1E, 0xA6, 0x02}, // ID /*ATmega64RFR2*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0200, 0x2000, // Mem /*ATmega64RFR2*/ 3, 1, 77, vtab_atmega2564rfr2, 14, cfgtab_atmega64rfr2, // ISRs, Config /*ATmega64RFR2*/ 269, rgftab_atmega64rfr2, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega64RFR2*/ 7, ports_atmega64rfr2}, // Ports + /*ATmega64RFR2*/ 7, ports_atmega64rfr2, WDT_CLASSIC4}, // Ports, WDT //ATmega88 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega88", 79, F_AVR8, {0x1E, 0x93, 0x0A}, // ID /*ATmega88*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega88*/ 3, 1, 26, vtab_atmega328p, 14, cfgtab_atmega88, // ISRs, Config /*ATmega88*/ 81, rgftab_atmega88, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega88*/ 3, ports_atmega328}, // Ports + /*ATmega88*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega88A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega88A", 80, F_AVR8, {0x1E, 0x93, 0x0A}, // ID /*ATmega88A*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega88A*/ 3, 1, 26, vtab_atmega328p, 14, cfgtab_atmega88, // ISRs, Config /*ATmega88A*/ 81, rgftab_atmega88, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega88A*/ 3, ports_atmega328}, // Ports + /*ATmega88A*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega88P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega88P", 81, F_AVR8, {0x1E, 0x93, 0x0F}, // ID /*ATmega88P*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega88P*/ 3, 1, 26, vtab_atmega328p, 14, cfgtab_atmega88, // ISRs, Config /*ATmega88P*/ 81, rgftab_atmega88, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega88P*/ 3, ports_atmega328}, // Ports + /*ATmega88P*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega88PA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega88PA", 82, F_AVR8, {0x1E, 0x93, 0x0F}, // ID /*ATmega88PA*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega88PA*/ 3, 1, 26, vtab_atmega328p, 14, cfgtab_atmega88, // ISRs, Config /*ATmega88PA*/ 81, rgftab_atmega88, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega88PA*/ 3, ports_atmega328}, // Ports + /*ATmega88PA*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega88PB atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega88PB", 83, F_AVR8, {0x1E, 0x93, 0x16}, // ID /*ATmega88PB*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega88PB*/ 3, 1, 27, vtab_atmega168pb, 14, cfgtab_atmega88pb, // ISRs, Config /*ATmega88PB*/ 95, rgftab_atmega88pb, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega88PB*/ 4, ports_atmega328pb}, // Ports + /*ATmega88PB*/ 4, ports_atmega328pb, WDT_CLASSIC4}, // Ports, WDT //ATmega103 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"ATmega103", 84, F_AVR8, {0x1E, 0x97, 0x01}, // ID /*ATmega103*/ 0, 0x20000, 0x100, 0, 0, 0, 0x1000, 1, 0x0060, 0x0fa0, // Mem /*ATmega103*/ 1, 1, 24, vtab_atmega103, 4, cfgtab_atmega103, // ISRs, Config /*ATmega103*/ 0, NULL, 1, UART_CLASSIC_1x08, // Register file, UART - /*ATmega103*/ 6, ports_atmega103}, // Ports + /*ATmega103*/ 6, ports_atmega103, WDT_CLASSIC3}, // Ports, WDT //ATmega103comp xml // Sources {"ATmega103comp", 374, F_AVR8, {0x1E, 0x97, 0x01}, // ID /*ATmega103comp*/ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, // Mem /*ATmega103comp*/ -1, -1, 0, NULL, 15, cfgtab_atmega103comp, // ISRs, Config /*ATmega103comp*/ 0, NULL, 0, UART_UNKNOWN, // Register file, UART - /*ATmega103comp*/ 0, NULL}, // Ports + /*ATmega103comp*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //ATmega128 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega128", 85, F_AVR8, {0x1E, 0x97, 0x02}, // ID /*ATmega128*/ 0, 0x20000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0100, 0x1000, // Mem /*ATmega128*/ 3, 1, 35, vtab_atmega128a, 15, cfgtab_atmega128, // ISRs, Config /*ATmega128*/ 103, rgftab_atmega128, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega128*/ 7, ports_atmega64}, // Ports + /*ATmega128*/ 7, ports_atmega64, WDT_CLASSIC3}, // Ports, WDT //ATmega128A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega128A", 86, F_AVR8, {0x1E, 0x97, 0x02}, // ID /*ATmega128A*/ 0, 0x20000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0100, 0x1000, // Mem /*ATmega128A*/ 3, 1, 35, vtab_atmega128a, 15, cfgtab_atmega128, // ISRs, Config /*ATmega128A*/ 103, rgftab_atmega128a, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega128A*/ 7, ports_atmega64}, // Ports + /*ATmega128A*/ 7, ports_atmega64, WDT_CLASSIC3}, // Ports, WDT //ATmega128RFA1 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega128RFA1", 87, F_AVR8, {0x1E, 0xA7, 0x01}, // ID /*ATmega128RFA1*/ 0, 0x20000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0200, 0x4000, // Mem /*ATmega128RFA1*/ 3, 1, 72, vtab_atmega128rfa1, 14, cfgtab_atmega128rfa1, // ISRs, Config /*ATmega128RFA1*/ 237, rgftab_atmega128rfa1, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega128RFA1*/ 7, ports_atmega64rfr2}, // Ports + /*ATmega128RFA1*/ 7, ports_atmega64rfr2, WDT_CLASSIC4}, // Ports, WDT //ATmega128RFR2 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega128RFR2", 88, F_AVR8, {0x1E, 0xA7, 0x02}, // ID /*ATmega128RFR2*/ 0, 0x20000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0200, 0x4000, // Mem /*ATmega128RFR2*/ 3, 1, 77, vtab_atmega2564rfr2, 14, cfgtab_atmega128rfr2, // ISRs, Config /*ATmega128RFR2*/ 270, rgftab_atmega128rfr2, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega128RFR2*/ 7, ports_atmega64rfr2}, // Ports + /*ATmega128RFR2*/ 7, ports_atmega64rfr2, WDT_CLASSIC4}, // Ports, WDT //ATmega161 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"ATmega161", 89, F_AVR8, {0x1E, 0x94, 0x01}, // ID /*ATmega161*/ 0, 0x04000, 0x080, 1, 0x0400, 0, 0x0200, 1, 0x0060, 0x0400, // Mem /*ATmega161*/ 1, 1, 21, vtab_atmega161, 7, cfgtab_atmega161, // ISRs, Config /*ATmega161*/ 0, NULL, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega161*/ 5, ports_atmega8515}, // Ports + /*ATmega161*/ 5, ports_atmega8515, WDT_CLASSIC3}, // Ports, WDT //ATmega161comp xml // Sources {"ATmega161comp", 375, F_AVR8, {0x1E, 0x94, 0x01}, // ID /*ATmega161comp*/ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, // Mem /*ATmega161comp*/ -1, -1, 0, NULL, 15, cfgtab_atmega161comp, // ISRs, Config /*ATmega161comp*/ 0, NULL, 0, UART_UNKNOWN, // Register file, UART - /*ATmega161comp*/ 0, NULL}, // Ports + /*ATmega161comp*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //ATmega162 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega162", 90, F_AVR8, {0x1E, 0x94, 0x04}, // ID /*ATmega162*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega162*/ 3, 1, 28, vtab_atmega162, 15, cfgtab_atmega162, // ISRs, Config /*ATmega162*/ 79, rgftab_atmega162, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega162*/ 5, ports_atmega8515}, // Ports + /*ATmega162*/ 5, ports_atmega8515, WDT_CLASSIC3}, // Ports, WDT //ATmega163 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"ATmega163", 91, F_AVR8, {0x1E, 0x94, 0x02}, // ID /*ATmega163*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 1, 0x0060, 0x0400, // Mem /*ATmega163*/ 2, 1, 18, vtab_atmega163, 9, cfgtab_atmega163, // ISRs, Config /*ATmega163*/ 0, NULL, 1, UART_CLASSIC_2x08, // Register file, UART - /*ATmega163*/ 4, ports_atmega16}, // Ports + /*ATmega163*/ 4, ports_atmega16, WDT_CLASSIC3}, // Ports, WDT //ATmega164A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega164A", 92, F_AVR8, {0x1E, 0x94, 0x0F}, // ID /*ATmega164A*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega164A*/ 3, 1, 31, vtab_atmega644pa, 14, cfgtab_atmega164a, // ISRs, Config /*ATmega164A*/ 96, rgftab_atmega164a, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega164A*/ 4, ports_atmega164a}, // Ports + /*ATmega164A*/ 4, ports_atmega164a, WDT_CLASSIC4}, // Ports, WDT //ATmega164P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega164P", 93, F_AVR8, {0x1E, 0x94, 0x0A}, // ID /*ATmega164P*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega164P*/ 3, 1, 31, vtab_atmega644pa, 14, cfgtab_atmega164a, // ISRs, Config /*ATmega164P*/ 96, rgftab_atmega164a, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega164P*/ 4, ports_atmega164a}, // Ports + /*ATmega164P*/ 4, ports_atmega164a, WDT_CLASSIC4}, // Ports, WDT //ATmega164PA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega164PA", 94, F_AVR8, {0x1E, 0x94, 0x0A}, // ID /*ATmega164PA*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega164PA*/ 3, 1, 31, vtab_atmega644pa, 14, cfgtab_atmega164a, // ISRs, Config /*ATmega164PA*/ 96, rgftab_atmega164a, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega164PA*/ 4, ports_atmega164a}, // Ports + /*ATmega164PA*/ 4, ports_atmega164a, WDT_CLASSIC4}, // Ports, WDT //ATmega165 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"ATmega165", 95, F_AVR8, {0x1E, 0x94, 0x07}, // ID /*ATmega165*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega165*/ 3, 1, 22, vtab_atmega645p, 15, cfgtab_atmega165, // ISRs, Config /*ATmega165*/ 0, NULL, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega165*/ 7, ports_at90can128}, // Ports + /*ATmega165*/ 7, ports_at90can128, WDT_CLASSIC3}, // Ports, WDT //ATmega165A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega165A", 96, F_AVR8, {0x1E, 0x94, 0x10}, // ID /*ATmega165A*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega165A*/ 3, 1, 22, vtab_atmega645p, 15, cfgtab_atmega165, // ISRs, Config /*ATmega165A*/ 86, rgftab_atmega165a, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega165A*/ 7, ports_atmega165a}, // Ports + /*ATmega165A*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega165P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega165P", 97, F_AVR8, {0x1E, 0x94, 0x07}, // ID /*ATmega165P*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega165P*/ 3, 1, 22, vtab_atmega645p, 15, cfgtab_atmega165, // ISRs, Config /*ATmega165P*/ 86, rgftab_atmega165a, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega165P*/ 7, ports_atmega165a}, // Ports + /*ATmega165P*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega165PA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega165PA", 98, F_AVR8, {0x1E, 0x94, 0x07}, // ID /*ATmega165PA*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega165PA*/ 3, 1, 22, vtab_atmega645p, 15, cfgtab_atmega165, // ISRs, Config /*ATmega165PA*/ 86, rgftab_atmega165a, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega165PA*/ 7, ports_atmega165a}, // Ports + /*ATmega165PA*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega168 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega168", 99, F_AVR8, {0x1E, 0x94, 0x06}, // ID /*ATmega168*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega168*/ 3, 1, 26, vtab_atmega328, 14, cfgtab_atmega168, // ISRs, Config /*ATmega168*/ 81, rgftab_atmega88, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega168*/ 3, ports_atmega328}, // Ports + /*ATmega168*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega168A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega168A", 100, F_AVR8, {0x1E, 0x94, 0x06}, // ID /*ATmega168A*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega168A*/ 3, 1, 26, vtab_atmega328p, 14, cfgtab_atmega168, // ISRs, Config /*ATmega168A*/ 81, rgftab_atmega88, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega168A*/ 3, ports_atmega328}, // Ports + /*ATmega168A*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega168P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega168P", 101, F_AVR8, {0x1E, 0x94, 0x0B}, // ID /*ATmega168P*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega168P*/ 3, 1, 26, vtab_atmega328p, 14, cfgtab_atmega168, // ISRs, Config /*ATmega168P*/ 81, rgftab_atmega88, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega168P*/ 3, ports_atmega328}, // Ports + /*ATmega168P*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega168PA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega168PA", 102, F_AVR8, {0x1E, 0x94, 0x0B}, // ID /*ATmega168PA*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega168PA*/ 3, 1, 26, vtab_atmega328p, 14, cfgtab_atmega168, // ISRs, Config /*ATmega168PA*/ 81, rgftab_atmega88, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega168PA*/ 3, ports_atmega328}, // Ports + /*ATmega168PA*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega168PB atdf, avr-gcc 7.3.0, avrdude // Sources {"ATmega168PB", 103, F_AVR8, {0x1E, 0x94, 0x15}, // ID /*ATmega168PB*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega168PB*/ 3, 1, 27, vtab_atmega168pb, 14, cfgtab_atmega168pb, // ISRs, Config /*ATmega168PB*/ 95, rgftab_atmega88pb, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega168PB*/ 4, ports_atmega328pb}, // Ports + /*ATmega168PB*/ 4, ports_atmega328pb, WDT_CLASSIC4}, // Ports, WDT //ATmega169 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"ATmega169", 104, F_AVR8, {0x1E, 0x94, 0x05}, // ID /*ATmega169*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega169*/ 3, 1, 23, vtab_atmega649p, 15, cfgtab_atmega165, // ISRs, Config /*ATmega169*/ 0, NULL, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega169*/ 7, ports_atmega165a}, // Ports + /*ATmega169*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega169A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega169A", 105, F_AVR8, {0x1E, 0x94, 0x11}, // ID /*ATmega169A*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega169A*/ 3, 1, 23, vtab_atmega649p, 15, cfgtab_atmega165, // ISRs, Config /*ATmega169A*/ 106, rgftab_atmega169a, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega169A*/ 7, ports_atmega165a}, // Ports + /*ATmega169A*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega169P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega169P", 106, F_AVR8, {0x1E, 0x94, 0x05}, // ID /*ATmega169P*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega169P*/ 3, 1, 23, vtab_atmega649p, 15, cfgtab_atmega165, // ISRs, Config /*ATmega169P*/ 106, rgftab_atmega169a, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega169P*/ 7, ports_atmega165a}, // Ports + /*ATmega169P*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega169PA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega169PA", 107, F_AVR8, {0x1E, 0x94, 0x05}, // ID /*ATmega169PA*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATmega169PA*/ 3, 1, 23, vtab_atmega649p, 15, cfgtab_atmega165, // ISRs, Config /*ATmega169PA*/ 106, rgftab_atmega169a, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega169PA*/ 7, ports_atmega64rfr2}, // Ports + /*ATmega169PA*/ 7, ports_atmega64rfr2, WDT_CLASSIC3}, // Ports, WDT //ATmega256RFR2 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega256RFR2", 108, F_AVR8, {0x1E, 0xA8, 0x02}, // ID /*ATmega256RFR2*/ 0, 0x40000, 0x100, 4, 0x0400, 0, 0x2000, 8, 0x0200, 0x8000, // Mem /*ATmega256RFR2*/ 3, 1, 77, vtab_atmega2564rfr2, 14, cfgtab_atmega256rfr2, // ISRs, Config /*ATmega256RFR2*/ 271, rgftab_atmega256rfr2, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega256RFR2*/ 7, ports_atmega64rfr2}, // Ports + /*ATmega256RFR2*/ 7, ports_atmega64rfr2, WDT_CLASSIC4}, // Ports, WDT //ATmega323 xml, avr-gcc 12.2.0, boot size (manual) // Sources {"ATmega323", 109, F_AVR8, {0x1E, 0x95, 0x01}, // ID /*ATmega323*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, -1, 0x0060, 0x0800, // Mem /*ATmega323*/ 2, 1, 21, vtab_atmega323, 12, cfgtab_atmega323, // ISRs, Config /*ATmega323*/ 0, NULL, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega323*/ 4, ports_atmega16}, // Ports + /*ATmega323*/ 4, ports_atmega16, WDT_CLASSIC3}, // Ports, WDT //ATmega324A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega324A", 110, F_AVR8, {0x1E, 0x95, 0x15}, // ID /*ATmega324A*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega324A*/ 3, 1, 31, vtab_atmega644pa, 14, cfgtab_atmega324a, // ISRs, Config /*ATmega324A*/ 96, rgftab_atmega164a, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega324A*/ 4, ports_atmega164a}, // Ports + /*ATmega324A*/ 4, ports_atmega164a, WDT_CLASSIC4}, // Ports, WDT //ATmega324P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega324P", 111, F_AVR8, {0x1E, 0x95, 0x08}, // ID /*ATmega324P*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega324P*/ 3, 1, 31, vtab_atmega644pa, 14, cfgtab_atmega324a, // ISRs, Config /*ATmega324P*/ 96, rgftab_atmega164a, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega324P*/ 4, ports_atmega164a}, // Ports + /*ATmega324P*/ 4, ports_atmega164a, WDT_CLASSIC4}, // Ports, WDT //ATmega324PA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega324PA", 112, F_AVR8, {0x1E, 0x95, 0x11}, // ID /*ATmega324PA*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega324PA*/ 3, 1, 31, vtab_atmega644pa, 14, cfgtab_atmega324a, // ISRs, Config /*ATmega324PA*/ 96, rgftab_atmega164a, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega324PA*/ 4, ports_atmega164a}, // Ports + /*ATmega324PA*/ 4, ports_atmega164a, WDT_CLASSIC4}, // Ports, WDT //ATmega324PB atdf, avrdude // Sources {"ATmega324PB", 113, F_AVR8, {0x1E, 0x95, 0x17}, // ID /*ATmega324PB*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega324PB*/ 3, 1, 51, vtab_atmega324pb, 15, cfgtab_atmega324pb, // ISRs, Config /*ATmega324PB*/ 134, rgftab_atmega324pb, 3, UART_CLASSIC_2x12, // Register file, UART - /*ATmega324PB*/ 5, ports_atmega324pb}, // Ports + /*ATmega324PB*/ 5, ports_atmega324pb, WDT_CLASSIC4}, // Ports, WDT //ATmega325 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega325", 114, F_AVR8, {0x1E, 0x95, 0x05}, // ID /*ATmega325*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega325*/ 3, 1, 22, vtab_atmega645p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega325*/ 86, rgftab_atmega325, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega325*/ 7, ports_atmega165a}, // Ports + /*ATmega325*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega325A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega325A", 115, F_AVR8, {0x1E, 0x95, 0x05}, // ID /*ATmega325A*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega325A*/ 3, 1, 22, vtab_atmega645p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega325A*/ 86, rgftab_atmega325, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega325A*/ 7, ports_atmega165a}, // Ports + /*ATmega325A*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega325P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega325P", 116, F_AVR8, {0x1E, 0x95, 0x0D}, // ID /*ATmega325P*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega325P*/ 3, 1, 22, vtab_atmega645p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega325P*/ 86, rgftab_atmega325, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega325P*/ 7, ports_atmega165a}, // Ports + /*ATmega325P*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega325PA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega325PA", 117, F_AVR8, {0x1E, 0x95, 0x0D}, // ID /*ATmega325PA*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega325PA*/ 3, 1, 22, vtab_atmega645p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega325PA*/ 86, rgftab_atmega325, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega325PA*/ 7, ports_atmega165a}, // Ports + /*ATmega325PA*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega328 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega328", 118, F_AVR8, {0x1E, 0x95, 0x14}, // ID /*ATmega328*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega328*/ 3, 1, 26, vtab_atmega328, 14, cfgtab_atmega328, // ISRs, Config /*ATmega328*/ 81, rgftab_atmega328, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega328*/ 3, ports_atmega328}, // Ports + /*ATmega328*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega328P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega328P", 119, F_AVR8, {0x1E, 0x95, 0x0F}, // ID /*ATmega328P*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega328P*/ 3, 1, 26, vtab_atmega328p, 14, cfgtab_atmega328, // ISRs, Config /*ATmega328P*/ 81, rgftab_atmega328, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega328P*/ 3, ports_atmega328}, // Ports + /*ATmega328P*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATmega328PB atdf, avr-gcc 7.3.0, avrdude // Sources {"ATmega328PB", 120, F_AVR8, {0x1E, 0x95, 0x16}, // ID /*ATmega328PB*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega328PB*/ 3, 1, 45, vtab_atmega328pb, 15, cfgtab_atmega328pb, // ISRs, Config /*ATmega328PB*/ 123, rgftab_atmega328pb, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega328PB*/ 4, ports_atmega328pb}, // Ports + /*ATmega328PB*/ 4, ports_atmega328pb, WDT_CLASSIC4}, // Ports, WDT //ATmega329 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega329", 121, F_AVR8, {0x1E, 0x95, 0x03}, // ID /*ATmega329*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega329*/ 3, 1, 23, vtab_atmega649p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega329*/ 106, rgftab_atmega329, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega329*/ 7, ports_atmega165a}, // Ports + /*ATmega329*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega329A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega329A", 122, F_AVR8, {0x1E, 0x95, 0x03}, // ID /*ATmega329A*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega329A*/ 3, 1, 23, vtab_atmega649p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega329A*/ 106, rgftab_atmega329a, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega329A*/ 7, ports_atmega165a}, // Ports + /*ATmega329A*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega329P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega329P", 123, F_AVR8, {0x1E, 0x95, 0x0B}, // ID /*ATmega329P*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega329P*/ 3, 1, 23, vtab_atmega649p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega329P*/ 106, rgftab_atmega329p, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega329P*/ 7, ports_atmega165a}, // Ports + /*ATmega329P*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega329PA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega329PA", 124, F_AVR8, {0x1E, 0x95, 0x0B}, // ID /*ATmega329PA*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega329PA*/ 3, 1, 23, vtab_atmega649p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega329PA*/ 106, rgftab_atmega329a, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega329PA*/ 7, ports_atmega165a}, // Ports + /*ATmega329PA*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega406 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega406", 125, F_AVR8, {0x1E, 0x95, 0x07}, // ID /*ATmega406*/ 0, 0x0a000, 0x080, 4, 0x0200, 0, 0x0200, 4, 0x0100, 0x0800, // Mem /*ATmega406*/ 2, 1, 23, vtab_atmega406, 10, cfgtab_atmega406, // ISRs, Config /*ATmega406*/ 79, rgftab_atmega406, 0, UART_NONE, // Register file, UART - /*ATmega406*/ 4, ports_atmega406}, // Ports + /*ATmega406*/ 4, ports_atmega406, WDT_CLASSIC4}, // Ports, WDT //ATmega640 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega640", 126, F_AVR8, {0x1E, 0x96, 0x08}, // ID /*ATmega640*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0200, 0x2000, // Mem /*ATmega640*/ 3, 1, 57, vtab_atmega2560, 14, cfgtab_atmega640, // ISRs, Config /*ATmega640*/ 160, rgftab_atmega640, 4, UART_CLASSIC_2x12, // Register file, UART - /*ATmega640*/ 11, ports_atmega640}, // Ports + /*ATmega640*/ 11, ports_atmega640, WDT_CLASSIC4}, // Ports, WDT //ATmega644 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega644", 127, F_AVR8, {0x1E, 0x96, 0x09}, // ID /*ATmega644*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega644*/ 3, 1, 28, vtab_atmega644, 14, cfgtab_atmega644, // ISRs, Config /*ATmega644*/ 88, rgftab_atmega644, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega644*/ 4, ports_atmega164a}, // Ports + /*ATmega644*/ 4, ports_atmega164a, WDT_CLASSIC4}, // Ports, WDT //ATmega644A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega644A", 128, F_AVR8, {0x1E, 0x96, 0x09}, // ID /*ATmega644A*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega644A*/ 3, 1, 31, vtab_atmega644pa, 14, cfgtab_atmega644, // ISRs, Config /*ATmega644A*/ 93, rgftab_atmega644a, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega644A*/ 4, ports_atmega164a}, // Ports + /*ATmega644A*/ 4, ports_atmega164a, WDT_CLASSIC4}, // Ports, WDT //ATmega644P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega644P", 129, F_AVR8, {0x1E, 0x96, 0x0A}, // ID /*ATmega644P*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega644P*/ 3, 1, 31, vtab_atmega644pa, 14, cfgtab_atmega644, // ISRs, Config /*ATmega644P*/ 93, rgftab_atmega644a, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega644P*/ 4, ports_atmega164a}, // Ports + /*ATmega644P*/ 4, ports_atmega164a, WDT_CLASSIC4}, // Ports, WDT //ATmega644PA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega644PA", 130, F_AVR8, {0x1E, 0x96, 0x0A}, // ID /*ATmega644PA*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega644PA*/ 3, 1, 31, vtab_atmega644pa, 14, cfgtab_atmega644, // ISRs, Config /*ATmega644PA*/ 93, rgftab_atmega644a, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega644PA*/ 4, ports_atmega164a}, // Ports + /*ATmega644PA*/ 4, ports_atmega164a, WDT_CLASSIC4}, // Ports, WDT //ATmega644RFR2 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega644RFR2", 131, F_AVR8, {0x1E, 0xA6, 0x03}, // ID /*ATmega644RFR2*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0200, 0x2000, // Mem /*ATmega644RFR2*/ 3, 1, 77, vtab_atmega2564rfr2, 14, cfgtab_atmega64rfr2, // ISRs, Config /*ATmega644RFR2*/ 269, rgftab_atmega64rfr2, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega644RFR2*/ 7, ports_atmega64rfr2}, // Ports + /*ATmega644RFR2*/ 7, ports_atmega64rfr2, WDT_CLASSIC4}, // Ports, WDT //ATmega645 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega645", 132, F_AVR8, {0x1E, 0x96, 0x05}, // ID /*ATmega645*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega645*/ 3, 1, 22, vtab_atmega645p, 15, cfgtab_atmega645, // ISRs, Config /*ATmega645*/ 86, rgftab_atmega645, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega645*/ 7, ports_atmega165a}, // Ports + /*ATmega645*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega645A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega645A", 133, F_AVR8, {0x1E, 0x96, 0x05}, // ID /*ATmega645A*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega645A*/ 3, 1, 22, vtab_atmega645p, 15, cfgtab_atmega645, // ISRs, Config /*ATmega645A*/ 86, rgftab_atmega645, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega645A*/ 7, ports_atmega165a}, // Ports + /*ATmega645A*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega645P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega645P", 134, F_AVR8, {0x1E, 0x96, 0x0D}, // ID /*ATmega645P*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega645P*/ 3, 1, 22, vtab_atmega645p, 15, cfgtab_atmega645, // ISRs, Config /*ATmega645P*/ 86, rgftab_atmega645, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega645P*/ 7, ports_atmega165a}, // Ports + /*ATmega645P*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega649 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega649", 135, F_AVR8, {0x1E, 0x96, 0x03}, // ID /*ATmega649*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega649*/ 3, 1, 23, vtab_atmega649p, 15, cfgtab_atmega645, // ISRs, Config /*ATmega649*/ 106, rgftab_atmega649, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega649*/ 7, ports_atmega165a}, // Ports + /*ATmega649*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega649A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega649A", 136, F_AVR8, {0x1E, 0x96, 0x03}, // ID /*ATmega649A*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega649A*/ 3, 1, 23, vtab_atmega649p, 15, cfgtab_atmega645, // ISRs, Config /*ATmega649A*/ 106, rgftab_atmega649, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega649A*/ 7, ports_atmega165a}, // Ports + /*ATmega649A*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega649P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega649P", 137, F_AVR8, {0x1E, 0x96, 0x0B}, // ID /*ATmega649P*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega649P*/ 3, 1, 23, vtab_atmega649p, 15, cfgtab_atmega645, // ISRs, Config /*ATmega649P*/ 106, rgftab_atmega649, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega649P*/ 7, ports_atmega165a}, // Ports + /*ATmega649P*/ 7, ports_atmega165a, WDT_CLASSIC3}, // Ports, WDT //ATmega1280 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega1280", 138, F_AVR8, {0x1E, 0x97, 0x03}, // ID /*ATmega1280*/ 0, 0x20000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0200, 0x2000, // Mem /*ATmega1280*/ 3, 1, 57, vtab_atmega2560, 14, cfgtab_atmega1280, // ISRs, Config /*ATmega1280*/ 161, rgftab_atmega1280, 4, UART_CLASSIC_2x12, // Register file, UART - /*ATmega1280*/ 11, ports_atmega640}, // Ports + /*ATmega1280*/ 11, ports_atmega640, WDT_CLASSIC4}, // Ports, WDT //ATmega1281 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega1281", 139, F_AVR8, {0x1E, 0x97, 0x04}, // ID /*ATmega1281*/ 0, 0x20000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0200, 0x2000, // Mem /*ATmega1281*/ 3, 1, 57, vtab_atmega2561, 14, cfgtab_atmega1280, // ISRs, Config /*ATmega1281*/ 138, rgftab_atmega1281, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega1281*/ 7, ports_atmega64rfr2}, // Ports + /*ATmega1281*/ 7, ports_atmega64rfr2, WDT_CLASSIC4}, // Ports, WDT //ATmega1284 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega1284", 140, F_AVR8, {0x1E, 0x97, 0x06}, // ID /*ATmega1284*/ 0, 0x20000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0100, 0x4000, // Mem /*ATmega1284*/ 3, 1, 35, vtab_atmega1284p, 14, cfgtab_atmega1284, // ISRs, Config /*ATmega1284*/ 104, rgftab_atmega1284, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega1284*/ 4, ports_atmega164a}, // Ports + /*ATmega1284*/ 4, ports_atmega164a, WDT_CLASSIC4}, // Ports, WDT //ATmega1284P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega1284P", 141, F_AVR8, {0x1E, 0x97, 0x05}, // ID /*ATmega1284P*/ 0, 0x20000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0100, 0x4000, // Mem /*ATmega1284P*/ 3, 1, 35, vtab_atmega1284p, 14, cfgtab_atmega1284, // ISRs, Config /*ATmega1284P*/ 104, rgftab_atmega1284, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega1284P*/ 4, ports_atmega164a}, // Ports + /*ATmega1284P*/ 4, ports_atmega164a, WDT_CLASSIC4}, // Ports, WDT //ATmega1284RFR2 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega1284RFR2", 142, F_AVR8, {0x1E, 0xA7, 0x03}, // ID /*ATmega1284RFR2*/ 0, 0x20000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0200, 0x4000, // Mem /*ATmega1284RFR2*/ 3, 1, 77, vtab_atmega2564rfr2, 14, cfgtab_atmega128rfr2, // ISRs, Config /*ATmega1284RFR2*/ 270, rgftab_atmega128rfr2, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega1284RFR2*/ 7, ports_atmega64rfr2}, // Ports + /*ATmega1284RFR2*/ 7, ports_atmega64rfr2, WDT_CLASSIC4}, // Ports, WDT //ATmega2560 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega2560", 143, F_AVR8, {0x1E, 0x98, 0x01}, // ID /*ATmega2560*/ 0, 0x40000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0200, 0x2000, // Mem /*ATmega2560*/ 3, 1, 57, vtab_atmega2560, 14, cfgtab_atmega2560, // ISRs, Config /*ATmega2560*/ 161, rgftab_atmega1280, 4, UART_CLASSIC_2x12, // Register file, UART - /*ATmega2560*/ 11, ports_atmega640}, // Ports + /*ATmega2560*/ 11, ports_atmega640, WDT_CLASSIC4}, // Ports, WDT //ATmega2561 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega2561", 144, F_AVR8, {0x1E, 0x98, 0x02}, // ID /*ATmega2561*/ 0, 0x40000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0200, 0x2000, // Mem /*ATmega2561*/ 3, 1, 57, vtab_atmega2561, 14, cfgtab_atmega2560, // ISRs, Config /*ATmega2561*/ 139, rgftab_atmega2561, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega2561*/ 7, ports_atmega64rfr2}, // Ports + /*ATmega2561*/ 7, ports_atmega64rfr2, WDT_CLASSIC4}, // Ports, WDT //ATmega2564RFR2 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega2564RFR2", 145, F_AVR8, {0x1E, 0xA8, 0x03}, // ID /*ATmega2564RFR2*/ 0, 0x40000, 0x100, 4, 0x0400, 0, 0x2000, 8, 0x0200, 0x8000, // Mem /*ATmega2564RFR2*/ 3, 1, 77, vtab_atmega2564rfr2, 14, cfgtab_atmega256rfr2, // ISRs, Config /*ATmega2564RFR2*/ 271, rgftab_atmega2564rfr2, 2, UART_CLASSIC_2x12, // Register file, UART - /*ATmega2564RFR2*/ 7, ports_atmega64rfr2}, // Ports + /*ATmega2564RFR2*/ 7, ports_atmega64rfr2, WDT_CLASSIC4}, // Ports, WDT //ATmega3250 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega3250", 146, F_AVR8, {0x1E, 0x95, 0x06}, // ID /*ATmega3250*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega3250*/ 3, 1, 25, vtab_atmega6450p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega3250*/ 94, rgftab_atmega3250, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega3250*/ 9, ports_atmega3250}, // Ports + /*ATmega3250*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega3250A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega3250A", 147, F_AVR8, {0x1E, 0x95, 0x06}, // ID /*ATmega3250A*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega3250A*/ 3, 1, 25, vtab_atmega6450p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega3250A*/ 94, rgftab_atmega3250, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega3250A*/ 9, ports_atmega3250}, // Ports + /*ATmega3250A*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega3250P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega3250P", 148, F_AVR8, {0x1E, 0x95, 0x0E}, // ID /*ATmega3250P*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega3250P*/ 3, 1, 25, vtab_atmega6450p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega3250P*/ 94, rgftab_atmega3250, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega3250P*/ 9, ports_atmega3250}, // Ports + /*ATmega3250P*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega3250PA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega3250PA", 149, F_AVR8, {0x1E, 0x95, 0x0E}, // ID /*ATmega3250PA*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega3250PA*/ 3, 1, 25, vtab_atmega6450p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega3250PA*/ 94, rgftab_atmega3250, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega3250PA*/ 9, ports_atmega3250}, // Ports + /*ATmega3250PA*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega3290 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega3290", 150, F_AVR8, {0x1E, 0x95, 0x04}, // ID /*ATmega3290*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega3290*/ 3, 1, 25, vtab_atmega6490p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega3290*/ 118, rgftab_atmega3290, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega3290*/ 9, ports_atmega3250}, // Ports + /*ATmega3290*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega3290A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega3290A", 151, F_AVR8, {0x1E, 0x95, 0x04}, // ID /*ATmega3290A*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega3290A*/ 3, 1, 25, vtab_atmega6490p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega3290A*/ 118, rgftab_atmega3290, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega3290A*/ 9, ports_atmega3250}, // Ports + /*ATmega3290A*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega3290P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega3290P", 152, F_AVR8, {0x1E, 0x95, 0x0C}, // ID /*ATmega3290P*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega3290P*/ 3, 1, 25, vtab_atmega6490p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega3290P*/ 118, rgftab_atmega3290p, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega3290P*/ 9, ports_atmega3250}, // Ports + /*ATmega3290P*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega3290PA atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega3290PA", 153, F_AVR8, {0x1E, 0x95, 0x0C}, // ID /*ATmega3290PA*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATmega3290PA*/ 3, 1, 25, vtab_atmega6490p, 15, cfgtab_atmega325, // ISRs, Config /*ATmega3290PA*/ 118, rgftab_atmega3290pa, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega3290PA*/ 9, ports_atmega3250}, // Ports + /*ATmega3290PA*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega6450 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega6450", 154, F_AVR8, {0x1E, 0x96, 0x06}, // ID /*ATmega6450*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega6450*/ 3, 1, 25, vtab_atmega6450p, 15, cfgtab_atmega645, // ISRs, Config /*ATmega6450*/ 94, rgftab_atmega6450, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega6450*/ 9, ports_atmega3250}, // Ports + /*ATmega6450*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega6450A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega6450A", 155, F_AVR8, {0x1E, 0x96, 0x06}, // ID /*ATmega6450A*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega6450A*/ 3, 1, 25, vtab_atmega6450p, 15, cfgtab_atmega645, // ISRs, Config /*ATmega6450A*/ 94, rgftab_atmega6450, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega6450A*/ 9, ports_atmega3250}, // Ports + /*ATmega6450A*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega6450P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega6450P", 156, F_AVR8, {0x1E, 0x96, 0x0E}, // ID /*ATmega6450P*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega6450P*/ 3, 1, 25, vtab_atmega6450p, 15, cfgtab_atmega645, // ISRs, Config /*ATmega6450P*/ 94, rgftab_atmega6450, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega6450P*/ 9, ports_atmega3250}, // Ports + /*ATmega6450P*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega6490 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega6490", 157, F_AVR8, {0x1E, 0x96, 0x04}, // ID /*ATmega6490*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega6490*/ 3, 1, 25, vtab_atmega6490p, 15, cfgtab_atmega645, // ISRs, Config /*ATmega6490*/ 118, rgftab_atmega6490, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega6490*/ 9, ports_atmega3250}, // Ports + /*ATmega6490*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega6490A atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega6490A", 158, F_AVR8, {0x1E, 0x96, 0x04}, // ID /*ATmega6490A*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega6490A*/ 3, 1, 25, vtab_atmega6490p, 15, cfgtab_atmega645, // ISRs, Config /*ATmega6490A*/ 118, rgftab_atmega6490, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega6490A*/ 9, ports_atmega3250}, // Ports + /*ATmega6490A*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega6490P atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega6490P", 159, F_AVR8, {0x1E, 0x96, 0x0C}, // ID /*ATmega6490P*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*ATmega6490P*/ 3, 1, 25, vtab_atmega6490p, 15, cfgtab_atmega645, // ISRs, Config /*ATmega6490P*/ 118, rgftab_atmega6490, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega6490P*/ 9, ports_atmega3250}, // Ports + /*ATmega6490P*/ 9, ports_atmega3250, WDT_CLASSIC3}, // Ports, WDT //ATmega8515 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega8515", 160, F_AVR8, {0x1E, 0x93, 0x06}, // ID /*ATmega8515*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0060, 0x0200, // Mem /*ATmega8515*/ 2, 1, 17, vtab_atmega8515, 13, cfgtab_atmega8515, // ISRs, Config /*ATmega8515*/ 52, rgftab_atmega8515, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega8515*/ 5, ports_atmega8515}, // Ports + /*ATmega8515*/ 5, ports_atmega8515, WDT_CLASSIC3}, // Ports, WDT //ATmega8535 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega8535", 161, F_AVR8, {0x1E, 0x93, 0x08}, // ID /*ATmega8535*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0060, 0x0200, // Mem /*ATmega8535*/ 2, 1, 21, vtab_atmega8535, 13, cfgtab_atmega8535, // ISRs, Config /*ATmega8535*/ 67, rgftab_atmega8535, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATmega8535*/ 4, ports_atmega16}, // Ports + /*ATmega8535*/ 4, ports_atmega16, WDT_CLASSIC3}, // Ports, WDT //AT43USB320 avr-gcc 12.2.0 // Sources {"AT43USB320", 162, F_AVR8, {0xff, -1, -1}, // ID /*AT43USB320*/ 0, 0x10000, -1, -1, -1, 0, 0, -1, 0x0060, 0x0200, // Mem /*AT43USB320*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*AT43USB320*/ 0, NULL, 1, UART_CLASSIC_1x08, // Register file, UART - /*AT43USB320*/ -1, NULL}, // Ports + /*AT43USB320*/ -1, NULL, WDT_CLASSIC3}, // Ports, WDT //AT43USB355 avr-gcc 12.2.0 // Sources {"AT43USB355", 163, F_AVR8, {0xff, -1, -1}, // ID /*AT43USB355*/ 0, 0x06000, -1, -1, -1, 0, 0, -1, 0x0060, 0x0400, // Mem /*AT43USB355*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*AT43USB355*/ 0, NULL, 0, UART_UNKNOWN, // Register file, UART - /*AT43USB355*/ -1, NULL}, // Ports + /*AT43USB355*/ -1, NULL, WDT_CLASSIC3}, // Ports, WDT //AT76C711 avr-gcc 12.2.0 // Sources {"AT76C711", 164, F_AVR8, {0xff, -1, -1}, // ID /*AT76C711*/ 0, 0x04000, -1, -1, -1, 0, 0, -1, 0x0060, 0x07a0, // Mem /*AT76C711*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*AT76C711*/ 0, NULL, 0, UART_UNKNOWN, // Register file, UART - /*AT76C711*/ -1, NULL}, // Ports + /*AT76C711*/ -1, NULL, WDT_CLASSIC3}, // Ports, WDT //AT86RF401 avr-gcc 12.2.0 // Sources {"AT86RF401", 165, F_AVR8, {0x1E, 0x91, 0x81}, // ID /*AT86RF401*/ 0, 0x00800, -1, -1, -1, 0, 0x0080, -1, 0x0060, 0x0080, // Mem /*AT86RF401*/ 0, 1, 3, vtab_at86rf401, 0, NULL, // ISRs, Config /*AT86RF401*/ 0, NULL, 0, UART_NONE, // Register file, UART - /*AT86RF401*/ -1, NULL}, // Ports + /*AT86RF401*/ -1, NULL, WDT_CLASSIC3}, // Ports, WDT //AT89S51 avrdude // Sources {"AT89S51", 372, F_AVR8, {0x1E, 0x51, 0x06}, // ID /*AT89S51*/ 0, 0x01000, 0x001, 0, 0, 0, 0, 0, -1, -1, // Mem /*AT89S51*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*AT89S51*/ 0, NULL, 0, UART_UNKNOWN, // Register file, UART - /*AT89S51*/ -1, NULL}, // Ports + /*AT89S51*/ -1, NULL, WDT_UNKNOWN}, // Ports, WDT //AT89S52 avrdude // Sources {"AT89S52", 373, F_AVR8, {0x1E, 0x52, 0x06}, // ID /*AT89S52*/ 0, 0x02000, 0x001, 0, 0, 0, 0, 0, -1, -1, // Mem /*AT89S52*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*AT89S52*/ 0, NULL, 0, UART_UNKNOWN, // Register file, UART - /*AT89S52*/ -1, NULL}, // Ports + /*AT89S52*/ -1, NULL, WDT_UNKNOWN}, // Ports, WDT //AT90PWM1 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90PWM1", 166, F_AVR8, {0x1E, 0x93, 0x83}, // ID /*AT90PWM1*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*AT90PWM1*/ 3, 1, 32, vtab_at90pwm1, 17, cfgtab_at90pwm1, // ISRs, Config /*AT90PWM1*/ 92, rgftab_at90pwm1, 0, UART_NONE, // Register file, UART - /*AT90PWM1*/ 3, ports_at90pwm81}, // Ports + /*AT90PWM1*/ 3, ports_at90pwm81, WDT_CLASSIC4}, // Ports, WDT //AT90PWM2 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"AT90PWM2", 167, F_AVR8, {0x1E, 0x93, 0x81}, // ID /*AT90PWM2*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*AT90PWM2*/ 3, 1, 32, vtab_at90pwm2, 18, cfgtab_at90pwm2, // ISRs, Config /*AT90PWM2*/ 0, NULL, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90PWM2*/ 4, ports_atmega16m1}, // Ports + /*AT90PWM2*/ 4, ports_atmega16m1, WDT_CLASSIC4}, // Ports, WDT //AT90PWM2B atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90PWM2B", 168, F_AVR8, {0x1E, 0x93, 0x83}, // ID /*AT90PWM2B*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*AT90PWM2B*/ 3, 1, 32, vtab_at90pwm3b, 18, cfgtab_at90pwm2b, // ISRs, Config /*AT90PWM2B*/ 100, rgftab_at90pwm2b, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90PWM2B*/ 4, ports_atmega16m1}, // Ports + /*AT90PWM2B*/ 4, ports_atmega16m1, WDT_CLASSIC4}, // Ports, WDT //AT90PWM3 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90PWM3", 169, F_AVR8, {0x1E, 0x93, 0x81}, // ID /*AT90PWM3*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*AT90PWM3*/ 3, 1, 32, vtab_at90pwm3b, 18, cfgtab_at90pwm2, // ISRs, Config /*AT90PWM3*/ 115, rgftab_at90pwm3, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90PWM3*/ 4, ports_atmega16m1}, // Ports + /*AT90PWM3*/ 4, ports_atmega16m1, WDT_CLASSIC4}, // Ports, WDT //AT90PWM3B atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90PWM3B", 170, F_AVR8, {0x1E, 0x93, 0x83}, // ID /*AT90PWM3B*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*AT90PWM3B*/ 3, 1, 32, vtab_at90pwm3b, 18, cfgtab_at90pwm2b, // ISRs, Config /*AT90PWM3B*/ 115, rgftab_at90pwm3b, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90PWM3B*/ 4, ports_atmega16m1}, // Ports + /*AT90PWM3B*/ 4, ports_atmega16m1, WDT_CLASSIC4}, // Ports, WDT //AT90CAN32 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90CAN32", 171, F_AVR8, {0x1E, 0x95, 0x81}, // ID /*AT90CAN32*/ 0, 0x08000, 0x100, 4, 0x0400, 0, 0x0400, 8, 0x0100, 0x0800, // Mem /*AT90CAN32*/ 3, 1, 37, vtab_at90can128, 15, cfgtab_at90can32, // ISRs, Config /*AT90CAN32*/ 137, rgftab_at90can128, 2, UART_CLASSIC_2x12, // Register file, UART - /*AT90CAN32*/ 7, ports_at90can128}, // Ports + /*AT90CAN32*/ 7, ports_at90can128, WDT_CLASSIC3}, // Ports, WDT //AT90CAN64 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90CAN64", 172, F_AVR8, {0x1E, 0x96, 0x81}, // ID /*AT90CAN64*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*AT90CAN64*/ 3, 1, 37, vtab_at90can128, 15, cfgtab_at90can64, // ISRs, Config /*AT90CAN64*/ 137, rgftab_at90can128, 2, UART_CLASSIC_2x12, // Register file, UART - /*AT90CAN64*/ 7, ports_at90can128}, // Ports + /*AT90CAN64*/ 7, ports_at90can128, WDT_CLASSIC3}, // Ports, WDT //AT90PWM81 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90PWM81", 173, F_AVR8, {0x1E, 0x93, 0x88}, // ID /*AT90PWM81*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0100, // Mem /*AT90PWM81*/ 3, 1, 20, vtab_at90pwm161, 19, cfgtab_at90pwm81, // ISRs, Config /*AT90PWM81*/ 84, rgftab_at90pwm81, 0, UART_NONE, // Register file, UART - /*AT90PWM81*/ 3, ports_at90pwm81}, // Ports + /*AT90PWM81*/ 3, ports_at90pwm81, WDT_CLASSIC4}, // Ports, WDT //AT90USB82 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90USB82", 174, F_AVR8, {0x1E, 0x93, 0x82}, // ID /*AT90USB82*/ 0, 0x02000, 0x080, 4, 0x0200, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*AT90USB82*/ 3, 1, 29, vtab_atmega32u2, 15, cfgtab_at90usb162, // ISRs, Config /*AT90USB82*/ 92, rgftab_at90usb162, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90USB82*/ 3, ports_at90usb162}, // Ports + /*AT90USB82*/ 3, ports_at90usb162, WDT_CLASSIC4}, // Ports, WDT //AT90SCR100 avr-gcc 12.2.0, boot size (manual) // Sources {"AT90SCR100", 175, F_AVR8, {0x1E, 0x96, 0xC1}, // ID /*AT90SCR100*/ 0, 0x10000, 0x100, 4, 0x0200, 0, 0x0800, -1, 0x0100, 0x1000, // Mem /*AT90SCR100*/ 3, 1, 38, vtab_at90scr100h, 13, cfgtab_at90scr100h, // ISRs, Config /*AT90SCR100*/ 0, NULL, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90SCR100*/ 5, ports_at90scr100}, // Ports + /*AT90SCR100*/ 5, ports_at90scr100, WDT_CLASSIC4}, // Ports, WDT //AT90SCR100H xml, from AT90SCR100 // Sources {"AT90SCR100H", 376, F_AVR8, {0x1E, 0x96, 0xC1}, // ID /*AT90SCR100H*/ -1, 0x10000, 0x100, 4, 0x0200, 0, 0x0800, -1, 0x0100, 0x1000, // Mem /*AT90SCR100H*/ 3, 1, 38, vtab_at90scr100h, 13, cfgtab_at90scr100h, // ISRs, Config /*AT90SCR100H*/ 0, NULL, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90SCR100H*/ 5, ports_at90scr100}, // Ports + /*AT90SCR100H*/ 5, ports_at90scr100, WDT_CLASSIC4}, // Ports, WDT //AT90CAN128 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90CAN128", 176, F_AVR8, {0x1E, 0x97, 0x81}, // ID /*AT90CAN128*/ 0, 0x20000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0100, 0x1000, // Mem /*AT90CAN128*/ 3, 1, 37, vtab_at90can128, 15, cfgtab_at90can128, // ISRs, Config /*AT90CAN128*/ 137, rgftab_at90can128, 2, UART_CLASSIC_2x12, // Register file, UART - /*AT90CAN128*/ 7, ports_at90can128}, // Ports + /*AT90CAN128*/ 7, ports_at90can128, WDT_CLASSIC3}, // Ports, WDT //AT90PWM161 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90PWM161", 177, F_AVR8, {0x1E, 0x94, 0x8B}, // ID /*AT90PWM161*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*AT90PWM161*/ 3, 1, 20, vtab_at90pwm161, 19, cfgtab_at90pwm81, // ISRs, Config /*AT90PWM161*/ 86, rgftab_at90pwm161, 0, UART_NONE, // Register file, UART - /*AT90PWM161*/ 3, ports_at90pwm81}, // Ports + /*AT90PWM161*/ 3, ports_at90pwm81, WDT_CLASSIC4}, // Ports, WDT //AT90USB162 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90USB162", 178, F_AVR8, {0x1E, 0x94, 0x82}, // ID /*AT90USB162*/ 0, 0x04000, 0x080, 4, 0x0200, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*AT90USB162*/ 3, 1, 29, vtab_atmega32u2, 15, cfgtab_at90usb162, // ISRs, Config /*AT90USB162*/ 92, rgftab_at90usb162, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90USB162*/ 3, ports_at90usb162}, // Ports + /*AT90USB162*/ 3, ports_at90usb162, WDT_CLASSIC4}, // Ports, WDT //AT90PWM216 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90PWM216", 179, F_AVR8, {0x1E, 0x94, 0x83}, // ID /*AT90PWM216*/ 0, 0x04000, 0x080, 4, 0x0200, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*AT90PWM216*/ 3, 1, 32, vtab_at90pwm316, 18, cfgtab_at90pwm216, // ISRs, Config /*AT90PWM216*/ 102, rgftab_at90pwm216, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90PWM216*/ 4, ports_atmega16m1}, // Ports + /*AT90PWM216*/ 4, ports_atmega16m1, WDT_CLASSIC4}, // Ports, WDT //AT90PWM316 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90PWM316", 180, F_AVR8, {0x1E, 0x94, 0x83}, // ID /*AT90PWM316*/ 0, 0x04000, 0x080, 4, 0x0200, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*AT90PWM316*/ 3, 1, 32, vtab_at90pwm316, 18, cfgtab_at90pwm316, // ISRs, Config /*AT90PWM316*/ 117, rgftab_at90pwm316, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90PWM316*/ 4, ports_atmega16m1}, // Ports + /*AT90PWM316*/ 4, ports_atmega16m1, WDT_CLASSIC4}, // Ports, WDT //AT90USB646 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90USB646", 181, F_AVR8, {0x1E, 0x96, 0x82}, // ID /*AT90USB646*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*AT90USB646*/ 3, 1, 38, vtab_atmega32u6, 15, cfgtab_at90usb646, // ISRs, Config /*AT90USB646*/ 157, rgftab_at90usb646, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90USB646*/ 6, ports_atmega32u6}, // Ports + /*AT90USB646*/ 6, ports_atmega32u6, WDT_CLASSIC4}, // Ports, WDT //AT90USB647 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90USB647", 182, F_AVR8, {0x1E, 0x96, 0x82}, // ID /*AT90USB647*/ 0, 0x10000, 0x100, 4, 0x0400, 0, 0x0800, 8, 0x0100, 0x1000, // Mem /*AT90USB647*/ 3, 1, 38, vtab_atmega32u6, 15, cfgtab_at90usb646, // ISRs, Config /*AT90USB647*/ 157, rgftab_at90usb646, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90USB647*/ 6, ports_atmega32u6}, // Ports + /*AT90USB647*/ 6, ports_atmega32u6, WDT_CLASSIC4}, // Ports, WDT //AT90S1200 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"AT90S1200", 183, F_AVR8, {0x1E, 0x90, 0x01}, // ID /*AT90S1200*/ 0, 0x00400, 0x001, 0, 0, 0, 0x0040, 1, 0x0060, 0x0020, // Mem /*AT90S1200*/ 1, 1, 4, vtab_at90s1200, 3, cfgtab_at90s1200, // ISRs, Config /*AT90S1200*/ 0, NULL, 0, UART_NONE, // Register file, UART - /*AT90S1200*/ 2, ports_at90s1200}, // Ports + /*AT90S1200*/ 2, ports_at90s1200, WDT_CLASSIC3}, // Ports, WDT //AT90USB1286 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90USB1286", 184, F_AVR8, {0x1E, 0x97, 0x82}, // ID /*AT90USB1286*/ 0, 0x20000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0100, 0x2000, // Mem /*AT90USB1286*/ 3, 1, 38, vtab_atmega32u6, 15, cfgtab_at90usb1286, // ISRs, Config /*AT90USB1286*/ 132, rgftab_at90usb1286, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90USB1286*/ 6, ports_atmega32u6}, // Ports + /*AT90USB1286*/ 6, ports_atmega32u6, WDT_CLASSIC4}, // Ports, WDT //AT90USB1287 atdf, avr-gcc 12.2.0, avrdude // Sources {"AT90USB1287", 185, F_AVR8, {0x1E, 0x97, 0x82}, // ID /*AT90USB1287*/ 0, 0x20000, 0x100, 4, 0x0400, 0, 0x1000, 8, 0x0100, 0x2000, // Mem /*AT90USB1287*/ 3, 1, 38, vtab_atmega32u6, 15, cfgtab_at90usb1286, // ISRs, Config /*AT90USB1287*/ 157, rgftab_at90usb646, 1, UART_CLASSIC_2x12, // Register file, UART - /*AT90USB1287*/ 6, ports_atmega32u6}, // Ports + /*AT90USB1287*/ 6, ports_atmega32u6, WDT_CLASSIC4}, // Ports, WDT //AT90S2313 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"AT90S2313", 186, F_AVR8, {0x1E, 0x91, 0x01}, // ID /*AT90S2313*/ 0, 0x00800, 0x001, 0, 0, 0, 0x0080, 1, 0x0060, 0x0080, // Mem /*AT90S2313*/ 1, 1, 11, vtab_at90s2313, 3, cfgtab_at90s2313, // ISRs, Config /*AT90S2313*/ 0, NULL, 1, UART_CLASSIC_1x08, // Register file, UART - /*AT90S2313*/ 2, ports_at90s1200}, // Ports + /*AT90S2313*/ 2, ports_at90s1200, WDT_CLASSIC3}, // Ports, WDT //AT90S2323 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"AT90S2323", 187, F_AVR8, {0x1E, 0x91, 0x02}, // ID /*AT90S2323*/ 0, 0x00800, 0x001, 0, 0, 0, 0x0080, 1, 0x0060, 0x0080, // Mem /*AT90S2323*/ 1, 1, 3, vtab_attiny22, 3, cfgtab_at90s2323, // ISRs, Config /*AT90S2323*/ 0, NULL, 0, UART_NONE, // Register file, UART - /*AT90S2323*/ 1, ports_at90s2323}, // Ports + /*AT90S2323*/ 1, ports_at90s2323, WDT_CLASSIC3}, // Ports, WDT //AT90S2333 avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"AT90S2333", 188, F_AVR8, {0x1E, 0x91, 0x05}, // ID /*AT90S2333*/ 0, 0x00800, 0x001, 0, 0, 0, 0x0080, 1, 0x0060, 0x0080, // Mem /*AT90S2333*/ 1, 1, 14, vtab_at90s4433, 5, cfgtab_at90s2333, // ISRs, Config /*AT90S2333*/ 0, NULL, 1, UART_CLASSIC_1x12, // Register file, UART - /*AT90S2333*/ 3, ports_at90s2333}, // Ports + /*AT90S2333*/ 3, ports_at90s2333, WDT_CLASSIC3}, // Ports, WDT //AT90S2343 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"AT90S2343", 189, F_AVR8, {0x1E, 0x91, 0x03}, // ID /*AT90S2343*/ 0, 0x00800, 0x001, 0, 0, 0, 0x0080, 1, 0x0060, 0x0080, // Mem /*AT90S2343*/ 1, 1, 3, vtab_attiny22, 3, cfgtab_at90s2343, // ISRs, Config /*AT90S2343*/ 0, NULL, 0, UART_NONE, // Register file, UART - /*AT90S2343*/ 1, ports_attiny22}, // Ports + /*AT90S2343*/ 1, ports_attiny22, WDT_CLASSIC3}, // Ports, WDT //AT90S4414 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"AT90S4414", 190, F_AVR8, {0x1E, 0x92, 0x01}, // ID /*AT90S4414*/ 0, 0x01000, 0x001, 0, 0, 0, 0x0100, 1, 0x0060, 0x0100, // Mem /*AT90S4414*/ 1, 1, 13, vtab_at90s8515, 3, cfgtab_at90s2313, // ISRs, Config /*AT90S4414*/ 0, NULL, 1, UART_CLASSIC_1x08, // Register file, UART - /*AT90S4414*/ 4, ports_atmega16}, // Ports + /*AT90S4414*/ 4, ports_atmega16, WDT_CLASSIC3}, // Ports, WDT //AT90S4433 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"AT90S4433", 191, F_AVR8, {0x1E, 0x92, 0x03}, // ID /*AT90S4433*/ 0, 0x01000, 0x001, 0, 0, 0, 0x0100, 1, 0x0060, 0x0080, // Mem /*AT90S4433*/ 1, 1, 14, vtab_at90s4433, 5, cfgtab_at90s4433, // ISRs, Config /*AT90S4433*/ 0, NULL, 1, UART_CLASSIC_1x12, // Register file, UART - /*AT90S4433*/ 3, ports_at90s2333}, // Ports + /*AT90S4433*/ 3, ports_at90s2333, WDT_CLASSIC3}, // Ports, WDT //AT90S4434 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"AT90S4434", 192, F_AVR8, {0x1E, 0x92, 0x02}, // ID /*AT90S4434*/ 0, 0x01000, 0x001, 0, 0, 0, 0x0100, 1, 0x0060, 0x0100, // Mem /*AT90S4434*/ 1, 1, 17, vtab_at90s8535, 3, cfgtab_at90s2313, // ISRs, Config /*AT90S4434*/ 0, NULL, 1, UART_CLASSIC_1x08, // Register file, UART - /*AT90S4434*/ 4, ports_atmega16}, // Ports + /*AT90S4434*/ 4, ports_atmega16, WDT_CLASSIC3}, // Ports, WDT //AT90S8515 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"AT90S8515", 193, F_AVR8, {0x1E, 0x93, 0x01}, // ID /*AT90S8515*/ 0, 0x02000, 0x001, 0, 0, 0, 0x0200, 1, 0x0060, 0x0200, // Mem /*AT90S8515*/ 1, 1, 13, vtab_at90s8515, 3, cfgtab_at90s2313, // ISRs, Config /*AT90S8515*/ 0, NULL, 1, UART_CLASSIC_1x08, // Register file, UART - /*AT90S8515*/ 4, ports_atmega16}, // Ports + /*AT90S8515*/ 4, ports_atmega16, WDT_CLASSIC3}, // Ports, WDT //AT90S8515comp xml // Sources {"AT90S8515comp", 377, F_AVR8, {0x1E, 0x93, 0x01}, // ID /*AT90S8515comp*/ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, // Mem /*AT90S8515comp*/ -1, -1, 0, NULL, 13, cfgtab_at90s8515comp, // ISRs, Config /*AT90S8515comp*/ 0, NULL, 0, UART_UNKNOWN, // Register file, UART - /*AT90S8515comp*/ 0, NULL}, // Ports + /*AT90S8515comp*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //AT90C8534 avr-gcc 12.2.0 // Sources {"AT90C8534", 194, F_AVR8, {0xff, -1, -1}, // ID /*AT90C8534*/ 0, 0x02000, -1, -1, -1, 0, 0x0200, -1, 0x0060, 0x0100, // Mem /*AT90C8534*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*AT90C8534*/ 0, NULL, 0, UART_NONE, // Register file, UART - /*AT90C8534*/ -1, NULL}, // Ports + /*AT90C8534*/ -1, NULL, WDT_UNKNOWN}, // Ports, WDT //AT90S8535 xml, avr-gcc 12.2.0, avrdude, boot size (manual) // Sources {"AT90S8535", 195, F_AVR8, {0x1E, 0x93, 0x03}, // ID /*AT90S8535*/ 0, 0x02000, 0x001, 0, 0, 0, 0x0200, 1, 0x0060, 0x0200, // Mem /*AT90S8535*/ 1, 1, 17, vtab_at90s8535, 3, cfgtab_at90s2313, // ISRs, Config /*AT90S8535*/ 0, NULL, 1, UART_CLASSIC_1x08, // Register file, UART - /*AT90S8535*/ 4, ports_atmega16}, // Ports + /*AT90S8535*/ 4, ports_atmega16, WDT_CLASSIC3}, // Ports, WDT //AT90S8535comp xml // Sources {"AT90S8535comp", 378, F_AVR8, {0x1E, 0x93, 0x03}, // ID /*AT90S8535comp*/ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, // Mem /*AT90S8535comp*/ -1, -1, 0, NULL, 13, cfgtab_at90s8535comp, // ISRs, Config /*AT90S8535comp*/ 0, NULL, 0, UART_UNKNOWN, // Register file, UART - /*AT90S8535comp*/ 0, NULL}, // Ports + /*AT90S8535comp*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //AT94K avr-gcc 12.2.0 // Sources {"AT94K", 196, F_AVR8, {0xff, -1, -1}, // ID /*AT94K*/ 0, 0x08000, -1, -1, -1, 0, 0, -1, 0x0060, 0x0fa0, // Mem /*AT94K*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*AT94K*/ 0, NULL, 2, UART_CLASSIC_2x12, // Register file, UART - /*AT94K*/ -1, NULL}, // Ports + /*AT94K*/ -1, NULL, WDT_CLASSIC3}, // Ports, WDT //ATA5272 atdf, avr-gcc 12.2.0 // Sources {"ATA5272", 197, F_AVR8, {0x1E, 0x93, 0x87}, // ID /*ATA5272*/ 0, 0x02000, 0x080, 0, 0, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*ATA5272*/ 3, 1, 37, vtab_ata5272, 11, cfgtab_attiny87, // ISRs, Config /*ATA5272*/ 80, rgftab_ata5272, 1, UART_LIN, // Register file, UART - /*ATA5272*/ 2, ports_attiny87}, // Ports + /*ATA5272*/ 2, ports_attiny87, WDT_CLASSIC4}, // Ports, WDT //ATA5505 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATA5505", 198, F_AVR8, {0x1E, 0x94, 0x87}, // ID /*ATA5505*/ 0, 0x04000, 0x080, 0, 0, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*ATA5505*/ 3, 1, 20, vtab_attiny167, 11, cfgtab_attiny87, // ISRs, Config /*ATA5505*/ 80, rgftab_ata5272, 1, UART_LIN, // Register file, UART - /*ATA5505*/ 2, ports_attiny87}, // Ports + /*ATA5505*/ 2, ports_attiny87, WDT_CLASSIC4}, // Ports, WDT //ATA5700M322 atdf // Sources {"ATA5700M322", 199, F_AVR8, {0x1E, 0x95, 0x67}, // ID /*ATA5700M322*/ 0x08000, 0x08000, 0x040, 0, 0, 0, 0x0880, 16, 0x0200, 0x0400, // Mem /*ATA5700M322*/ 1, 1, 51, vtab_ata5702m322, 9, cfgtab_ata5700m322, // ISRs, Config /*ATA5700M322*/ 337, rgftab_ata5700m322, 0, UART_NONE, // Register file, UART - /*ATA5700M322*/ 0, NULL}, // Ports + /*ATA5700M322*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //ATA5702M322 atdf, avr-gcc 12.2.0 // Sources {"ATA5702M322", 200, F_AVR8, {0x1E, 0x95, 0x69}, // ID /*ATA5702M322*/ 0x08000, 0x08000, 0x040, 0, 0, 0, 0x0880, 16, 0x0200, 0x0400, // Mem /*ATA5702M322*/ 1, 1, 51, vtab_ata5702m322, 9, cfgtab_ata5700m322, // ISRs, Config /*ATA5702M322*/ 378, rgftab_ata5702m322, 0, UART_NONE, // Register file, UART - /*ATA5702M322*/ 3, ports_ata6285}, // Ports + /*ATA5702M322*/ 3, ports_ata6285, WDT_UNKNOWN}, // Ports, WDT //ATA5781 atdf // Sources {"ATA5781", 201, F_AVR8, {0x1E, 0x95, 0x64}, // ID /*ATA5781*/ -1, -1, -1, 0, 0, 0, 0x0400, 16, 0x0200, 0x0400, // Mem /*ATA5781*/ 1, 1, 42, vtab_ata8515, 11, cfgtab_ata5781, // ISRs, Config /*ATA5781*/ 262, rgftab_ata5781, 0, UART_NONE, // Register file, UART - /*ATA5781*/ 0, NULL}, // Ports + /*ATA5781*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //ATA5782 atdf, avr-gcc 12.2.0 // Sources {"ATA5782", 202, F_AVR8, {0x1E, 0x95, 0x65}, // ID /*ATA5782*/ 0x08000, 0x05000, 0x040, 1, 0x5000, 0, 0x0400, 16, 0x0200, 0x0400, // Mem /*ATA5782*/ 1, 1, 42, vtab_ata8515, 11, cfgtab_ata5781, // ISRs, Config /*ATA5782*/ 262, rgftab_ata5781, 0, UART_NONE, // Register file, UART - /*ATA5782*/ 2, ports_ata5782}, // Ports + /*ATA5782*/ 2, ports_ata5782, WDT_UNKNOWN}, // Ports, WDT //ATA5783 atdf // Sources {"ATA5783", 203, F_AVR8, {0x1E, 0x95, 0x66}, // ID /*ATA5783*/ -1, -1, -1, 0, 0, 0, 0x0400, 16, 0x0200, 0x0400, // Mem /*ATA5783*/ 1, 1, 42, vtab_ata8515, 11, cfgtab_ata5781, // ISRs, Config /*ATA5783*/ 262, rgftab_ata5781, 0, UART_NONE, // Register file, UART - /*ATA5783*/ 0, NULL}, // Ports + /*ATA5783*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //ATA5787 atdf // Sources {"ATA5787", 204, F_AVR8, {0x1E, 0x94, 0x6C}, // ID /*ATA5787*/ 0x08000, 0x05200, 0x040, 0, 0, 0, 0x0400, 16, 0x0200, 0x0800, // Mem /*ATA5787*/ 1, 1, 44, vtab_ata5835, 11, cfgtab_ata5787, // ISRs, Config /*ATA5787*/ 292, rgftab_ata5787, 1, UART_LIN, // Register file, UART - /*ATA5787*/ 0, NULL}, // Ports + /*ATA5787*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //ATA5790 atdf, avr-gcc 12.2.0 // Sources {"ATA5790", 205, F_AVR8, {0x1E, 0x94, 0x61}, // ID /*ATA5790*/ 0, 0x04000, 0x080, 1, 0x0800, 0, 0x0800, 16, 0x0100, 0x0200, // Mem /*ATA5790*/ 1, 1, 30, vtab_ata5790, 11, cfgtab_ata5790, // ISRs, Config /*ATA5790*/ 112, rgftab_ata5790, 0, UART_NONE, // Register file, UART - /*ATA5790*/ 3, ports_ata5790}, // Ports + /*ATA5790*/ 3, ports_ata5790, WDT_UNKNOWN}, // Ports, WDT //ATA5790N atdf, avr-gcc 12.2.0 // Sources {"ATA5790N", 206, F_AVR8, {0x1E, 0x94, 0x62}, // ID /*ATA5790N*/ 0, 0x04000, 0x080, 1, 0x0800, 0, 0x0800, 16, 0x0100, 0x0200, // Mem /*ATA5790N*/ 1, 1, 31, vtab_ata5791, 10, cfgtab_ata5790n, // ISRs, Config /*ATA5790N*/ 117, rgftab_ata5790n, 0, UART_NONE, // Register file, UART - /*ATA5790N*/ 3, ports_ata5790}, // Ports + /*ATA5790N*/ 3, ports_ata5790, WDT_UNKNOWN}, // Ports, WDT //ATA5791 atdf, avr-gcc 7.3.0 // Sources {"ATA5791", 207, F_AVR8, {0x1E, 0x94, 0x62}, // ID /*ATA5791*/ 0, 0x04000, 0x080, 1, 0x0800, 0, 0x0800, 16, 0x0100, 0x0200, // Mem /*ATA5791*/ 1, 1, 31, vtab_ata5791, 11, cfgtab_ata5790, // ISRs, Config /*ATA5791*/ 117, rgftab_ata5790n, 0, UART_NONE, // Register file, UART - /*ATA5791*/ 3, ports_ata5790}, // Ports + /*ATA5791*/ 3, ports_ata5790, WDT_UNKNOWN}, // Ports, WDT //ATA5795 atdf, avr-gcc 12.2.0 // Sources {"ATA5795", 208, F_AVR8, {0x1E, 0x93, 0x61}, // ID /*ATA5795*/ 0, 0x02000, 0x040, 1, 0x0800, 0, 0x0800, 16, 0x0100, 0x0200, // Mem /*ATA5795*/ 1, 1, 23, vtab_ata5795, 10, cfgtab_ata5790n, // ISRs, Config /*ATA5795*/ 84, rgftab_ata5795, 0, UART_NONE, // Register file, UART - /*ATA5795*/ 3, ports_ata5795}, // Ports + /*ATA5795*/ 3, ports_ata5795, WDT_UNKNOWN}, // Ports, WDT //ATA5831 atdf, avr-gcc 12.2.0 // Sources {"ATA5831", 209, F_AVR8, {0x1E, 0x95, 0x61}, // ID /*ATA5831*/ 0x08000, 0x05000, 0x040, 1, 0x5000, 0, 0x0400, 16, 0x0200, 0x0400, // Mem /*ATA5831*/ 1, 1, 42, vtab_ata8515, 11, cfgtab_ata5781, // ISRs, Config /*ATA5831*/ 279, rgftab_ata5831, 0, UART_NONE, // Register file, UART - /*ATA5831*/ 2, ports_ata5782}, // Ports + /*ATA5831*/ 2, ports_ata5782, WDT_UNKNOWN}, // Ports, WDT //ATA5832 atdf // Sources {"ATA5832", 210, F_AVR8, {0x1E, 0x95, 0x62}, // ID /*ATA5832*/ -1, -1, -1, 0, 0, 0, 0x0400, 16, 0x0200, 0x0400, // Mem /*ATA5832*/ 1, 1, 42, vtab_ata8515, 11, cfgtab_ata5781, // ISRs, Config /*ATA5832*/ 279, rgftab_ata5831, 0, UART_NONE, // Register file, UART - /*ATA5832*/ 0, NULL}, // Ports + /*ATA5832*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //ATA5833 atdf // Sources {"ATA5833", 211, F_AVR8, {0x1E, 0x95, 0x63}, // ID /*ATA5833*/ -1, -1, -1, 0, 0, 0, 0x0400, 16, 0x0200, 0x0400, // Mem /*ATA5833*/ 1, 1, 42, vtab_ata8515, 11, cfgtab_ata5781, // ISRs, Config /*ATA5833*/ 279, rgftab_ata5831, 0, UART_NONE, // Register file, UART - /*ATA5833*/ 0, NULL}, // Ports + /*ATA5833*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //ATA5835 atdf // Sources {"ATA5835", 212, F_AVR8, {0x1E, 0x94, 0x6B}, // ID /*ATA5835*/ 0x08000, 0x05200, 0x040, 0, 0, 0, 0x0400, 16, 0x0200, 0x0800, // Mem /*ATA5835*/ 1, 1, 44, vtab_ata5835, 11, cfgtab_ata5787, // ISRs, Config /*ATA5835*/ 307, rgftab_ata5835, 1, UART_LIN, // Register file, UART - /*ATA5835*/ 0, NULL}, // Ports + /*ATA5835*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //ATA6285 atdf, avr-gcc 12.2.0 // Sources {"ATA6285", 213, F_AVR8, {0x1E, 0x93, 0x82}, // ID /*ATA6285*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0140, 4, 0x0100, 0x0200, // Mem /*ATA6285*/ 2, 1, 27, vtab_ata6289, 17, cfgtab_ata6285, // ISRs, Config /*ATA6285*/ 79, rgftab_ata6285, 0, UART_NONE, // Register file, UART - /*ATA6285*/ 3, ports_ata6285}, // Ports + /*ATA6285*/ 3, ports_ata6285, WDT_UNKNOWN}, // Ports, WDT //ATA6286 atdf, avr-gcc 12.2.0 // Sources {"ATA6286", 214, F_AVR8, {0x1E, 0x93, 0x82}, // ID /*ATA6286*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0140, 4, 0x0100, 0x0200, // Mem /*ATA6286*/ 2, 1, 27, vtab_ata6289, 17, cfgtab_ata6285, // ISRs, Config /*ATA6286*/ 79, rgftab_ata6285, 0, UART_NONE, // Register file, UART - /*ATA6286*/ 3, ports_ata6285}, // Ports + /*ATA6286*/ 3, ports_ata6285, WDT_UNKNOWN}, // Ports, WDT //ATA6289 xml, avr-gcc 12.2.0, boot size (manual) // Sources {"ATA6289", 215, F_AVR8, {0x1E, 0x93, 0x82}, // ID /*ATA6289*/ 0, 0x02000, 0x040, 4, 0x0100, 0x00040, 0x0100, -1, 0x0100, 0x0200, // Mem /*ATA6289*/ 2, 1, 27, vtab_ata6289, 17, cfgtab_ata6289, // ISRs, Config /*ATA6289*/ 0, NULL, 0, UART_UNKNOWN, // Register file, UART - /*ATA6289*/ 3, ports_ata6289}, // Ports + /*ATA6289*/ 3, ports_ata6289, WDT_UNKNOWN}, // Ports, WDT //ATA6612C atdf, avr-gcc 12.2.0, avrdude // Sources {"ATA6612C", 216, F_AVR8, {0x1E, 0x93, 0x0A}, // ID /*ATA6612C*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATA6612C*/ 3, 1, 26, vtab_atmega328p, 14, cfgtab_atmega88, // ISRs, Config /*ATA6612C*/ 81, rgftab_ata6612c, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATA6612C*/ 3, ports_atmega328}, // Ports + /*ATA6612C*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATA6613C atdf, avr-gcc 12.2.0, avrdude // Sources {"ATA6613C", 217, F_AVR8, {0x1E, 0x94, 0x06}, // ID /*ATA6613C*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*ATA6613C*/ 3, 1, 26, vtab_atmega328p, 14, cfgtab_atmega168, // ISRs, Config /*ATA6613C*/ 81, rgftab_ata6612c, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATA6613C*/ 3, ports_atmega328}, // Ports + /*ATA6613C*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATA6614Q atdf, avr-gcc 12.2.0, avrdude // Sources {"ATA6614Q", 218, F_AVR8, {0x1E, 0x95, 0x0F}, // ID /*ATA6614Q*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*ATA6614Q*/ 3, 1, 26, vtab_atmega328p, 14, cfgtab_atmega328, // ISRs, Config /*ATA6614Q*/ 81, rgftab_ata6614q, 1, UART_CLASSIC_2x12, // Register file, UART - /*ATA6614Q*/ 3, ports_atmega328}, // Ports + /*ATA6614Q*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATA6616C atdf, avr-gcc 12.2.0, avrdude // Sources {"ATA6616C", 219, F_AVR8, {0x1E, 0x93, 0x87}, // ID /*ATA6616C*/ 0, 0x02000, 0x080, 0, 0, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*ATA6616C*/ 3, 1, 20, vtab_attiny167, 11, cfgtab_attiny87, // ISRs, Config /*ATA6616C*/ 81, rgftab_ata6616c, 1, UART_LIN, // Register file, UART - /*ATA6616C*/ 2, ports_attiny87}, // Ports + /*ATA6616C*/ 2, ports_attiny87, WDT_CLASSIC4}, // Ports, WDT //ATA6617C atdf, avr-gcc 12.2.0, avrdude // Sources {"ATA6617C", 220, F_AVR8, {0x1E, 0x94, 0x87}, // ID /*ATA6617C*/ 0, 0x04000, 0x080, 0, 0, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*ATA6617C*/ 3, 1, 20, vtab_attiny167, 11, cfgtab_attiny87, // ISRs, Config /*ATA6617C*/ 81, rgftab_ata6616c, 1, UART_LIN, // Register file, UART - /*ATA6617C*/ 2, ports_attiny87}, // Ports + /*ATA6617C*/ 2, ports_attiny87, WDT_CLASSIC4}, // Ports, WDT //ATA8210 atdf, avr-gcc 7.3.0 // Sources {"ATA8210", 221, F_AVR8, {0x1E, 0x95, 0x65}, // ID /*ATA8210*/ 0x08000, 0x05000, 0x040, 1, 0x5000, 0, 0x0400, 16, 0x0200, 0x0400, // Mem /*ATA8210*/ 1, 1, 42, vtab_ata8515, 11, cfgtab_ata5781, // ISRs, Config /*ATA8210*/ 262, rgftab_ata5781, 0, UART_NONE, // Register file, UART - /*ATA8210*/ 2, ports_ata5782}, // Ports + /*ATA8210*/ 2, ports_ata5782, WDT_UNKNOWN}, // Ports, WDT //ATA8215 atdf // Sources {"ATA8215", 222, F_AVR8, {0x1E, 0x95, 0x64}, // ID /*ATA8215*/ -1, -1, -1, 0, 0, 0, 0x0400, 16, 0x0200, 0x0400, // Mem /*ATA8215*/ 1, 1, 42, vtab_ata8515, 11, cfgtab_ata5781, // ISRs, Config /*ATA8215*/ 262, rgftab_ata5781, 0, UART_NONE, // Register file, UART - /*ATA8215*/ 0, NULL}, // Ports + /*ATA8215*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //ATA8510 atdf, avr-gcc 7.3.0 // Sources {"ATA8510", 223, F_AVR8, {0x1E, 0x95, 0x61}, // ID /*ATA8510*/ 0x08000, 0x05000, 0x040, 1, 0x5000, 0, 0x0400, 16, 0x0200, 0x0400, // Mem /*ATA8510*/ 1, 1, 42, vtab_ata8515, 11, cfgtab_ata5781, // ISRs, Config /*ATA8510*/ 279, rgftab_ata5831, 0, UART_NONE, // Register file, UART - /*ATA8510*/ 2, ports_ata5782}, // Ports + /*ATA8510*/ 2, ports_ata5782, WDT_UNKNOWN}, // Ports, WDT //ATA8515 atdf // Sources {"ATA8515", 224, F_AVR8, {0x1E, 0x95, 0x63}, // ID /*ATA8515*/ -1, -1, -1, 0, 0, 0, 0x0400, 16, 0x0200, 0x0400, // Mem /*ATA8515*/ 1, 1, 42, vtab_ata8515, 11, cfgtab_ata5781, // ISRs, Config /*ATA8515*/ 279, rgftab_ata5831, 0, UART_NONE, // Register file, UART - /*ATA8515*/ 0, NULL}, // Ports + /*ATA8515*/ 0, NULL, WDT_UNKNOWN}, // Ports, WDT //ATA664251 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATA664251", 225, F_AVR8, {0x1E, 0x94, 0x87}, // ID /*ATA664251*/ 0, 0x04000, 0x080, 0, 0, 0, 0x0200, 4, 0x0100, 0x0200, // Mem /*ATA664251*/ 3, 1, 20, vtab_attiny167, 11, cfgtab_attiny87, // ISRs, Config /*ATA664251*/ 81, rgftab_ata6616c, 1, UART_LIN, // Register file, UART - /*ATA664251*/ 2, ports_attiny87}, // Ports + /*ATA664251*/ 2, ports_attiny87, WDT_CLASSIC4}, // Ports, WDT //M3000 avr-gcc 12.2.0 // Sources {"M3000", 226, F_AVR8, {0xff, -1, -1}, // ID /*M3000*/ 0, 0x10000, -1, -1, -1, 0, 0, -1, 0x1000, 0x1000, // Mem /*M3000*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*M3000*/ 0, NULL, 1, UART_CLASSIC_2x12, // Register file, UART - /*M3000*/ -1, NULL}, // Ports + /*M3000*/ -1, NULL, WDT_UNKNOWN}, // Ports, WDT //LGT8F88P avrdude, from ATmega88 // Sources {"LGT8F88P", 227, F_AVR8, {0x1E, 0x93, 0x0F}, // ID /*LGT8F88P*/ 0, 0x02000, 0x040, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*LGT8F88P*/ -1, -1, 26, vtab_atmega328p, 0, NULL, // ISRs, Config /*LGT8F88P*/ 81, rgftab_atmega88, 1, UART_CLASSIC_2x12, // Register file, UART - /*LGT8F88P*/ 3, ports_atmega328}, // Ports + /*LGT8F88P*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //LGT8F168P avrdude, from ATmega168P // Sources {"LGT8F168P", 228, F_AVR8, {0x1E, 0x94, 0x0B}, // ID /*LGT8F168P*/ 0, 0x04000, 0x080, 4, 0x0100, 0, 0x0200, 4, 0x0100, 0x0400, // Mem /*LGT8F168P*/ -1, -1, 26, vtab_atmega328p, 0, NULL, // ISRs, Config /*LGT8F168P*/ 81, rgftab_atmega88, 1, UART_CLASSIC_2x12, // Register file, UART - /*LGT8F168P*/ 3, ports_atmega328}, // Ports + /*LGT8F168P*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //LGT8F328P avrdude, from ATmega328P // Sources {"LGT8F328P", 229, F_AVR8, {0x1E, 0x95, 0x0F}, // ID /*LGT8F328P*/ 0, 0x08000, 0x080, 4, 0x0200, 0, 0x0400, 4, 0x0100, 0x0800, // Mem /*LGT8F328P*/ -1, -1, 26, vtab_atmega328p, 0, NULL, // ISRs, Config /*LGT8F328P*/ 81, rgftab_atmega328, 1, UART_CLASSIC_2x12, // Register file, UART - /*LGT8F328P*/ 3, ports_atmega328}, // Ports + /*LGT8F328P*/ 3, ports_atmega328, WDT_CLASSIC4}, // Ports, WDT //ATxmega8E5 atdf, avr-gcc 12.2.0, avrdude // Sources @@ -1813,350 +1813,350 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown /*ATxmega8E5*/ 0, 0x02800, 0x080, 1, 0x0800, 0, 0x0200, 32, 0x2000, 0x0400, // Mem /*ATxmega8E5*/ 7, 1, 43, vtab_atxmega32e5, 17, cfgtab_atxmega16e5, // ISRs, Config /*ATxmega8E5*/ 438, rgftab_atxmega16e5, 2, UART_XMEGA, // Register file, UART - /*ATxmega8E5*/ 4, ports_atxmega16e5}, // Ports + /*ATxmega8E5*/ 4, ports_atxmega16e5, WDT_XMEGA}, // Ports, WDT //ATxmega16A4 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega16A4", 231, F_XMEGA, {0x1E, 0x94, 0x41}, // ID /*ATxmega16A4*/ 0, 0x05000, 0x100, 1, 0x1000, 0, 0x0400, 32, 0x2000, 0x0800, // Mem /*ATxmega16A4*/ 6, 1, 94, vtab_atxmega32a4, 16, cfgtab_atxmega16a4, // ISRs, Config /*ATxmega16A4*/ 553, rgftab_atxmega16a4, 5, UART_XMEGA, // Register file, UART - /*ATxmega16A4*/ 0, NULL}, // Ports + /*ATxmega16A4*/ 0, NULL, WDT_XMEGA}, // Ports, WDT //ATxmega16A4U atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega16A4U", 232, F_XMEGA, {0x1E, 0x94, 0x41}, // ID /*ATxmega16A4U*/ 0, 0x05000, 0x100, 1, 0x1000, 0, 0x0400, 32, 0x2000, 0x0800, // Mem /*ATxmega16A4U*/ 6, 1, 127, vtab_atxmega128a4u, 17, cfgtab_atxmega128a3u, // ISRs, Config /*ATxmega16A4U*/ 630, rgftab_atxmega16a4u, 5, UART_XMEGA, // Register file, UART - /*ATxmega16A4U*/ 6, ports_atxmega16a4u}, // Ports + /*ATxmega16A4U*/ 6, ports_atxmega16a4u, WDT_XMEGA}, // Ports, WDT //ATxmega16C4 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega16C4", 233, F_XMEGA, {0x1E, 0x94, 0x43}, // ID /*ATxmega16C4*/ 0, 0x05000, 0x100, 1, 0x1000, 0, 0x0400, 32, 0x2000, 0x0800, // Mem /*ATxmega16C4*/ 6, 1, 127, vtab_atxmega32c4, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega16C4*/ 482, rgftab_atxmega16c4, 3, UART_XMEGA, // Register file, UART - /*ATxmega16C4*/ 6, ports_atxmega16a4u}, // Ports + /*ATxmega16C4*/ 6, ports_atxmega16a4u, WDT_XMEGA}, // Ports, WDT //ATxmega16D4 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega16D4", 234, F_XMEGA, {0x1E, 0x94, 0x42}, // ID /*ATxmega16D4*/ 0, 0x05000, 0x100, 1, 0x1000, 0, 0x0400, 32, 0x2000, 0x0800, // Mem /*ATxmega16D4*/ 6, 1, 91, vtab_atxmega32d4, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega16D4*/ 460, rgftab_atxmega16d4, 2, UART_XMEGA, // Register file, UART - /*ATxmega16D4*/ 6, ports_atxmega16a4u}, // Ports + /*ATxmega16D4*/ 6, ports_atxmega16a4u, WDT_XMEGA}, // Ports, WDT //ATxmega16E5 atdf, avr-gcc 7.3.0, avrdude // Sources {"ATxmega16E5", 235, F_XMEGA, {0x1E, 0x94, 0x45}, // ID /*ATxmega16E5*/ 0, 0x05000, 0x080, 1, 0x1000, 0, 0x0200, 32, 0x2000, 0x0800, // Mem /*ATxmega16E5*/ 7, 1, 43, vtab_atxmega32e5, 17, cfgtab_atxmega16e5, // ISRs, Config /*ATxmega16E5*/ 438, rgftab_atxmega16e5, 2, UART_XMEGA, // Register file, UART - /*ATxmega16E5*/ 4, ports_atxmega16e5}, // Ports + /*ATxmega16E5*/ 4, ports_atxmega16e5, WDT_XMEGA}, // Ports, WDT //ATxmega32C3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega32C3", 236, F_XMEGA, {0x1E, 0x95, 0x49}, // ID /*ATxmega32C3*/ 0, 0x09000, 0x100, 1, 0x1000, 0, 0x0400, 32, 0x2000, 0x1000, // Mem /*ATxmega32C3*/ 6, 1, 127, vtab_atxmega256c3, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega32C3*/ 569, rgftab_atxmega32c3, 3, UART_XMEGA, // Register file, UART - /*ATxmega32C3*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega32C3*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega32D3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega32D3", 237, F_XMEGA, {0x1E, 0x95, 0x4A}, // ID /*ATxmega32D3*/ 0, 0x09000, 0x100, 1, 0x1000, 0, 0x0400, 32, 0x2000, 0x1000, // Mem /*ATxmega32D3*/ 6, 1, 114, vtab_atxmega384d3, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega32D3*/ 567, rgftab_atxmega32d3, 3, UART_XMEGA, // Register file, UART - /*ATxmega32D3*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega32D3*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega32A4 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega32A4", 238, F_XMEGA, {0x1E, 0x95, 0x41}, // ID /*ATxmega32A4*/ 0, 0x09000, 0x100, 1, 0x1000, 0, 0x0400, 32, 0x2000, 0x1000, // Mem /*ATxmega32A4*/ 6, 1, 94, vtab_atxmega32a4, 16, cfgtab_atxmega16a4, // ISRs, Config /*ATxmega32A4*/ 553, rgftab_atxmega16a4, 5, UART_XMEGA, // Register file, UART - /*ATxmega32A4*/ 0, NULL}, // Ports + /*ATxmega32A4*/ 0, NULL, WDT_XMEGA}, // Ports, WDT //ATxmega32A4U atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega32A4U", 239, F_XMEGA, {0x1E, 0x95, 0x41}, // ID /*ATxmega32A4U*/ 0, 0x09000, 0x100, 1, 0x1000, 0, 0x0400, 32, 0x2000, 0x1000, // Mem /*ATxmega32A4U*/ 6, 1, 127, vtab_atxmega128a4u, 17, cfgtab_atxmega128a3u, // ISRs, Config /*ATxmega32A4U*/ 630, rgftab_atxmega16a4u, 5, UART_XMEGA, // Register file, UART - /*ATxmega32A4U*/ 6, ports_atxmega16a4u}, // Ports + /*ATxmega32A4U*/ 6, ports_atxmega16a4u, WDT_XMEGA}, // Ports, WDT //ATxmega32C4 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega32C4", 240, F_XMEGA, {0x1E, 0x95, 0x44}, // ID /*ATxmega32C4*/ 0, 0x09000, 0x100, 1, 0x1000, 0, 0x0400, 32, 0x2000, 0x1000, // Mem /*ATxmega32C4*/ 6, 1, 127, vtab_atxmega32c4, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega32C4*/ 482, rgftab_atxmega16c4, 3, UART_XMEGA, // Register file, UART - /*ATxmega32C4*/ 6, ports_atxmega16a4u}, // Ports + /*ATxmega32C4*/ 6, ports_atxmega16a4u, WDT_XMEGA}, // Ports, WDT //ATxmega32D4 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega32D4", 241, F_XMEGA, {0x1E, 0x95, 0x42}, // ID /*ATxmega32D4*/ 0, 0x09000, 0x100, 1, 0x1000, 0, 0x0400, 32, 0x2000, 0x1000, // Mem /*ATxmega32D4*/ 6, 1, 91, vtab_atxmega32d4, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega32D4*/ 460, rgftab_atxmega16d4, 2, UART_XMEGA, // Register file, UART - /*ATxmega32D4*/ 6, ports_atxmega16a4u}, // Ports + /*ATxmega32D4*/ 6, ports_atxmega16a4u, WDT_XMEGA}, // Ports, WDT //ATxmega32E5 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega32E5", 242, F_XMEGA, {0x1E, 0x95, 0x4C}, // ID /*ATxmega32E5*/ 0, 0x09000, 0x080, 1, 0x1000, 0, 0x0400, 32, 0x2000, 0x1000, // Mem /*ATxmega32E5*/ 7, 1, 43, vtab_atxmega32e5, 17, cfgtab_atxmega16e5, // ISRs, Config /*ATxmega32E5*/ 438, rgftab_atxmega16e5, 2, UART_XMEGA, // Register file, UART - /*ATxmega32E5*/ 4, ports_atxmega16e5}, // Ports + /*ATxmega32E5*/ 4, ports_atxmega16e5, WDT_XMEGA}, // Ports, WDT //ATxmega64A1 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega64A1", 243, F_XMEGA, {0x1E, 0x96, 0x4E}, // ID /*ATxmega64A1*/ 0, 0x11000, 0x100, 1, 0x1000, 0, 0x0800, 32, 0x2000, 0x1000, // Mem /*ATxmega64A1*/ 6, 1, 125, vtab_atxmega128a1revd, 16, cfgtab_atxmega128a3, // ISRs, Config /*ATxmega64A1*/ 814, rgftab_atxmega64a1, 8, UART_XMEGA, // Register file, UART - /*ATxmega64A1*/ 0, NULL}, // Ports + /*ATxmega64A1*/ 0, NULL, WDT_XMEGA}, // Ports, WDT //ATxmega64A1U atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega64A1U", 244, F_XMEGA, {0x1E, 0x96, 0x4E}, // ID /*ATxmega64A1U*/ 0, 0x11000, 0x100, 1, 0x1000, 0, 0x0800, 32, 0x2000, 0x1000, // Mem /*ATxmega64A1U*/ 6, 1, 127, vtab_atxmega128a1u, 17, cfgtab_atxmega128a3u, // ISRs, Config /*ATxmega64A1U*/ 943, rgftab_atxmega64a1u, 8, UART_XMEGA, // Register file, UART - /*ATxmega64A1U*/ 11, ports_atxmega64a1u}, // Ports + /*ATxmega64A1U*/ 11, ports_atxmega64a1u, WDT_XMEGA}, // Ports, WDT //ATxmega64B1 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega64B1", 245, F_XMEGA, {0x1E, 0x96, 0x52}, // ID /*ATxmega64B1*/ 0, 0x11000, 0x100, 1, 0x1000, 0, 0x0800, 32, 0x2000, 0x1000, // Mem /*ATxmega64B1*/ 6, 1, 81, vtab_atxmega128b1, 17, cfgtab_atxmega64b1, // ISRs, Config /*ATxmega64B1*/ 574, rgftab_atxmega64b1, 2, UART_XMEGA, // Register file, UART - /*ATxmega64B1*/ 8, ports_atxmega64b1}, // Ports + /*ATxmega64B1*/ 8, ports_atxmega64b1, WDT_XMEGA}, // Ports, WDT //ATxmega64A3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega64A3", 246, F_XMEGA, {0x1E, 0x96, 0x42}, // ID /*ATxmega64A3*/ 0, 0x11000, 0x100, 1, 0x1000, 0, 0x0800, 32, 0x2000, 0x1000, // Mem /*ATxmega64A3*/ 6, 1, 122, vtab_atxmega256a3, 16, cfgtab_atxmega128a3, // ISRs, Config /*ATxmega64A3*/ 680, rgftab_atxmega128a3, 7, UART_XMEGA, // Register file, UART - /*ATxmega64A3*/ 0, NULL}, // Ports + /*ATxmega64A3*/ 0, NULL, WDT_XMEGA}, // Ports, WDT //ATxmega64A3U atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega64A3U", 247, F_XMEGA, {0x1E, 0x96, 0x42}, // ID /*ATxmega64A3U*/ 0, 0x11000, 0x100, 1, 0x1000, 0, 0x0800, 32, 0x2000, 0x1000, // Mem /*ATxmega64A3U*/ 6, 1, 127, vtab_atxmega256a3u, 17, cfgtab_atxmega128a3u, // ISRs, Config /*ATxmega64A3U*/ 792, rgftab_atxmega128a3u, 7, UART_XMEGA, // Register file, UART - /*ATxmega64A3U*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega64A3U*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega64B3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega64B3", 248, F_XMEGA, {0x1E, 0x96, 0x51}, // ID /*ATxmega64B3*/ 0, 0x11000, 0x100, 1, 0x1000, 0, 0x0800, 32, 0x2000, 0x1000, // Mem /*ATxmega64B3*/ 6, 1, 54, vtab_atxmega128b3, 17, cfgtab_atxmega64b1, // ISRs, Config /*ATxmega64B3*/ 458, rgftab_atxmega64b3, 1, UART_XMEGA, // Register file, UART - /*ATxmega64B3*/ 6, ports_atxmega64b3}, // Ports + /*ATxmega64B3*/ 6, ports_atxmega64b3, WDT_XMEGA}, // Ports, WDT //ATxmega64C3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega64C3", 249, F_XMEGA, {0x1E, 0x96, 0x49}, // ID /*ATxmega64C3*/ 0, 0x11000, 0x100, 1, 0x1000, 0, 0x0800, 32, 0x2000, 0x1000, // Mem /*ATxmega64C3*/ 6, 1, 127, vtab_atxmega256c3, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega64C3*/ 569, rgftab_atxmega32c3, 3, UART_XMEGA, // Register file, UART - /*ATxmega64C3*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega64C3*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega64D3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega64D3", 250, F_XMEGA, {0x1E, 0x96, 0x4A}, // ID /*ATxmega64D3*/ 0, 0x11000, 0x100, 1, 0x1000, 0, 0x0800, 32, 0x2000, 0x1000, // Mem /*ATxmega64D3*/ 6, 1, 114, vtab_atxmega384d3, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega64D3*/ 567, rgftab_atxmega32d3, 3, UART_XMEGA, // Register file, UART - /*ATxmega64D3*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega64D3*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega64A4 avrdude // Sources {"ATxmega64A4", 251, F_XMEGA, {0x1E, 0x96, 0x46}, // ID /*ATxmega64A4*/ 0, 0x11000, 0x100, 1, 0x1000, 0, 0x0800, 32, 0x2000, 0x1000, // Mem /*ATxmega64A4*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*ATxmega64A4*/ 0, NULL, 0, UART_XMEGA, // Register file, UART - /*ATxmega64A4*/ -1, NULL}, // Ports + /*ATxmega64A4*/ -1, NULL, WDT_UNKNOWN}, // Ports, WDT //ATxmega64A4U atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega64A4U", 252, F_XMEGA, {0x1E, 0x96, 0x46}, // ID /*ATxmega64A4U*/ 0, 0x11000, 0x100, 1, 0x1000, 0, 0x0800, 32, 0x2000, 0x1000, // Mem /*ATxmega64A4U*/ 6, 1, 127, vtab_atxmega128a4u, 17, cfgtab_atxmega128a3u, // ISRs, Config /*ATxmega64A4U*/ 632, rgftab_atxmega64a4u, 5, UART_XMEGA, // Register file, UART - /*ATxmega64A4U*/ 6, ports_atxmega16a4u}, // Ports + /*ATxmega64A4U*/ 6, ports_atxmega16a4u, WDT_XMEGA}, // Ports, WDT //ATxmega64D4 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega64D4", 253, F_XMEGA, {0x1E, 0x96, 0x47}, // ID /*ATxmega64D4*/ 0, 0x11000, 0x100, 1, 0x1000, 0, 0x0800, 32, 0x2000, 0x1000, // Mem /*ATxmega64D4*/ 6, 1, 91, vtab_atxmega128d4, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega64D4*/ 460, rgftab_atxmega64d4, 2, UART_XMEGA, // Register file, UART - /*ATxmega64D4*/ 6, ports_atxmega16a4u}, // Ports + /*ATxmega64D4*/ 6, ports_atxmega16a4u, WDT_XMEGA}, // Ports, WDT //ATxmega128A1 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega128A1", 254, F_XMEGA, {0x1E, 0x97, 0x4C}, // ID /*ATxmega128A1*/ 0, 0x22000, 0x200, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x2000, // Mem /*ATxmega128A1*/ 6, 1, 125, vtab_atxmega128a1revd, 16, cfgtab_atxmega128a3, // ISRs, Config /*ATxmega128A1*/ 814, rgftab_atxmega64a1, 8, UART_XMEGA, // Register file, UART - /*ATxmega128A1*/ 0, NULL}, // Ports + /*ATxmega128A1*/ 0, NULL, WDT_XMEGA}, // Ports, WDT //ATxmega128A1revD avrdude, from ATxmega128A1 // Sources {"ATxmega128A1revD", 255, F_XMEGA, {0x1E, 0x97, 0x41}, // ID /*ATxmega128A1revD*/ 0, 0x22000, 0x200, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x2000, // Mem /*ATxmega128A1revD*/ 6, 1, 125, vtab_atxmega128a1revd, 16, cfgtab_atxmega128a3, // ISRs, Config /*ATxmega128A1revD*/ 814, rgftab_atxmega64a1, 8, UART_XMEGA, // Register file, UART - /*ATxmega128A1revD*/ 0, NULL}, // Ports + /*ATxmega128A1revD*/ 0, NULL, WDT_XMEGA}, // Ports, WDT //ATxmega128A1U atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega128A1U", 256, F_XMEGA, {0x1E, 0x97, 0x4C}, // ID /*ATxmega128A1U*/ 0, 0x22000, 0x200, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x2000, // Mem /*ATxmega128A1U*/ 6, 1, 127, vtab_atxmega128a1u, 17, cfgtab_atxmega128a3u, // ISRs, Config /*ATxmega128A1U*/ 943, rgftab_atxmega64a1u, 8, UART_XMEGA, // Register file, UART - /*ATxmega128A1U*/ 11, ports_atxmega64a1u}, // Ports + /*ATxmega128A1U*/ 11, ports_atxmega64a1u, WDT_XMEGA}, // Ports, WDT //ATxmega128B1 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega128B1", 257, F_XMEGA, {0x1E, 0x97, 0x4D}, // ID /*ATxmega128B1*/ 0, 0x22000, 0x100, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x2000, // Mem /*ATxmega128B1*/ 6, 1, 81, vtab_atxmega128b1, 17, cfgtab_atxmega64b1, // ISRs, Config /*ATxmega128B1*/ 574, rgftab_atxmega64b1, 2, UART_XMEGA, // Register file, UART - /*ATxmega128B1*/ 8, ports_atxmega64b1}, // Ports + /*ATxmega128B1*/ 8, ports_atxmega64b1, WDT_XMEGA}, // Ports, WDT //ATxmega128A3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega128A3", 258, F_XMEGA, {0x1E, 0x97, 0x42}, // ID /*ATxmega128A3*/ 0, 0x22000, 0x200, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x2000, // Mem /*ATxmega128A3*/ 6, 1, 122, vtab_atxmega256a3, 16, cfgtab_atxmega128a3, // ISRs, Config /*ATxmega128A3*/ 680, rgftab_atxmega128a3, 7, UART_XMEGA, // Register file, UART - /*ATxmega128A3*/ 0, NULL}, // Ports + /*ATxmega128A3*/ 0, NULL, WDT_XMEGA}, // Ports, WDT //ATxmega128A3U atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega128A3U", 259, F_XMEGA, {0x1E, 0x97, 0x42}, // ID /*ATxmega128A3U*/ 0, 0x22000, 0x200, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x2000, // Mem /*ATxmega128A3U*/ 6, 1, 127, vtab_atxmega256a3u, 17, cfgtab_atxmega128a3u, // ISRs, Config /*ATxmega128A3U*/ 792, rgftab_atxmega128a3u, 7, UART_XMEGA, // Register file, UART - /*ATxmega128A3U*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega128A3U*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega128B3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega128B3", 260, F_XMEGA, {0x1E, 0x97, 0x4B}, // ID /*ATxmega128B3*/ 0, 0x22000, 0x100, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x2000, // Mem /*ATxmega128B3*/ 6, 1, 54, vtab_atxmega128b3, 17, cfgtab_atxmega64b1, // ISRs, Config /*ATxmega128B3*/ 458, rgftab_atxmega64b3, 1, UART_XMEGA, // Register file, UART - /*ATxmega128B3*/ 6, ports_atxmega64b3}, // Ports + /*ATxmega128B3*/ 6, ports_atxmega64b3, WDT_XMEGA}, // Ports, WDT //ATxmega128C3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega128C3", 261, F_XMEGA, {0x1E, 0x97, 0x52}, // ID /*ATxmega128C3*/ 0, 0x22000, 0x200, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x2000, // Mem /*ATxmega128C3*/ 6, 1, 127, vtab_atxmega256c3, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega128C3*/ 569, rgftab_atxmega32c3, 3, UART_XMEGA, // Register file, UART - /*ATxmega128C3*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega128C3*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega128D3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega128D3", 262, F_XMEGA, {0x1E, 0x97, 0x48}, // ID /*ATxmega128D3*/ 0, 0x22000, 0x200, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x2000, // Mem /*ATxmega128D3*/ 6, 1, 114, vtab_atxmega384d3, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega128D3*/ 567, rgftab_atxmega32d3, 3, UART_XMEGA, // Register file, UART - /*ATxmega128D3*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega128D3*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega128A4 avrdude // Sources {"ATxmega128A4", 263, F_XMEGA, {0x1E, 0x97, 0x46}, // ID /*ATxmega128A4*/ 0, 0x22000, 0x100, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x2000, // Mem /*ATxmega128A4*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*ATxmega128A4*/ 0, NULL, 0, UART_XMEGA, // Register file, UART - /*ATxmega128A4*/ -1, NULL}, // Ports + /*ATxmega128A4*/ -1, NULL, WDT_UNKNOWN}, // Ports, WDT //ATxmega128A4U atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega128A4U", 264, F_XMEGA, {0x1E, 0x97, 0x46}, // ID /*ATxmega128A4U*/ 0, 0x22000, 0x100, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x2000, // Mem /*ATxmega128A4U*/ 6, 1, 127, vtab_atxmega128a4u, 17, cfgtab_atxmega128a3u, // ISRs, Config /*ATxmega128A4U*/ 632, rgftab_atxmega64a4u, 5, UART_XMEGA, // Register file, UART - /*ATxmega128A4U*/ 6, ports_atxmega16a4u}, // Ports + /*ATxmega128A4U*/ 6, ports_atxmega16a4u, WDT_XMEGA}, // Ports, WDT //ATxmega128D4 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega128D4", 265, F_XMEGA, {0x1E, 0x97, 0x47}, // ID /*ATxmega128D4*/ 0, 0x22000, 0x100, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x2000, // Mem /*ATxmega128D4*/ 6, 1, 91, vtab_atxmega128d4, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega128D4*/ 460, rgftab_atxmega64d4, 2, UART_XMEGA, // Register file, UART - /*ATxmega128D4*/ 6, ports_atxmega16a4u}, // Ports + /*ATxmega128D4*/ 6, ports_atxmega16a4u, WDT_XMEGA}, // Ports, WDT //ATxmega192A1 avrdude // Sources {"ATxmega192A1", 266, F_XMEGA, {0x1E, 0x97, 0x4E}, // ID /*ATxmega192A1*/ 0, 0x32000, 0x200, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x4000, // Mem /*ATxmega192A1*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*ATxmega192A1*/ 0, NULL, 0, UART_XMEGA, // Register file, UART - /*ATxmega192A1*/ -1, NULL}, // Ports + /*ATxmega192A1*/ -1, NULL, WDT_UNKNOWN}, // Ports, WDT //ATxmega192A3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega192A3", 267, F_XMEGA, {0x1E, 0x97, 0x44}, // ID /*ATxmega192A3*/ 0, 0x32000, 0x200, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x4000, // Mem /*ATxmega192A3*/ 6, 1, 122, vtab_atxmega256a3, 16, cfgtab_atxmega128a3, // ISRs, Config /*ATxmega192A3*/ 680, rgftab_atxmega128a3, 7, UART_XMEGA, // Register file, UART - /*ATxmega192A3*/ 0, NULL}, // Ports + /*ATxmega192A3*/ 0, NULL, WDT_XMEGA}, // Ports, WDT //ATxmega192A3U atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega192A3U", 268, F_XMEGA, {0x1E, 0x97, 0x44}, // ID /*ATxmega192A3U*/ 0, 0x32000, 0x200, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x4000, // Mem /*ATxmega192A3U*/ 6, 1, 127, vtab_atxmega256a3u, 17, cfgtab_atxmega128a3u, // ISRs, Config /*ATxmega192A3U*/ 792, rgftab_atxmega128a3u, 7, UART_XMEGA, // Register file, UART - /*ATxmega192A3U*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega192A3U*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega192C3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega192C3", 269, F_XMEGA, {0x1E, 0x97, 0x51}, // ID /*ATxmega192C3*/ 0, 0x32000, 0x200, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x4000, // Mem /*ATxmega192C3*/ 6, 1, 127, vtab_atxmega256c3, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega192C3*/ 569, rgftab_atxmega32c3, 3, UART_XMEGA, // Register file, UART - /*ATxmega192C3*/ 0, NULL}, // Ports + /*ATxmega192C3*/ 0, NULL, WDT_XMEGA}, // Ports, WDT //ATxmega192D3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega192D3", 270, F_XMEGA, {0x1E, 0x97, 0x49}, // ID /*ATxmega192D3*/ 0, 0x32000, 0x200, 1, 0x2000, 0, 0x0800, 32, 0x2000, 0x4000, // Mem /*ATxmega192D3*/ 6, 1, 114, vtab_atxmega384d3, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega192D3*/ 567, rgftab_atxmega32d3, 3, UART_XMEGA, // Register file, UART - /*ATxmega192D3*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega192D3*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega256A1 avrdude // Sources {"ATxmega256A1", 271, F_XMEGA, {0x1E, 0x98, 0x46}, // ID /*ATxmega256A1*/ 0, 0x42000, 0x200, 1, 0x2000, 0, 0x1000, 32, 0x2000, 0x4000, // Mem /*ATxmega256A1*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*ATxmega256A1*/ 0, NULL, 0, UART_XMEGA, // Register file, UART - /*ATxmega256A1*/ -1, NULL}, // Ports + /*ATxmega256A1*/ -1, NULL, WDT_UNKNOWN}, // Ports, WDT //ATxmega256A3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega256A3", 272, F_XMEGA, {0x1E, 0x98, 0x42}, // ID /*ATxmega256A3*/ 0, 0x42000, 0x200, 1, 0x2000, 0, 0x1000, 32, 0x2000, 0x4000, // Mem /*ATxmega256A3*/ 6, 1, 122, vtab_atxmega256a3, 16, cfgtab_atxmega128a3, // ISRs, Config /*ATxmega256A3*/ 680, rgftab_atxmega128a3, 7, UART_XMEGA, // Register file, UART - /*ATxmega256A3*/ 0, NULL}, // Ports + /*ATxmega256A3*/ 0, NULL, WDT_XMEGA}, // Ports, WDT //ATxmega256A3B atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega256A3B", 273, F_XMEGA, {0x1E, 0x98, 0x43}, // ID /*ATxmega256A3B*/ 0, 0x42000, 0x200, 1, 0x2000, 0, 0x1000, 32, 0x2000, 0x4000, // Mem /*ATxmega256A3B*/ 6, 1, 122, vtab_atxmega256a3b, 16, cfgtab_atxmega128a3, // ISRs, Config /*ATxmega256A3B*/ 665, rgftab_atxmega256a3b, 6, UART_XMEGA, // Register file, UART - /*ATxmega256A3B*/ 0, NULL}, // Ports + /*ATxmega256A3B*/ 0, NULL, WDT_XMEGA}, // Ports, WDT //ATxmega256A3BU atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega256A3BU", 274, F_XMEGA, {0x1E, 0x98, 0x43}, // ID /*ATxmega256A3BU*/ 0, 0x42000, 0x200, 1, 0x2000, 0, 0x1000, 32, 0x2000, 0x4000, // Mem /*ATxmega256A3BU*/ 6, 1, 127, vtab_atxmega256a3bu, 17, cfgtab_atxmega128a3u, // ISRs, Config /*ATxmega256A3BU*/ 780, rgftab_atxmega256a3bu, 6, UART_XMEGA, // Register file, UART - /*ATxmega256A3BU*/ 7, ports_atxmega256a3bu}, // Ports + /*ATxmega256A3BU*/ 7, ports_atxmega256a3bu, WDT_XMEGA}, // Ports, WDT //ATxmega256A3U atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega256A3U", 275, F_XMEGA, {0x1E, 0x98, 0x42}, // ID /*ATxmega256A3U*/ 0, 0x42000, 0x200, 1, 0x2000, 0, 0x1000, 32, 0x2000, 0x4000, // Mem /*ATxmega256A3U*/ 6, 1, 127, vtab_atxmega256a3u, 17, cfgtab_atxmega128a3u, // ISRs, Config /*ATxmega256A3U*/ 792, rgftab_atxmega128a3u, 7, UART_XMEGA, // Register file, UART - /*ATxmega256A3U*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega256A3U*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega256C3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega256C3", 276, F_XMEGA, {0x1E, 0x98, 0x46}, // ID /*ATxmega256C3*/ 0, 0x42000, 0x200, 1, 0x2000, 0, 0x1000, 32, 0x2000, 0x4000, // Mem /*ATxmega256C3*/ 6, 1, 127, vtab_atxmega256c3, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega256C3*/ 569, rgftab_atxmega32c3, 3, UART_XMEGA, // Register file, UART - /*ATxmega256C3*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega256C3*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega256D3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega256D3", 277, F_XMEGA, {0x1E, 0x98, 0x44}, // ID /*ATxmega256D3*/ 0, 0x42000, 0x200, 1, 0x2000, 0, 0x1000, 32, 0x2000, 0x4000, // Mem /*ATxmega256D3*/ 6, 1, 114, vtab_atxmega384d3, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega256D3*/ 567, rgftab_atxmega32d3, 3, UART_XMEGA, // Register file, UART - /*ATxmega256D3*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega256D3*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega384C3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega384C3", 278, F_XMEGA, {0x1E, 0x98, 0x45}, // ID /*ATxmega384C3*/ 0, 0x62000, 0x200, 1, 0x2000, 0, 0x1000, 32, 0x2000, 0x8000, // Mem /*ATxmega384C3*/ 6, 1, 127, vtab_atxmega384c3, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega384C3*/ 603, rgftab_atxmega384c3, 3, UART_XMEGA, // Register file, UART - /*ATxmega384C3*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega384C3*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATxmega384D3 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATxmega384D3", 279, F_XMEGA, {0x1E, 0x98, 0x47}, // ID /*ATxmega384D3*/ 0, 0x62000, 0x200, 1, 0x2000, 0, 0x1000, 32, 0x2000, 0x8000, // Mem /*ATxmega384D3*/ 6, 1, 114, vtab_atxmega384d3, 15, cfgtab_atxmega16c4, // ISRs, Config /*ATxmega384D3*/ 560, rgftab_atxmega384d3, 3, UART_XMEGA, // Register file, UART - /*ATxmega384D3*/ 7, ports_atxmega128a3u}, // Ports + /*ATxmega384D3*/ 7, ports_atxmega128a3u, WDT_XMEGA}, // Ports, WDT //ATtiny202 atdf, avr-gcc 12.2.0, avrdude // Sources @@ -2164,868 +2164,868 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown /*ATtiny202*/ 0, 0x00800, 0x040, 1, 0x0100, 0x01400, 0x0040, 32, 0x3f80, 0x0080, // Mem /*ATtiny202*/ 10, 1, 26, vtab_attiny402, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny202*/ 217, rgftab_attiny202, 1, UART_AVR8X, // Register file, UART - /*ATtiny202*/ 1, ports_attiny202}, // Ports + /*ATtiny202*/ 1, ports_attiny202, WDT_AVR8X}, // Ports, WDT //ATtiny204 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny204", 281, F_AVR8X, {0x1E, 0x91, 0x22}, // ID /*ATtiny204*/ 0, 0x00800, 0x040, 1, 0x0100, 0x01400, 0x0040, 32, 0x3f80, 0x0080, // Mem /*ATtiny204*/ 10, 1, 26, vtab_attiny404, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny204*/ 235, rgftab_attiny204, 1, UART_AVR8X, // Register file, UART - /*ATtiny204*/ 2, ports_attiny204}, // Ports + /*ATtiny204*/ 2, ports_attiny204, WDT_AVR8X}, // Ports, WDT //ATtiny212 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny212", 282, F_AVR8X, {0x1E, 0x91, 0x21}, // ID /*ATtiny212*/ 0, 0x00800, 0x040, 1, 0x0100, 0x01400, 0x0040, 32, 0x3f80, 0x0080, // Mem /*ATtiny212*/ 10, 1, 26, vtab_attiny412, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny212*/ 247, rgftab_attiny212, 1, UART_AVR8X, // Register file, UART - /*ATtiny212*/ 1, ports_attiny202}, // Ports + /*ATtiny212*/ 1, ports_attiny202, WDT_AVR8X}, // Ports, WDT //ATtiny214 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny214", 283, F_AVR8X, {0x1E, 0x91, 0x20}, // ID /*ATtiny214*/ 0, 0x00800, 0x040, 1, 0x0100, 0x01400, 0x0040, 32, 0x3f80, 0x0080, // Mem /*ATtiny214*/ 10, 1, 26, vtab_attiny814, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny214*/ 265, rgftab_attiny214, 1, UART_AVR8X, // Register file, UART - /*ATtiny214*/ 2, ports_attiny204}, // Ports + /*ATtiny214*/ 2, ports_attiny204, WDT_AVR8X}, // Ports, WDT //ATtiny402 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny402", 284, F_AVR8X, {0x1E, 0x92, 0x27}, // ID /*ATtiny402*/ 0, 0x01000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3f00, 0x0100, // Mem /*ATtiny402*/ 10, 1, 26, vtab_attiny402, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny402*/ 217, rgftab_attiny202, 1, UART_AVR8X, // Register file, UART - /*ATtiny402*/ 1, ports_attiny202}, // Ports + /*ATtiny402*/ 1, ports_attiny202, WDT_AVR8X}, // Ports, WDT //ATtiny404 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny404", 285, F_AVR8X, {0x1E, 0x92, 0x26}, // ID /*ATtiny404*/ 0, 0x01000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3f00, 0x0100, // Mem /*ATtiny404*/ 10, 1, 26, vtab_attiny404, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny404*/ 235, rgftab_attiny204, 1, UART_AVR8X, // Register file, UART - /*ATtiny404*/ 2, ports_attiny204}, // Ports + /*ATtiny404*/ 2, ports_attiny204, WDT_AVR8X}, // Ports, WDT //ATtiny406 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny406", 286, F_AVR8X, {0x1E, 0x92, 0x25}, // ID /*ATtiny406*/ 0, 0x01000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3f00, 0x0100, // Mem /*ATtiny406*/ 10, 1, 26, vtab_attiny406, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny406*/ 253, rgftab_attiny406, 1, UART_AVR8X, // Register file, UART - /*ATtiny406*/ 3, ports_attiny406}, // Ports + /*ATtiny406*/ 3, ports_attiny406, WDT_AVR8X}, // Ports, WDT //ATtiny412 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny412", 287, F_AVR8X, {0x1E, 0x92, 0x23}, // ID /*ATtiny412*/ 0, 0x01000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3f00, 0x0100, // Mem /*ATtiny412*/ 10, 1, 26, vtab_attiny412, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny412*/ 247, rgftab_attiny212, 1, UART_AVR8X, // Register file, UART - /*ATtiny412*/ 1, ports_attiny202}, // Ports + /*ATtiny412*/ 1, ports_attiny202, WDT_AVR8X}, // Ports, WDT //ATtiny414 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny414", 288, F_AVR8X, {0x1E, 0x92, 0x22}, // ID /*ATtiny414*/ 0, 0x01000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3f00, 0x0100, // Mem /*ATtiny414*/ 10, 1, 26, vtab_attiny814, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny414*/ 265, rgftab_attiny214, 1, UART_AVR8X, // Register file, UART - /*ATtiny414*/ 2, ports_attiny204}, // Ports + /*ATtiny414*/ 2, ports_attiny204, WDT_AVR8X}, // Ports, WDT //ATtiny416 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny416", 289, F_AVR8X, {0x1E, 0x92, 0x21}, // ID /*ATtiny416*/ 0, 0x01000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3f00, 0x0100, // Mem /*ATtiny416*/ 10, 1, 26, vtab_attiny817, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny416*/ 283, rgftab_attiny416, 1, UART_AVR8X, // Register file, UART - /*ATtiny416*/ 3, ports_attiny406}, // Ports + /*ATtiny416*/ 3, ports_attiny406, WDT_AVR8X}, // Ports, WDT //ATtiny416auto atdf, avrdude // Sources {"ATtiny416auto", 290, F_AVR8X, {0x1E, 0x92, 0x28}, // ID /*ATtiny416auto*/ 0, 0x01000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3f00, 0x0100, // Mem /*ATtiny416auto*/ 10, 1, 26, vtab_attiny817, 23, cfgtab_attiny416auto, // ISRs, Config /*ATtiny416auto*/ 283, rgftab_attiny416auto, 1, UART_AVR8X, // Register file, UART - /*ATtiny416auto*/ 3, ports_attiny406}, // Ports + /*ATtiny416auto*/ 3, ports_attiny406, WDT_AVR8X}, // Ports, WDT //ATtiny417 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny417", 291, F_AVR8X, {0x1E, 0x92, 0x20}, // ID /*ATtiny417*/ 0, 0x01000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3f00, 0x0100, // Mem /*ATtiny417*/ 10, 1, 26, vtab_attiny817, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny417*/ 283, rgftab_attiny417, 1, UART_AVR8X, // Register file, UART - /*ATtiny417*/ 3, ports_attiny417}, // Ports + /*ATtiny417*/ 3, ports_attiny417, WDT_AVR8X}, // Ports, WDT //ATtiny424 atdf, avrdude // Sources {"ATtiny424", 292, F_AVR8X, {0x1E, 0x92, 0x2C}, // ID /*ATtiny424*/ 0, 0x01000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3e00, 0x0200, // Mem /*ATtiny424*/ 10, 1, 30, vtab_attiny3227, 16, cfgtab_attiny1624, // ISRs, Config /*ATtiny424*/ 307, rgftab_attiny1624, 2, UART_AVR8X, // Register file, UART - /*ATtiny424*/ 2, ports_attiny204}, // Ports + /*ATtiny424*/ 2, ports_attiny204, WDT_AVR8X}, // Ports, WDT //ATtiny426 atdf, avrdude // Sources {"ATtiny426", 293, F_AVR8X, {0x1E, 0x92, 0x2B}, // ID /*ATtiny426*/ 0, 0x01000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3e00, 0x0200, // Mem /*ATtiny426*/ 10, 1, 30, vtab_attiny3227, 16, cfgtab_attiny1624, // ISRs, Config /*ATtiny426*/ 308, rgftab_attiny426, 2, UART_AVR8X, // Register file, UART - /*ATtiny426*/ 3, ports_attiny406}, // Ports + /*ATtiny426*/ 3, ports_attiny406, WDT_AVR8X}, // Ports, WDT //ATtiny427 atdf, avrdude // Sources {"ATtiny427", 294, F_AVR8X, {0x1E, 0x92, 0x2A}, // ID /*ATtiny427*/ 0, 0x01000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3e00, 0x0200, // Mem /*ATtiny427*/ 10, 1, 30, vtab_attiny3227, 16, cfgtab_attiny1624, // ISRs, Config /*ATtiny427*/ 308, rgftab_attiny426, 2, UART_AVR8X, // Register file, UART - /*ATtiny427*/ 3, ports_attiny417}, // Ports + /*ATtiny427*/ 3, ports_attiny417, WDT_AVR8X}, // Ports, WDT //ATtiny804 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny804", 295, F_AVR8X, {0x1E, 0x93, 0x25}, // ID /*ATtiny804*/ 0, 0x02000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3e00, 0x0200, // Mem /*ATtiny804*/ 10, 1, 31, vtab_attiny1607, 15, cfgtab_attiny804, // ISRs, Config /*ATtiny804*/ 255, rgftab_attiny804, 1, UART_AVR8X, // Register file, UART - /*ATtiny804*/ 2, ports_attiny204}, // Ports + /*ATtiny804*/ 2, ports_attiny204, WDT_AVR8X}, // Ports, WDT //ATtiny806 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny806", 296, F_AVR8X, {0x1E, 0x93, 0x24}, // ID /*ATtiny806*/ 0, 0x02000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3e00, 0x0200, // Mem /*ATtiny806*/ 10, 1, 31, vtab_attiny1607, 15, cfgtab_attiny804, // ISRs, Config /*ATtiny806*/ 255, rgftab_attiny804, 1, UART_AVR8X, // Register file, UART - /*ATtiny806*/ 3, ports_attiny406}, // Ports + /*ATtiny806*/ 3, ports_attiny406, WDT_AVR8X}, // Ports, WDT //ATtiny807 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny807", 297, F_AVR8X, {0x1E, 0x93, 0x23}, // ID /*ATtiny807*/ 0, 0x02000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3e00, 0x0200, // Mem /*ATtiny807*/ 10, 1, 31, vtab_attiny1607, 15, cfgtab_attiny804, // ISRs, Config /*ATtiny807*/ 255, rgftab_attiny804, 1, UART_AVR8X, // Register file, UART - /*ATtiny807*/ 3, ports_attiny417}, // Ports + /*ATtiny807*/ 3, ports_attiny417, WDT_AVR8X}, // Ports, WDT //ATtiny814 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny814", 298, F_AVR8X, {0x1E, 0x93, 0x22}, // ID /*ATtiny814*/ 0, 0x02000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3e00, 0x0200, // Mem /*ATtiny814*/ 10, 1, 26, vtab_attiny814, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny814*/ 265, rgftab_attiny814, 1, UART_AVR8X, // Register file, UART - /*ATtiny814*/ 2, ports_attiny204}, // Ports + /*ATtiny814*/ 2, ports_attiny204, WDT_AVR8X}, // Ports, WDT //ATtiny816 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny816", 299, F_AVR8X, {0x1E, 0x93, 0x21}, // ID /*ATtiny816*/ 0, 0x02000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3e00, 0x0200, // Mem /*ATtiny816*/ 10, 1, 26, vtab_attiny817, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny816*/ 283, rgftab_attiny417, 1, UART_AVR8X, // Register file, UART - /*ATtiny816*/ 3, ports_attiny406}, // Ports + /*ATtiny816*/ 3, ports_attiny406, WDT_AVR8X}, // Ports, WDT //ATtiny817 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny817", 300, F_AVR8X, {0x1E, 0x93, 0x20}, // ID /*ATtiny817*/ 0, 0x02000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3e00, 0x0200, // Mem /*ATtiny817*/ 10, 1, 26, vtab_attiny817, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny817*/ 283, rgftab_attiny417, 1, UART_AVR8X, // Register file, UART - /*ATtiny817*/ 3, ports_attiny417}, // Ports + /*ATtiny817*/ 3, ports_attiny417, WDT_AVR8X}, // Ports, WDT //ATtiny824 atdf, avrdude // Sources {"ATtiny824", 301, F_AVR8X, {0x1E, 0x93, 0x29}, // ID /*ATtiny824*/ 0, 0x02000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3c00, 0x0400, // Mem /*ATtiny824*/ 10, 1, 30, vtab_attiny3227, 16, cfgtab_attiny1624, // ISRs, Config /*ATtiny824*/ 307, rgftab_attiny1624, 2, UART_AVR8X, // Register file, UART - /*ATtiny824*/ 2, ports_attiny204}, // Ports + /*ATtiny824*/ 2, ports_attiny204, WDT_AVR8X}, // Ports, WDT //ATtiny826 atdf, avrdude // Sources {"ATtiny826", 302, F_AVR8X, {0x1E, 0x93, 0x28}, // ID /*ATtiny826*/ 0, 0x02000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3c00, 0x0400, // Mem /*ATtiny826*/ 10, 1, 30, vtab_attiny3227, 16, cfgtab_attiny1624, // ISRs, Config /*ATtiny826*/ 308, rgftab_attiny426, 2, UART_AVR8X, // Register file, UART - /*ATtiny826*/ 3, ports_attiny406}, // Ports + /*ATtiny826*/ 3, ports_attiny406, WDT_AVR8X}, // Ports, WDT //ATtiny827 atdf, avrdude // Sources {"ATtiny827", 303, F_AVR8X, {0x1E, 0x93, 0x27}, // ID /*ATtiny827*/ 0, 0x02000, 0x040, 1, 0x0100, 0x01400, 0x0080, 32, 0x3c00, 0x0400, // Mem /*ATtiny827*/ 10, 1, 30, vtab_attiny3227, 16, cfgtab_attiny1624, // ISRs, Config /*ATtiny827*/ 308, rgftab_attiny426, 2, UART_AVR8X, // Register file, UART - /*ATtiny827*/ 3, ports_attiny417}, // Ports + /*ATtiny827*/ 3, ports_attiny417, WDT_AVR8X}, // Ports, WDT //ATtiny1604 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny1604", 304, F_AVR8X, {0x1E, 0x94, 0x25}, // ID /*ATtiny1604*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0100, 32, 0x3c00, 0x0400, // Mem /*ATtiny1604*/ 10, 1, 31, vtab_attiny1607, 15, cfgtab_attiny804, // ISRs, Config /*ATtiny1604*/ 255, rgftab_attiny804, 1, UART_AVR8X, // Register file, UART - /*ATtiny1604*/ 2, ports_attiny204}, // Ports + /*ATtiny1604*/ 2, ports_attiny204, WDT_AVR8X}, // Ports, WDT //ATtiny1606 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny1606", 305, F_AVR8X, {0x1E, 0x94, 0x24}, // ID /*ATtiny1606*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0100, 32, 0x3c00, 0x0400, // Mem /*ATtiny1606*/ 10, 1, 31, vtab_attiny1607, 15, cfgtab_attiny804, // ISRs, Config /*ATtiny1606*/ 255, rgftab_attiny804, 1, UART_AVR8X, // Register file, UART - /*ATtiny1606*/ 3, ports_attiny406}, // Ports + /*ATtiny1606*/ 3, ports_attiny406, WDT_AVR8X}, // Ports, WDT //ATtiny1607 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny1607", 306, F_AVR8X, {0x1E, 0x94, 0x23}, // ID /*ATtiny1607*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0100, 32, 0x3c00, 0x0400, // Mem /*ATtiny1607*/ 10, 1, 31, vtab_attiny1607, 15, cfgtab_attiny804, // ISRs, Config /*ATtiny1607*/ 255, rgftab_attiny804, 1, UART_AVR8X, // Register file, UART - /*ATtiny1607*/ 3, ports_attiny417}, // Ports + /*ATtiny1607*/ 3, ports_attiny417, WDT_AVR8X}, // Ports, WDT //ATtiny1614 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny1614", 307, F_AVR8X, {0x1E, 0x94, 0x22}, // ID /*ATtiny1614*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0100, 32, 0x3800, 0x0800, // Mem /*ATtiny1614*/ 10, 1, 31, vtab_attiny1614, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny1614*/ 308, rgftab_attiny1614, 1, UART_AVR8X, // Register file, UART - /*ATtiny1614*/ 2, ports_attiny204}, // Ports + /*ATtiny1614*/ 2, ports_attiny204, WDT_AVR8X}, // Ports, WDT //ATtiny1616 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny1616", 308, F_AVR8X, {0x1E, 0x94, 0x21}, // ID /*ATtiny1616*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0100, 32, 0x3800, 0x0800, // Mem /*ATtiny1616*/ 10, 1, 31, vtab_attiny3217, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny1616*/ 326, rgftab_attiny1616, 1, UART_AVR8X, // Register file, UART - /*ATtiny1616*/ 3, ports_attiny406}, // Ports + /*ATtiny1616*/ 3, ports_attiny406, WDT_AVR8X}, // Ports, WDT //ATtiny1617 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny1617", 309, F_AVR8X, {0x1E, 0x94, 0x20}, // ID /*ATtiny1617*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0100, 32, 0x3800, 0x0800, // Mem /*ATtiny1617*/ 10, 1, 31, vtab_attiny3217, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny1617*/ 326, rgftab_attiny1616, 1, UART_AVR8X, // Register file, UART - /*ATtiny1617*/ 3, ports_attiny417}, // Ports + /*ATtiny1617*/ 3, ports_attiny417, WDT_AVR8X}, // Ports, WDT //ATtiny1624 atdf, avrdude // Sources {"ATtiny1624", 310, F_AVR8X, {0x1E, 0x94, 0x2A}, // ID /*ATtiny1624*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0100, 32, 0x3800, 0x0800, // Mem /*ATtiny1624*/ 10, 1, 30, vtab_attiny3227, 16, cfgtab_attiny1624, // ISRs, Config /*ATtiny1624*/ 307, rgftab_attiny1624, 2, UART_AVR8X, // Register file, UART - /*ATtiny1624*/ 2, ports_attiny204}, // Ports + /*ATtiny1624*/ 2, ports_attiny204, WDT_AVR8X}, // Ports, WDT //ATtiny1626 atdf, avrdude // Sources {"ATtiny1626", 311, F_AVR8X, {0x1E, 0x94, 0x29}, // ID /*ATtiny1626*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0100, 32, 0x3800, 0x0800, // Mem /*ATtiny1626*/ 10, 1, 30, vtab_attiny3227, 16, cfgtab_attiny1624, // ISRs, Config /*ATtiny1626*/ 308, rgftab_attiny426, 2, UART_AVR8X, // Register file, UART - /*ATtiny1626*/ 3, ports_attiny406}, // Ports + /*ATtiny1626*/ 3, ports_attiny406, WDT_AVR8X}, // Ports, WDT //ATtiny1627 atdf, avrdude // Sources {"ATtiny1627", 312, F_AVR8X, {0x1E, 0x94, 0x28}, // ID /*ATtiny1627*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0100, 32, 0x3800, 0x0800, // Mem /*ATtiny1627*/ 10, 1, 30, vtab_attiny3227, 16, cfgtab_attiny1624, // ISRs, Config /*ATtiny1627*/ 308, rgftab_attiny426, 2, UART_AVR8X, // Register file, UART - /*ATtiny1627*/ 3, ports_attiny417}, // Ports + /*ATtiny1627*/ 3, ports_attiny417, WDT_AVR8X}, // Ports, WDT //ATtiny3214 avr-gcc 12.2.0 // Sources {"ATtiny3214", 313, F_AVR8X, {0x1E, 0x95, 0x20}, // ID /*ATtiny3214*/ 0, 0x08000, 0x080, 1, 0, 0x01400, 0x0100, 64, 0x3800, 0x0800, // Mem /*ATtiny3214*/ 10, 1, 31, vtab_attiny3214, 0, NULL, // ISRs, Config /*ATtiny3214*/ 0, NULL, 1, UART_AVR8X, // Register file, UART - /*ATtiny3214*/ -1, NULL}, // Ports + /*ATtiny3214*/ -1, NULL, WDT_UNKNOWN}, // Ports, WDT //ATtiny3216 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny3216", 314, F_AVR8X, {0x1E, 0x95, 0x21}, // ID /*ATtiny3216*/ 0, 0x08000, 0x080, 1, 0x0100, 0x01400, 0x0100, 64, 0x3800, 0x0800, // Mem /*ATtiny3216*/ 10, 1, 31, vtab_attiny3217, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny3216*/ 326, rgftab_attiny3216, 1, UART_AVR8X, // Register file, UART - /*ATtiny3216*/ 3, ports_attiny406}, // Ports + /*ATtiny3216*/ 3, ports_attiny406, WDT_AVR8X}, // Ports, WDT //ATtiny3217 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATtiny3217", 315, F_AVR8X, {0x1E, 0x95, 0x22}, // ID /*ATtiny3217*/ 0, 0x08000, 0x080, 1, 0x0100, 0x01400, 0x0100, 64, 0x3800, 0x0800, // Mem /*ATtiny3217*/ 10, 1, 31, vtab_attiny3217, 23, cfgtab_attiny204, // ISRs, Config /*ATtiny3217*/ 326, rgftab_attiny3216, 1, UART_AVR8X, // Register file, UART - /*ATtiny3217*/ 3, ports_attiny417}, // Ports + /*ATtiny3217*/ 3, ports_attiny417, WDT_AVR8X}, // Ports, WDT //ATtiny3224 atdf, avrdude // Sources {"ATtiny3224", 316, F_AVR8X, {0x1E, 0x95, 0x28}, // ID /*ATtiny3224*/ 0, 0x08000, 0x080, 1, 0x0100, 0x01400, 0x0100, 64, 0x3400, 0x0c00, // Mem /*ATtiny3224*/ 10, 1, 30, vtab_attiny3227, 16, cfgtab_attiny1624, // ISRs, Config /*ATtiny3224*/ 307, rgftab_attiny1624, 2, UART_AVR8X, // Register file, UART - /*ATtiny3224*/ 2, ports_attiny204}, // Ports + /*ATtiny3224*/ 2, ports_attiny204, WDT_AVR8X}, // Ports, WDT //ATtiny3226 atdf, avrdude // Sources {"ATtiny3226", 317, F_AVR8X, {0x1E, 0x95, 0x27}, // ID /*ATtiny3226*/ 0, 0x08000, 0x080, 1, 0x0100, 0x01400, 0x0100, 64, 0x3400, 0x0c00, // Mem /*ATtiny3226*/ 10, 1, 30, vtab_attiny3227, 16, cfgtab_attiny1624, // ISRs, Config /*ATtiny3226*/ 308, rgftab_attiny426, 2, UART_AVR8X, // Register file, UART - /*ATtiny3226*/ 3, ports_attiny406}, // Ports + /*ATtiny3226*/ 3, ports_attiny406, WDT_AVR8X}, // Ports, WDT //ATtiny3227 atdf, avrdude // Sources {"ATtiny3227", 318, F_AVR8X, {0x1E, 0x95, 0x26}, // ID /*ATtiny3227*/ 0, 0x08000, 0x080, 1, 0x0100, 0x01400, 0x0100, 64, 0x3400, 0x0c00, // Mem /*ATtiny3227*/ 10, 1, 30, vtab_attiny3227, 16, cfgtab_attiny1624, // ISRs, Config /*ATtiny3227*/ 308, rgftab_attiny426, 2, UART_AVR8X, // Register file, UART - /*ATtiny3227*/ 3, ports_attiny417}, // Ports + /*ATtiny3227*/ 3, ports_attiny417, WDT_AVR8X}, // Ports, WDT //ATmega808 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega808", 319, F_AVR8X, {0x1E, 0x93, 0x26}, // ID /*ATmega808*/ 0, 0x02000, 0x040, 1, 0x0100, 0x01400, 0x0100, 32, 0x3c00, 0x0400, // Mem /*ATmega808*/ 10, 1, 36, vtab_atmega4808, 15, cfgtab_atmega808, // ISRs, Config /*ATmega808*/ 406, rgftab_atmega808, 3, UART_AVR8X, // Register file, UART - /*ATmega808*/ 4, ports_atmega808}, // Ports + /*ATmega808*/ 4, ports_atmega808, WDT_AVR8X}, // Ports, WDT //ATmega809 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega809", 320, F_AVR8X, {0x1E, 0x93, 0x2A}, // ID /*ATmega809*/ 0, 0x02000, 0x040, 1, 0x0100, 0x01400, 0x0100, 32, 0x3c00, 0x0400, // Mem /*ATmega809*/ 10, 1, 40, vtab_atmega4809, 15, cfgtab_atmega808, // ISRs, Config /*ATmega809*/ 432, rgftab_atmega809, 4, UART_AVR8X, // Register file, UART - /*ATmega809*/ 6, ports_atmega809}, // Ports + /*ATmega809*/ 6, ports_atmega809, WDT_AVR8X}, // Ports, WDT //ATmega1608 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega1608", 321, F_AVR8X, {0x1E, 0x94, 0x27}, // ID /*ATmega1608*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0100, 32, 0x3800, 0x0800, // Mem /*ATmega1608*/ 10, 1, 36, vtab_atmega4808, 15, cfgtab_atmega808, // ISRs, Config /*ATmega1608*/ 406, rgftab_atmega808, 3, UART_AVR8X, // Register file, UART - /*ATmega1608*/ 4, ports_atmega808}, // Ports + /*ATmega1608*/ 4, ports_atmega808, WDT_AVR8X}, // Ports, WDT //ATmega1609 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega1609", 322, F_AVR8X, {0x1E, 0x94, 0x26}, // ID /*ATmega1609*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0100, 32, 0x3800, 0x0800, // Mem /*ATmega1609*/ 10, 1, 40, vtab_atmega4809, 15, cfgtab_atmega808, // ISRs, Config /*ATmega1609*/ 432, rgftab_atmega809, 4, UART_AVR8X, // Register file, UART - /*ATmega1609*/ 6, ports_atmega809}, // Ports + /*ATmega1609*/ 6, ports_atmega809, WDT_AVR8X}, // Ports, WDT //ATmega3208 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega3208", 323, F_AVR8X, {0x1E, 0x95, 0x30}, // ID /*ATmega3208*/ 0, 0x08000, 0x080, 1, 0x0100, 0x01400, 0x0100, 64, 0x3000, 0x1000, // Mem /*ATmega3208*/ 10, 1, 36, vtab_atmega4808, 15, cfgtab_atmega808, // ISRs, Config /*ATmega3208*/ 406, rgftab_atmega3208, 3, UART_AVR8X, // Register file, UART - /*ATmega3208*/ 4, ports_atmega808}, // Ports + /*ATmega3208*/ 4, ports_atmega808, WDT_AVR8X}, // Ports, WDT //ATmega3209 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega3209", 324, F_AVR8X, {0x1E, 0x95, 0x31}, // ID /*ATmega3209*/ 0, 0x08000, 0x080, 1, 0x0100, 0x01400, 0x0100, 64, 0x3000, 0x1000, // Mem /*ATmega3209*/ 10, 1, 40, vtab_atmega4809, 15, cfgtab_atmega808, // ISRs, Config /*ATmega3209*/ 432, rgftab_atmega3209, 4, UART_AVR8X, // Register file, UART - /*ATmega3209*/ 6, ports_atmega809}, // Ports + /*ATmega3209*/ 6, ports_atmega809, WDT_AVR8X}, // Ports, WDT //ATmega4808 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega4808", 325, F_AVR8X, {0x1E, 0x96, 0x50}, // ID /*ATmega4808*/ 0, 0x0c000, 0x080, 1, 0x0100, 0x01400, 0x0100, 64, 0x2800, 0x1800, // Mem /*ATmega4808*/ 10, 1, 36, vtab_atmega4808, 15, cfgtab_atmega808, // ISRs, Config /*ATmega4808*/ 406, rgftab_atmega3208, 3, UART_AVR8X, // Register file, UART - /*ATmega4808*/ 4, ports_atmega808}, // Ports + /*ATmega4808*/ 4, ports_atmega808, WDT_AVR8X}, // Ports, WDT //ATmega4809 atdf, avr-gcc 12.2.0, avrdude // Sources {"ATmega4809", 326, F_AVR8X, {0x1E, 0x96, 0x51}, // ID /*ATmega4809*/ 0, 0x0c000, 0x080, 1, 0x0100, 0x01400, 0x0100, 64, 0x2800, 0x1800, // Mem /*ATmega4809*/ 10, 1, 40, vtab_atmega4809, 15, cfgtab_atmega808, // ISRs, Config /*ATmega4809*/ 432, rgftab_atmega3209, 4, UART_AVR8X, // Register file, UART - /*ATmega4809*/ 6, ports_atmega809}, // Ports + /*ATmega4809*/ 6, ports_atmega809, WDT_AVR8X}, // Ports, WDT //AVR8EA28 avrdude // Sources {"AVR8EA28", 327, F_AVR8X, {0x1E, 0x93, 0x2C}, // ID /*AVR8EA28*/ 0, 0x02000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, -1, -1, // Mem /*AVR8EA28*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*AVR8EA28*/ 0, NULL, 0, UART_AVR8X, // Register file, UART - /*AVR8EA28*/ -1, NULL}, // Ports + /*AVR8EA28*/ -1, NULL, WDT_UNKNOWN}, // Ports, WDT //AVR8EA32 avrdude // Sources {"AVR8EA32", 328, F_AVR8X, {0x1E, 0x93, 0x2B}, // ID /*AVR8EA32*/ 0, 0x02000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, -1, -1, // Mem /*AVR8EA32*/ -1, -1, 0, NULL, 0, NULL, // ISRs, Config /*AVR8EA32*/ 0, NULL, 0, UART_AVR8X, // Register file, UART - /*AVR8EA32*/ -1, NULL}, // Ports + /*AVR8EA32*/ -1, NULL, WDT_UNKNOWN}, // Ports, WDT //AVR16DD14 atdf, avrdude // Sources {"AVR16DD14", 329, F_AVR8X, {0x1E, 0x94, 0x34}, // ID /*AVR16DD14*/ 0, 0x04000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7800, 0x0800, // Mem /*AVR16DD14*/ 16, 4, 36, vtab_avr64dd20, 17, cfgtab_avr32dd14, // ISRs, Config /*AVR16DD14*/ 390, rgftab_avr32dd14, 2, UART_AVR8X, // Register file, UART - /*AVR16DD14*/ 4, ports_avr32dd14}, // Ports + /*AVR16DD14*/ 4, ports_avr32dd14, WDT_AVR8X}, // Ports, WDT //AVR16DU14 atdf, avrdude // Sources {"AVR16DU14", 386, F_AVR8X, {0x1E, 0x94, 0x3B}, // ID /*AVR16DU14*/ 0, 0x04000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7800, 0x0800, // Mem /*AVR16DU14*/ 16, 4, 34, vtab_avr64du32, 20, cfgtab_avr16du14, // ISRs, Config /*AVR16DU14*/ 370, rgftab_avr16du14, 2, UART_AVR8X, // Register file, UART - /*AVR16DU14*/ 4, ports_avr16du14}, // Ports + /*AVR16DU14*/ 4, ports_avr16du14, WDT_AVR8X}, // Ports, WDT //AVR16EB14 atdf, avrdude // Sources {"AVR16EB14", 380, F_AVR8X, {0x1E, 0x94, 0x49}, // ID /*AVR16EB14*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7800, 0x0800, // Mem /*AVR16EB14*/ 16, 4, 31, vtab_avr16eb32, 18, cfgtab_avr16eb14, // ISRs, Config /*AVR16EB14*/ 390, rgftab_avr16eb14, 1, UART_AVR8X, // Register file, UART - /*AVR16EB14*/ 4, ports_avr16eb14}, // Ports + /*AVR16EB14*/ 4, ports_avr16eb14, WDT_AVR8X}, // Ports, WDT //AVR16DD20 atdf, avrdude // Sources {"AVR16DD20", 330, F_AVR8X, {0x1E, 0x94, 0x33}, // ID /*AVR16DD20*/ 0, 0x04000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7800, 0x0800, // Mem /*AVR16DD20*/ 16, 4, 36, vtab_avr64dd20, 17, cfgtab_avr32dd14, // ISRs, Config /*AVR16DD20*/ 391, rgftab_avr16dd20, 2, UART_AVR8X, // Register file, UART - /*AVR16DD20*/ 4, ports_avr16dd20}, // Ports + /*AVR16DD20*/ 4, ports_avr16dd20, WDT_AVR8X}, // Ports, WDT //AVR16DU20 atdf, avrdude // Sources {"AVR16DU20", 387, F_AVR8X, {0x1E, 0x94, 0x3A}, // ID /*AVR16DU20*/ 0, 0x04000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7800, 0x0800, // Mem /*AVR16DU20*/ 16, 4, 34, vtab_avr64du32, 20, cfgtab_avr16du14, // ISRs, Config /*AVR16DU20*/ 371, rgftab_avr16du20, 2, UART_AVR8X, // Register file, UART - /*AVR16DU20*/ 4, ports_avr16du20}, // Ports + /*AVR16DU20*/ 4, ports_avr16du20, WDT_AVR8X}, // Ports, WDT //AVR16EB20 atdf, avrdude // Sources {"AVR16EB20", 381, F_AVR8X, {0x1E, 0x94, 0x40}, // ID /*AVR16EB20*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7800, 0x0800, // Mem /*AVR16EB20*/ 16, 4, 31, vtab_avr16eb32, 18, cfgtab_avr16eb14, // ISRs, Config /*AVR16EB20*/ 391, rgftab_avr16eb20, 1, UART_AVR8X, // Register file, UART - /*AVR16EB20*/ 4, ports_avr16eb20}, // Ports + /*AVR16EB20*/ 4, ports_avr16eb20, WDT_AVR8X}, // Ports, WDT //AVR16DD28 atdf, avrdude // Sources {"AVR16DD28", 331, F_AVR8X, {0x1E, 0x94, 0x32}, // ID /*AVR16DD28*/ 0, 0x04000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7800, 0x0800, // Mem /*AVR16DD28*/ 16, 4, 36, vtab_avr64dd32, 17, cfgtab_avr32dd14, // ISRs, Config /*AVR16DD28*/ 401, rgftab_avr16dd28, 2, UART_AVR8X, // Register file, UART - /*AVR16DD28*/ 4, ports_avr16dd28}, // Ports + /*AVR16DD28*/ 4, ports_avr16dd28, WDT_AVR8X}, // Ports, WDT //AVR16DU28 atdf, avrdude // Sources {"AVR16DU28", 388, F_AVR8X, {0x1E, 0x94, 0x39}, // ID /*AVR16DU28*/ 0, 0x04000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7800, 0x0800, // Mem /*AVR16DU28*/ 16, 4, 34, vtab_avr64du32, 20, cfgtab_avr16du14, // ISRs, Config /*AVR16DU28*/ 371, rgftab_avr16du20, 2, UART_AVR8X, // Register file, UART - /*AVR16DU28*/ 4, ports_avr16du28}, // Ports + /*AVR16DU28*/ 4, ports_avr16du28, WDT_AVR8X}, // Ports, WDT //AVR16EA28 atdf, avrdude // Sources {"AVR16EA28", 332, F_AVR8X, {0x1E, 0x94, 0x37}, // ID /*AVR16EA28*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7800, 0x0800, // Mem /*AVR16EA28*/ 16, 4, 43, vtab_avr64ea32, 16, cfgtab_avr64ea48, // ISRs, Config /*AVR16EA28*/ 444, rgftab_avr16ea28, 3, UART_AVR8X, // Register file, UART - /*AVR16EA28*/ 4, ports_avr16ea28}, // Ports + /*AVR16EA28*/ 4, ports_avr16ea28, WDT_AVR8X}, // Ports, WDT //AVR16EB28 atdf, avrdude // Sources {"AVR16EB28", 382, F_AVR8X, {0x1E, 0x94, 0x3F}, // ID /*AVR16EB28*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7800, 0x0800, // Mem /*AVR16EB28*/ 16, 4, 31, vtab_avr16eb32, 18, cfgtab_avr16eb14, // ISRs, Config /*AVR16EB28*/ 391, rgftab_avr16eb20, 1, UART_AVR8X, // Register file, UART - /*AVR16EB28*/ 4, ports_avr16ea28}, // Ports + /*AVR16EB28*/ 4, ports_avr16ea28, WDT_AVR8X}, // Ports, WDT //AVR16DD32 atdf, avrdude // Sources {"AVR16DD32", 333, F_AVR8X, {0x1E, 0x94, 0x31}, // ID /*AVR16DD32*/ 0, 0x04000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7800, 0x0800, // Mem /*AVR16DD32*/ 16, 4, 36, vtab_avr64dd32, 17, cfgtab_avr32dd14, // ISRs, Config /*AVR16DD32*/ 401, rgftab_avr16dd28, 2, UART_AVR8X, // Register file, UART - /*AVR16DD32*/ 4, ports_avr16dd32}, // Ports + /*AVR16DD32*/ 4, ports_avr16dd32, WDT_AVR8X}, // Ports, WDT //AVR16DU32 atdf, avrdude // Sources {"AVR16DU32", 389, F_AVR8X, {0x1E, 0x94, 0x38}, // ID /*AVR16DU32*/ 0, 0x04000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7800, 0x0800, // Mem /*AVR16DU32*/ 16, 4, 34, vtab_avr64du32, 20, cfgtab_avr16du14, // ISRs, Config /*AVR16DU32*/ 371, rgftab_avr16du20, 2, UART_AVR8X, // Register file, UART - /*AVR16DU32*/ 4, ports_avr16du32}, // Ports + /*AVR16DU32*/ 4, ports_avr16du32, WDT_AVR8X}, // Ports, WDT //AVR16EA32 atdf, avrdude // Sources {"AVR16EA32", 334, F_AVR8X, {0x1E, 0x94, 0x36}, // ID /*AVR16EA32*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7800, 0x0800, // Mem /*AVR16EA32*/ 16, 4, 43, vtab_avr64ea32, 16, cfgtab_avr64ea48, // ISRs, Config /*AVR16EA32*/ 444, rgftab_avr16ea28, 3, UART_AVR8X, // Register file, UART - /*AVR16EA32*/ 4, ports_avr16ea32}, // Ports + /*AVR16EA32*/ 4, ports_avr16ea32, WDT_AVR8X}, // Ports, WDT //AVR16EB32 atdf, avrdude // Sources {"AVR16EB32", 383, F_AVR8X, {0x1E, 0x94, 0x3E}, // ID /*AVR16EB32*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7800, 0x0800, // Mem /*AVR16EB32*/ 16, 4, 31, vtab_avr16eb32, 18, cfgtab_avr16eb14, // ISRs, Config /*AVR16EB32*/ 391, rgftab_avr16eb20, 1, UART_AVR8X, // Register file, UART - /*AVR16EB32*/ 4, ports_avr16ea32}, // Ports + /*AVR16EB32*/ 4, ports_avr16ea32, WDT_AVR8X}, // Ports, WDT //AVR16EA48 atdf, avrdude // Sources {"AVR16EA48", 335, F_AVR8X, {0x1E, 0x94, 0x35}, // ID /*AVR16EA48*/ 0, 0x04000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7800, 0x0800, // Mem /*AVR16EA48*/ 16, 4, 45, vtab_avr64ea48, 16, cfgtab_avr64ea48, // ISRs, Config /*AVR16EA48*/ 502, rgftab_avr64ea48, 3, UART_AVR8X, // Register file, UART - /*AVR16EA48*/ 6, ports_avr64ea48}, // Ports + /*AVR16EA48*/ 6, ports_avr64ea48, WDT_AVR8X}, // Ports, WDT //AVR32DD14 atdf, avrdude // Sources {"AVR32DD14", 336, F_AVR8X, {0x1E, 0x95, 0x3B}, // ID /*AVR32DD14*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7000, 0x1000, // Mem /*AVR32DD14*/ 16, 4, 36, vtab_avr64dd20, 17, cfgtab_avr32dd14, // ISRs, Config /*AVR32DD14*/ 390, rgftab_avr32dd14, 2, UART_AVR8X, // Register file, UART - /*AVR32DD14*/ 4, ports_avr32dd14}, // Ports + /*AVR32DD14*/ 4, ports_avr32dd14, WDT_AVR8X}, // Ports, WDT //AVR32DU14 atdf, avrdude // Sources {"AVR32DU14", 390, F_AVR8X, {0x1E, 0x95, 0x4F}, // ID /*AVR32DU14*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7000, 0x1000, // Mem /*AVR32DU14*/ 16, 4, 34, vtab_avr64du32, 20, cfgtab_avr16du14, // ISRs, Config /*AVR32DU14*/ 370, rgftab_avr16du14, 2, UART_AVR8X, // Register file, UART - /*AVR32DU14*/ 4, ports_avr16du14}, // Ports + /*AVR32DU14*/ 4, ports_avr16du14, WDT_AVR8X}, // Ports, WDT //AVR32EB14 atdf, avrdude // Sources {"AVR32EB14", 398, F_AVR8X, {0x1E, 0x95, 0x2D}, // ID /*AVR32EB14*/ 0, 0x08000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7400, 0x0c00, // Mem /*AVR32EB14*/ 16, 4, 31, vtab_avr32eb32, 18, cfgtab_avr16eb14, // ISRs, Config /*AVR32EB14*/ 390, rgftab_avr16eb14, 1, UART_AVR8X, // Register file, UART - /*AVR32EB14*/ 4, ports_avr16eb14}, // Ports + /*AVR32EB14*/ 4, ports_avr16eb14, WDT_AVR8X}, // Ports, WDT //AVR32DD20 atdf, avrdude // Sources {"AVR32DD20", 337, F_AVR8X, {0x1E, 0x95, 0x3A}, // ID /*AVR32DD20*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7000, 0x1000, // Mem /*AVR32DD20*/ 16, 4, 36, vtab_avr64dd20, 17, cfgtab_avr32dd14, // ISRs, Config /*AVR32DD20*/ 391, rgftab_avr16dd20, 2, UART_AVR8X, // Register file, UART - /*AVR32DD20*/ 4, ports_avr16dd20}, // Ports + /*AVR32DD20*/ 4, ports_avr16dd20, WDT_AVR8X}, // Ports, WDT //AVR32DU20 atdf, avrdude // Sources {"AVR32DU20", 391, F_AVR8X, {0x1E, 0x95, 0x4E}, // ID /*AVR32DU20*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7000, 0x1000, // Mem /*AVR32DU20*/ 16, 4, 34, vtab_avr64du32, 20, cfgtab_avr16du14, // ISRs, Config /*AVR32DU20*/ 371, rgftab_avr16du20, 2, UART_AVR8X, // Register file, UART - /*AVR32DU20*/ 4, ports_avr16du20}, // Ports + /*AVR32DU20*/ 4, ports_avr16du20, WDT_AVR8X}, // Ports, WDT //AVR32EB20 atdf, avrdude // Sources {"AVR32EB20", 399, F_AVR8X, {0x1E, 0x95, 0x2C}, // ID /*AVR32EB20*/ 0, 0x08000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7400, 0x0c00, // Mem /*AVR32EB20*/ 16, 4, 31, vtab_avr32eb32, 18, cfgtab_avr16eb14, // ISRs, Config /*AVR32EB20*/ 391, rgftab_avr16eb20, 1, UART_AVR8X, // Register file, UART - /*AVR32EB20*/ 4, ports_avr16eb20}, // Ports + /*AVR32EB20*/ 4, ports_avr16eb20, WDT_AVR8X}, // Ports, WDT //AVR32SD20 atdf, avrdude // Sources {"AVR32SD20", 402, F_AVR8X, {0x1E, 0x95, 0x54}, // ID /*AVR32SD20*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7000, 0x1000, // Mem /*AVR32SD20*/ 16, 4, 50, vtab_avr32sd20, 18, cfgtab_avr32sd20, // ISRs, Config /*AVR32SD20*/ 543, rgftab_avr32sd20, 2, UART_AVR8X, // Register file, UART - /*AVR32SD20*/ 4, ports_avr16dd20}, // Ports + /*AVR32SD20*/ 4, ports_avr16dd20, WDT_AVR8X_DUAL}, // Ports, WDT //AVR32DA28 atdf, avrdude // Sources {"AVR32DA28", 338, F_AVR8X, {0x1E, 0x95, 0x34}, // ID /*AVR32DA28*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x7000, 0x1000, // Mem /*AVR32DA28*/ 16, 4, 41, vtab_avr128da28s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR32DA28*/ 432, rgftab_avr32da28, 3, UART_AVR8X, // Register file, UART - /*AVR32DA28*/ 4, ports_avr32da28}, // Ports + /*AVR32DA28*/ 4, ports_avr32da28, WDT_AVR8X}, // Ports, WDT //AVR32DA28S atdf, avrdude // Sources {"AVR32DA28S", 405, F_AVR8X, {0x1E, 0x95, 0x72}, // ID /*AVR32DA28S*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x7000, 0x1000, // Mem /*AVR32DA28S*/ 16, 4, 41, vtab_avr128da28s, 17, cfgtab_avr32da28s, // ISRs, Config /*AVR32DA28S*/ 432, rgftab_avr32da28, 3, UART_AVR8X, // Register file, UART - /*AVR32DA28S*/ 4, ports_avr32da28}, // Ports + /*AVR32DA28S*/ 4, ports_avr32da28, WDT_AVR8X}, // Ports, WDT //AVR32DB28 atdf, avrdude // Sources {"AVR32DB28", 339, F_AVR8X, {0x1E, 0x95, 0x37}, // ID /*AVR32DB28*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x7000, 0x1000, // Mem /*AVR32DB28*/ 16, 4, 42, vtab_avr128db28, 16, cfgtab_avr32db28, // ISRs, Config /*AVR32DB28*/ 461, rgftab_avr32db28, 3, UART_AVR8X, // Register file, UART - /*AVR32DB28*/ 4, ports_avr32db28}, // Ports + /*AVR32DB28*/ 4, ports_avr32db28, WDT_AVR8X}, // Ports, WDT //AVR32DD28 atdf, avrdude // Sources {"AVR32DD28", 340, F_AVR8X, {0x1E, 0x95, 0x39}, // ID /*AVR32DD28*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7000, 0x1000, // Mem /*AVR32DD28*/ 16, 4, 36, vtab_avr64dd32, 17, cfgtab_avr32dd14, // ISRs, Config /*AVR32DD28*/ 401, rgftab_avr16dd28, 2, UART_AVR8X, // Register file, UART - /*AVR32DD28*/ 4, ports_avr16dd28}, // Ports + /*AVR32DD28*/ 4, ports_avr16dd28, WDT_AVR8X}, // Ports, WDT //AVR32DU28 atdf, avrdude // Sources {"AVR32DU28", 392, F_AVR8X, {0x1E, 0x95, 0x40}, // ID /*AVR32DU28*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7000, 0x1000, // Mem /*AVR32DU28*/ 16, 4, 34, vtab_avr64du32, 20, cfgtab_avr16du14, // ISRs, Config /*AVR32DU28*/ 371, rgftab_avr16du20, 2, UART_AVR8X, // Register file, UART - /*AVR32DU28*/ 4, ports_avr16du28}, // Ports + /*AVR32DU28*/ 4, ports_avr16du28, WDT_AVR8X}, // Ports, WDT //AVR32EA28 atdf, avrdude // Sources {"AVR32EA28", 341, F_AVR8X, {0x1E, 0x95, 0x3E}, // ID /*AVR32EA28*/ 0, 0x08000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7000, 0x1000, // Mem /*AVR32EA28*/ 16, 4, 43, vtab_avr64ea32, 16, cfgtab_avr64ea48, // ISRs, Config /*AVR32EA28*/ 444, rgftab_avr16ea28, 3, UART_AVR8X, // Register file, UART - /*AVR32EA28*/ 4, ports_avr16ea28}, // Ports + /*AVR32EA28*/ 4, ports_avr16ea28, WDT_AVR8X}, // Ports, WDT //AVR32EB28 atdf, avrdude // Sources {"AVR32EB28", 400, F_AVR8X, {0x1E, 0x95, 0x2B}, // ID /*AVR32EB28*/ 0, 0x08000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7400, 0x0c00, // Mem /*AVR32EB28*/ 16, 4, 31, vtab_avr32eb32, 18, cfgtab_avr16eb14, // ISRs, Config /*AVR32EB28*/ 391, rgftab_avr16eb20, 1, UART_AVR8X, // Register file, UART - /*AVR32EB28*/ 4, ports_avr16ea28}, // Ports + /*AVR32EB28*/ 4, ports_avr16ea28, WDT_AVR8X}, // Ports, WDT //AVR32SD28 atdf, avrdude // Sources {"AVR32SD28", 403, F_AVR8X, {0x1E, 0x95, 0x53}, // ID /*AVR32SD28*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7000, 0x1000, // Mem /*AVR32SD28*/ 16, 4, 54, vtab_avr32sd28, 18, cfgtab_avr32sd20, // ISRs, Config /*AVR32SD28*/ 562, rgftab_avr32sd28, 3, UART_AVR8X, // Register file, UART - /*AVR32SD28*/ 4, ports_avr16dd28}, // Ports + /*AVR32SD28*/ 4, ports_avr16dd28, WDT_AVR8X_DUAL}, // Ports, WDT //AVR32DA32 atdf, avrdude // Sources {"AVR32DA32", 342, F_AVR8X, {0x1E, 0x95, 0x33}, // ID /*AVR32DA32*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x7000, 0x1000, // Mem /*AVR32DA32*/ 16, 4, 44, vtab_avr128da32s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR32DA32*/ 447, rgftab_avr32da32, 3, UART_AVR8X, // Register file, UART - /*AVR32DA32*/ 4, ports_atmega808}, // Ports + /*AVR32DA32*/ 4, ports_atmega808, WDT_AVR8X}, // Ports, WDT //AVR32DA32S atdf, avrdude // Sources {"AVR32DA32S", 406, F_AVR8X, {0x1E, 0x95, 0x71}, // ID /*AVR32DA32S*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x7000, 0x1000, // Mem /*AVR32DA32S*/ 16, 4, 44, vtab_avr128da32s, 17, cfgtab_avr32da28s, // ISRs, Config /*AVR32DA32S*/ 447, rgftab_avr32da32, 3, UART_AVR8X, // Register file, UART - /*AVR32DA32S*/ 4, ports_atmega808}, // Ports + /*AVR32DA32S*/ 4, ports_atmega808, WDT_AVR8X}, // Ports, WDT //AVR32DB32 atdf, avrdude // Sources {"AVR32DB32", 343, F_AVR8X, {0x1E, 0x95, 0x36}, // ID /*AVR32DB32*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x7000, 0x1000, // Mem /*AVR32DB32*/ 16, 4, 44, vtab_avr128db32, 16, cfgtab_avr32db28, // ISRs, Config /*AVR32DB32*/ 476, rgftab_avr32db32, 3, UART_AVR8X, // Register file, UART - /*AVR32DB32*/ 4, ports_avr32db32}, // Ports + /*AVR32DB32*/ 4, ports_avr32db32, WDT_AVR8X}, // Ports, WDT //AVR32DD32 atdf, avrdude // Sources {"AVR32DD32", 344, F_AVR8X, {0x1E, 0x95, 0x38}, // ID /*AVR32DD32*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7000, 0x1000, // Mem /*AVR32DD32*/ 16, 4, 36, vtab_avr64dd32, 17, cfgtab_avr32dd14, // ISRs, Config /*AVR32DD32*/ 401, rgftab_avr16dd28, 2, UART_AVR8X, // Register file, UART - /*AVR32DD32*/ 4, ports_avr16dd32}, // Ports + /*AVR32DD32*/ 4, ports_avr16dd32, WDT_AVR8X}, // Ports, WDT //AVR32DU32 atdf, avrdude // Sources {"AVR32DU32", 393, F_AVR8X, {0x1E, 0x95, 0x3F}, // ID /*AVR32DU32*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7000, 0x1000, // Mem /*AVR32DU32*/ 16, 4, 34, vtab_avr64du32, 20, cfgtab_avr16du14, // ISRs, Config /*AVR32DU32*/ 371, rgftab_avr16du20, 2, UART_AVR8X, // Register file, UART - /*AVR32DU32*/ 4, ports_avr16du32}, // Ports + /*AVR32DU32*/ 4, ports_avr16du32, WDT_AVR8X}, // Ports, WDT //AVR32EA32 atdf, avrdude // Sources {"AVR32EA32", 345, F_AVR8X, {0x1E, 0x95, 0x3D}, // ID /*AVR32EA32*/ 0, 0x08000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7000, 0x1000, // Mem /*AVR32EA32*/ 16, 4, 43, vtab_avr64ea32, 16, cfgtab_avr64ea48, // ISRs, Config /*AVR32EA32*/ 444, rgftab_avr16ea28, 3, UART_AVR8X, // Register file, UART - /*AVR32EA32*/ 4, ports_avr16ea32}, // Ports + /*AVR32EA32*/ 4, ports_avr16ea32, WDT_AVR8X}, // Ports, WDT //AVR32EB32 atdf, avrdude // Sources {"AVR32EB32", 401, F_AVR8X, {0x1E, 0x95, 0x2A}, // ID /*AVR32EB32*/ 0, 0x08000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7400, 0x0c00, // Mem /*AVR32EB32*/ 16, 4, 31, vtab_avr32eb32, 18, cfgtab_avr16eb14, // ISRs, Config /*AVR32EB32*/ 391, rgftab_avr16eb20, 1, UART_AVR8X, // Register file, UART - /*AVR32EB32*/ 4, ports_avr16ea32}, // Ports + /*AVR32EB32*/ 4, ports_avr16ea32, WDT_AVR8X}, // Ports, WDT //AVR32SD32 atdf, avrdude // Sources {"AVR32SD32", 404, F_AVR8X, {0x1E, 0x95, 0x52}, // ID /*AVR32SD32*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x7000, 0x1000, // Mem /*AVR32SD32*/ 16, 4, 56, vtab_avr32sd32, 18, cfgtab_avr32sd20, // ISRs, Config /*AVR32SD32*/ 577, rgftab_avr32sd32, 3, UART_AVR8X, // Register file, UART - /*AVR32SD32*/ 4, ports_avr16dd32}, // Ports + /*AVR32SD32*/ 4, ports_avr16dd32, WDT_AVR8X_DUAL}, // Ports, WDT //AVR32DA48 atdf, avrdude // Sources {"AVR32DA48", 346, F_AVR8X, {0x1E, 0x95, 0x32}, // ID /*AVR32DA48*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x7000, 0x1000, // Mem /*AVR32DA48*/ 16, 4, 61, vtab_avr32da48s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR32DA48*/ 610, rgftab_avr32da48, 5, UART_AVR8X, // Register file, UART - /*AVR32DA48*/ 6, ports_atmega809}, // Ports + /*AVR32DA48*/ 6, ports_atmega809, WDT_AVR8X}, // Ports, WDT //AVR32DA48S atdf, avrdude // Sources {"AVR32DA48S", 407, F_AVR8X, {0x1E, 0x95, 0x70}, // ID /*AVR32DA48S*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x7000, 0x1000, // Mem /*AVR32DA48S*/ 16, 4, 61, vtab_avr32da48s, 17, cfgtab_avr32da28s, // ISRs, Config /*AVR32DA48S*/ 610, rgftab_avr32da48, 5, UART_AVR8X, // Register file, UART - /*AVR32DA48S*/ 6, ports_atmega809}, // Ports + /*AVR32DA48S*/ 6, ports_atmega809, WDT_AVR8X}, // Ports, WDT //AVR32DB48 atdf, avrdude // Sources {"AVR32DB48", 347, F_AVR8X, {0x1E, 0x95, 0x35}, // ID /*AVR32DB48*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x7000, 0x1000, // Mem /*AVR32DB48*/ 16, 4, 61, vtab_avr128db48, 16, cfgtab_avr32db28, // ISRs, Config /*AVR32DB48*/ 642, rgftab_avr32db48, 5, UART_AVR8X, // Register file, UART - /*AVR32DB48*/ 6, ports_atmega809}, // Ports + /*AVR32DB48*/ 6, ports_atmega809, WDT_AVR8X}, // Ports, WDT //AVR32EA48 atdf, avrdude // Sources {"AVR32EA48", 348, F_AVR8X, {0x1E, 0x95, 0x3C}, // ID /*AVR32EA48*/ 0, 0x08000, 0x040, 1, 0x0100, 0x01400, 0x0200, 8, 0x7000, 0x1000, // Mem /*AVR32EA48*/ 16, 4, 45, vtab_avr64ea48, 16, cfgtab_avr64ea48, // ISRs, Config /*AVR32EA48*/ 502, rgftab_avr64ea48, 3, UART_AVR8X, // Register file, UART - /*AVR32EA48*/ 6, ports_avr64ea48}, // Ports + /*AVR32EA48*/ 6, ports_avr64ea48, WDT_AVR8X}, // Ports, WDT //AVR64DD14 atdf, avrdude // Sources {"AVR64DD14", 349, F_AVR8X, {0x1E, 0x96, 0x1D}, // ID /*AVR64DD14*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x6000, 0x2000, // Mem /*AVR64DD14*/ 16, 4, 36, vtab_avr64dd20, 17, cfgtab_avr32dd14, // ISRs, Config /*AVR64DD14*/ 390, rgftab_avr32dd14, 2, UART_AVR8X, // Register file, UART - /*AVR64DD14*/ 4, ports_avr32dd14}, // Ports + /*AVR64DD14*/ 4, ports_avr32dd14, WDT_AVR8X}, // Ports, WDT //AVR64DD20 atdf, avrdude // Sources {"AVR64DD20", 350, F_AVR8X, {0x1E, 0x96, 0x1C}, // ID /*AVR64DD20*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x6000, 0x2000, // Mem /*AVR64DD20*/ 16, 4, 36, vtab_avr64dd20, 17, cfgtab_avr32dd14, // ISRs, Config /*AVR64DD20*/ 391, rgftab_avr16dd20, 2, UART_AVR8X, // Register file, UART - /*AVR64DD20*/ 4, ports_avr16dd20}, // Ports + /*AVR64DD20*/ 4, ports_avr16dd20, WDT_AVR8X}, // Ports, WDT //AVR64DA28 atdf, avrdude // Sources {"AVR64DA28", 351, F_AVR8X, {0x1E, 0x96, 0x15}, // ID /*AVR64DA28*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem /*AVR64DA28*/ 16, 4, 41, vtab_avr128da28s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR64DA28*/ 432, rgftab_avr32da28, 3, UART_AVR8X, // Register file, UART - /*AVR64DA28*/ 4, ports_avr32da28}, // Ports + /*AVR64DA28*/ 4, ports_avr32da28, WDT_AVR8X}, // Ports, WDT //AVR64DA28S atdf, avrdude // Sources {"AVR64DA28S", 408, F_AVR8X, {0x1E, 0x96, 0x2E}, // ID /*AVR64DA28S*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem /*AVR64DA28S*/ 16, 4, 41, vtab_avr128da28s, 17, cfgtab_avr32da28s, // ISRs, Config /*AVR64DA28S*/ 432, rgftab_avr32da28, 3, UART_AVR8X, // Register file, UART - /*AVR64DA28S*/ 4, ports_avr32da28}, // Ports + /*AVR64DA28S*/ 4, ports_avr32da28, WDT_AVR8X}, // Ports, WDT //AVR64DB28 atdf, avrdude // Sources {"AVR64DB28", 352, F_AVR8X, {0x1E, 0x96, 0x19}, // ID /*AVR64DB28*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem /*AVR64DB28*/ 16, 4, 42, vtab_avr128db28, 16, cfgtab_avr32db28, // ISRs, Config /*AVR64DB28*/ 461, rgftab_avr32db28, 3, UART_AVR8X, // Register file, UART - /*AVR64DB28*/ 4, ports_avr32db28}, // Ports + /*AVR64DB28*/ 4, ports_avr32db28, WDT_AVR8X}, // Ports, WDT //AVR64DD28 atdf, avrdude // Sources {"AVR64DD28", 353, F_AVR8X, {0x1E, 0x96, 0x1B}, // ID /*AVR64DD28*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x6000, 0x2000, // Mem /*AVR64DD28*/ 16, 4, 36, vtab_avr64dd32, 17, cfgtab_avr32dd14, // ISRs, Config /*AVR64DD28*/ 401, rgftab_avr16dd28, 2, UART_AVR8X, // Register file, UART - /*AVR64DD28*/ 4, ports_avr16dd28}, // Ports + /*AVR64DD28*/ 4, ports_avr16dd28, WDT_AVR8X}, // Ports, WDT //AVR64DU28 atdf, avrdude // Sources {"AVR64DU28", 384, F_AVR8X, {0x1E, 0x96, 0x22}, // ID /*AVR64DU28*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x6000, 0x2000, // Mem /*AVR64DU28*/ 16, 4, 34, vtab_avr64du32, 20, cfgtab_avr16du14, // ISRs, Config /*AVR64DU28*/ 371, rgftab_avr16du20, 2, UART_AVR8X, // Register file, UART - /*AVR64DU28*/ 4, ports_avr16du28}, // Ports + /*AVR64DU28*/ 4, ports_avr16du28, WDT_AVR8X}, // Ports, WDT //AVR64EA28 atdf, avrdude // Sources {"AVR64EA28", 354, F_AVR8X, {0x1E, 0x96, 0x20}, // ID /*AVR64EA28*/ 0, 0x10000, 0x080, 1, 0x0100, 0x01400, 0x0200, 8, 0x6800, 0x1800, // Mem /*AVR64EA28*/ 16, 4, 43, vtab_avr64ea32, 16, cfgtab_avr64ea48, // ISRs, Config /*AVR64EA28*/ 444, rgftab_avr16ea28, 3, UART_AVR8X, // Register file, UART - /*AVR64EA28*/ 4, ports_avr16ea28}, // Ports + /*AVR64EA28*/ 4, ports_avr16ea28, WDT_AVR8X}, // Ports, WDT //AVR64DA32 atdf, avrdude // Sources {"AVR64DA32", 355, F_AVR8X, {0x1E, 0x96, 0x14}, // ID /*AVR64DA32*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem /*AVR64DA32*/ 16, 4, 44, vtab_avr128da32s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR64DA32*/ 447, rgftab_avr32da32, 3, UART_AVR8X, // Register file, UART - /*AVR64DA32*/ 4, ports_atmega808}, // Ports + /*AVR64DA32*/ 4, ports_atmega808, WDT_AVR8X}, // Ports, WDT //AVR64DA32S atdf, avrdude // Sources {"AVR64DA32S", 409, F_AVR8X, {0x1E, 0x96, 0x2D}, // ID /*AVR64DA32S*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem /*AVR64DA32S*/ 16, 4, 44, vtab_avr128da32s, 17, cfgtab_avr32da28s, // ISRs, Config /*AVR64DA32S*/ 447, rgftab_avr32da32, 3, UART_AVR8X, // Register file, UART - /*AVR64DA32S*/ 4, ports_atmega808}, // Ports + /*AVR64DA32S*/ 4, ports_atmega808, WDT_AVR8X}, // Ports, WDT //AVR64DB32 atdf, avrdude // Sources {"AVR64DB32", 356, F_AVR8X, {0x1E, 0x96, 0x18}, // ID /*AVR64DB32*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem /*AVR64DB32*/ 16, 4, 44, vtab_avr128db32, 16, cfgtab_avr32db28, // ISRs, Config /*AVR64DB32*/ 476, rgftab_avr32db32, 3, UART_AVR8X, // Register file, UART - /*AVR64DB32*/ 4, ports_avr32db32}, // Ports + /*AVR64DB32*/ 4, ports_avr32db32, WDT_AVR8X}, // Ports, WDT //AVR64DD32 atdf, avrdude // Sources {"AVR64DD32", 357, F_AVR8X, {0x1E, 0x96, 0x1A}, // ID /*AVR64DD32*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x6000, 0x2000, // Mem /*AVR64DD32*/ 16, 4, 36, vtab_avr64dd32, 17, cfgtab_avr32dd14, // ISRs, Config /*AVR64DD32*/ 401, rgftab_avr16dd28, 2, UART_AVR8X, // Register file, UART - /*AVR64DD32*/ 4, ports_avr16dd32}, // Ports + /*AVR64DD32*/ 4, ports_avr16dd32, WDT_AVR8X}, // Ports, WDT //AVR64DU32 atdf, avrdude // Sources {"AVR64DU32", 385, F_AVR8X, {0x1E, 0x96, 0x21}, // ID /*AVR64DU32*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0100, 1, 0x6000, 0x2000, // Mem /*AVR64DU32*/ 16, 4, 34, vtab_avr64du32, 20, cfgtab_avr16du14, // ISRs, Config /*AVR64DU32*/ 371, rgftab_avr16du20, 2, UART_AVR8X, // Register file, UART - /*AVR64DU32*/ 4, ports_avr16du32}, // Ports + /*AVR64DU32*/ 4, ports_avr16du32, WDT_AVR8X}, // Ports, WDT //AVR64EA32 atdf, avrdude // Sources {"AVR64EA32", 358, F_AVR8X, {0x1E, 0x96, 0x1F}, // ID /*AVR64EA32*/ 0, 0x10000, 0x080, 1, 0x0100, 0x01400, 0x0200, 8, 0x6800, 0x1800, // Mem /*AVR64EA32*/ 16, 4, 43, vtab_avr64ea32, 16, cfgtab_avr64ea48, // ISRs, Config /*AVR64EA32*/ 444, rgftab_avr16ea28, 3, UART_AVR8X, // Register file, UART - /*AVR64EA32*/ 4, ports_avr16ea32}, // Ports + /*AVR64EA32*/ 4, ports_avr16ea32, WDT_AVR8X}, // Ports, WDT //AVR64DA48 atdf, avrdude // Sources {"AVR64DA48", 359, F_AVR8X, {0x1E, 0x96, 0x13}, // ID /*AVR64DA48*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem /*AVR64DA48*/ 16, 4, 58, vtab_avr128da48s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR64DA48*/ 600, rgftab_avr64da48, 5, UART_AVR8X, // Register file, UART - /*AVR64DA48*/ 6, ports_atmega809}, // Ports + /*AVR64DA48*/ 6, ports_atmega809, WDT_AVR8X}, // Ports, WDT //AVR64DA48S atdf, avrdude // Sources {"AVR64DA48S", 410, F_AVR8X, {0x1E, 0x96, 0x2C}, // ID /*AVR64DA48S*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem /*AVR64DA48S*/ 16, 4, 58, vtab_avr128da48s, 17, cfgtab_avr32da28s, // ISRs, Config /*AVR64DA48S*/ 600, rgftab_avr64da48, 5, UART_AVR8X, // Register file, UART - /*AVR64DA48S*/ 6, ports_atmega809}, // Ports + /*AVR64DA48S*/ 6, ports_atmega809, WDT_AVR8X}, // Ports, WDT //AVR64DB48 atdf, avrdude // Sources {"AVR64DB48", 360, F_AVR8X, {0x1E, 0x96, 0x17}, // ID /*AVR64DB48*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem /*AVR64DB48*/ 16, 4, 61, vtab_avr128db48, 16, cfgtab_avr32db28, // ISRs, Config /*AVR64DB48*/ 642, rgftab_avr32db48, 5, UART_AVR8X, // Register file, UART - /*AVR64DB48*/ 6, ports_atmega809}, // Ports + /*AVR64DB48*/ 6, ports_atmega809, WDT_AVR8X}, // Ports, WDT //AVR64EA48 atdf, avrdude // Sources {"AVR64EA48", 361, F_AVR8X, {0x1E, 0x96, 0x1E}, // ID /*AVR64EA48*/ 0, 0x10000, 0x080, 1, 0x0100, 0x01400, 0x0200, 8, 0x6800, 0x1800, // Mem /*AVR64EA48*/ 16, 4, 45, vtab_avr64ea48, 16, cfgtab_avr64ea48, // ISRs, Config /*AVR64EA48*/ 502, rgftab_avr64ea48, 3, UART_AVR8X, // Register file, UART - /*AVR64EA48*/ 6, ports_avr64ea48}, // Ports + /*AVR64EA48*/ 6, ports_avr64ea48, WDT_AVR8X}, // Ports, WDT //AVR64DA64 atdf, avrdude // Sources {"AVR64DA64", 362, F_AVR8X, {0x1E, 0x96, 0x12}, // ID /*AVR64DA64*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem /*AVR64DA64*/ 16, 4, 64, vtab_avr128da64s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR64DA64*/ 658, rgftab_avr64da64, 6, UART_AVR8X, // Register file, UART - /*AVR64DA64*/ 7, ports_avr64da64}, // Ports + /*AVR64DA64*/ 7, ports_avr64da64, WDT_AVR8X}, // Ports, WDT //AVR64DA64S atdf, avrdude // Sources {"AVR64DA64S", 411, F_AVR8X, {0x1E, 0x96, 0x2B}, // ID /*AVR64DA64S*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem /*AVR64DA64S*/ 16, 4, 64, vtab_avr128da64s, 17, cfgtab_avr32da28s, // ISRs, Config /*AVR64DA64S*/ 658, rgftab_avr64da64, 6, UART_AVR8X, // Register file, UART - /*AVR64DA64S*/ 7, ports_avr64da64}, // Ports + /*AVR64DA64S*/ 7, ports_avr64da64, WDT_AVR8X}, // Ports, WDT //AVR64DB64 atdf, avrdude // Sources {"AVR64DB64", 363, F_AVR8X, {0x1E, 0x96, 0x16}, // ID /*AVR64DB64*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem /*AVR64DB64*/ 16, 4, 65, vtab_avr128db64, 16, cfgtab_avr32db28, // ISRs, Config /*AVR64DB64*/ 697, rgftab_avr64db64, 6, UART_AVR8X, // Register file, UART - /*AVR64DB64*/ 7, ports_avr64da64}, // Ports + /*AVR64DB64*/ 7, ports_avr64da64, WDT_AVR8X}, // Ports, WDT //AVR128DA28 atdf, avrdude // Sources {"AVR128DA28", 364, F_AVR8X, {0x1E, 0x97, 0x0A}, // ID /*AVR128DA28*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem /*AVR128DA28*/ 16, 4, 41, vtab_avr128da28s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR128DA28*/ 433, rgftab_avr128da28, 3, UART_AVR8X, // Register file, UART - /*AVR128DA28*/ 4, ports_avr32da28}, // Ports + /*AVR128DA28*/ 4, ports_avr32da28, WDT_AVR8X}, // Ports, WDT //AVR128DA28S atdf, avrdude // Sources {"AVR128DA28S", 394, F_AVR8X, {0x1E, 0x97, 0x12}, // ID /*AVR128DA28S*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem /*AVR128DA28S*/ 16, 4, 41, vtab_avr128da28s, 17, cfgtab_avr32da28s, // ISRs, Config /*AVR128DA28S*/ 433, rgftab_avr128da28, 3, UART_AVR8X, // Register file, UART - /*AVR128DA28S*/ 4, ports_avr32da28}, // Ports + /*AVR128DA28S*/ 4, ports_avr32da28, WDT_AVR8X}, // Ports, WDT //AVR128DB28 atdf, avrdude // Sources {"AVR128DB28", 365, F_AVR8X, {0x1E, 0x97, 0x0E}, // ID /*AVR128DB28*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem /*AVR128DB28*/ 16, 4, 42, vtab_avr128db28, 16, cfgtab_avr32db28, // ISRs, Config /*AVR128DB28*/ 462, rgftab_avr128db28, 3, UART_AVR8X, // Register file, UART - /*AVR128DB28*/ 4, ports_avr32db28}, // Ports + /*AVR128DB28*/ 4, ports_avr32db28, WDT_AVR8X}, // Ports, WDT //AVR128DA32 atdf, avrdude // Sources {"AVR128DA32", 366, F_AVR8X, {0x1E, 0x97, 0x09}, // ID /*AVR128DA32*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem /*AVR128DA32*/ 16, 4, 44, vtab_avr128da32s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR128DA32*/ 448, rgftab_avr128da32, 3, UART_AVR8X, // Register file, UART - /*AVR128DA32*/ 4, ports_atmega808}, // Ports + /*AVR128DA32*/ 4, ports_atmega808, WDT_AVR8X}, // Ports, WDT //AVR128DA32S atdf, avrdude // Sources {"AVR128DA32S", 395, F_AVR8X, {0x1E, 0x97, 0x11}, // ID /*AVR128DA32S*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem /*AVR128DA32S*/ 16, 4, 44, vtab_avr128da32s, 17, cfgtab_avr32da28s, // ISRs, Config /*AVR128DA32S*/ 448, rgftab_avr128da32, 3, UART_AVR8X, // Register file, UART - /*AVR128DA32S*/ 4, ports_atmega808}, // Ports + /*AVR128DA32S*/ 4, ports_atmega808, WDT_AVR8X}, // Ports, WDT //AVR128DB32 atdf, avrdude // Sources {"AVR128DB32", 367, F_AVR8X, {0x1E, 0x97, 0x0D}, // ID /*AVR128DB32*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem /*AVR128DB32*/ 16, 4, 44, vtab_avr128db32, 16, cfgtab_avr32db28, // ISRs, Config /*AVR128DB32*/ 477, rgftab_avr128db32, 3, UART_AVR8X, // Register file, UART - /*AVR128DB32*/ 4, ports_avr32db32}, // Ports + /*AVR128DB32*/ 4, ports_avr32db32, WDT_AVR8X}, // Ports, WDT //AVR128DA48 atdf, avrdude // Sources {"AVR128DA48", 368, F_AVR8X, {0x1E, 0x97, 0x08}, // ID /*AVR128DA48*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem /*AVR128DA48*/ 16, 4, 58, vtab_avr128da48s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR128DA48*/ 601, rgftab_avr128da48, 5, UART_AVR8X, // Register file, UART - /*AVR128DA48*/ 6, ports_atmega809}, // Ports + /*AVR128DA48*/ 6, ports_atmega809, WDT_AVR8X}, // Ports, WDT //AVR128DA48S atdf, avrdude // Sources {"AVR128DA48S", 396, F_AVR8X, {0x1E, 0x97, 0x10}, // ID /*AVR128DA48S*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem /*AVR128DA48S*/ 16, 4, 58, vtab_avr128da48s, 17, cfgtab_avr32da28s, // ISRs, Config /*AVR128DA48S*/ 601, rgftab_avr128da48, 5, UART_AVR8X, // Register file, UART - /*AVR128DA48S*/ 6, ports_atmega809}, // Ports + /*AVR128DA48S*/ 6, ports_atmega809, WDT_AVR8X}, // Ports, WDT //AVR128DB48 atdf, avrdude // Sources {"AVR128DB48", 369, F_AVR8X, {0x1E, 0x97, 0x0C}, // ID /*AVR128DB48*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem /*AVR128DB48*/ 16, 4, 61, vtab_avr128db48, 16, cfgtab_avr32db28, // ISRs, Config /*AVR128DB48*/ 643, rgftab_avr128db48, 5, UART_AVR8X, // Register file, UART - /*AVR128DB48*/ 6, ports_atmega809}, // Ports + /*AVR128DB48*/ 6, ports_atmega809, WDT_AVR8X}, // Ports, WDT //AVR128DA64 atdf, avrdude // Sources {"AVR128DA64", 370, F_AVR8X, {0x1E, 0x97, 0x07}, // ID /*AVR128DA64*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem /*AVR128DA64*/ 16, 4, 64, vtab_avr128da64s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR128DA64*/ 659, rgftab_avr128da64, 6, UART_AVR8X, // Register file, UART - /*AVR128DA64*/ 7, ports_avr64da64}, // Ports + /*AVR128DA64*/ 7, ports_avr64da64, WDT_AVR8X}, // Ports, WDT //AVR128DA64S atdf, avrdude // Sources {"AVR128DA64S", 397, F_AVR8X, {0x1E, 0x97, 0x0F}, // ID /*AVR128DA64S*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem /*AVR128DA64S*/ 16, 4, 64, vtab_avr128da64s, 17, cfgtab_avr32da28s, // ISRs, Config /*AVR128DA64S*/ 659, rgftab_avr128da64, 6, UART_AVR8X, // Register file, UART - /*AVR128DA64S*/ 7, ports_avr64da64}, // Ports + /*AVR128DA64S*/ 7, ports_avr64da64, WDT_AVR8X}, // Ports, WDT //AVR128DB64 atdf, avrdude // Sources {"AVR128DB64", 371, F_AVR8X, {0x1E, 0x97, 0x0B}, // ID /*AVR128DB64*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem /*AVR128DB64*/ 16, 4, 65, vtab_avr128db64, 16, cfgtab_avr32db28, // ISRs, Config /*AVR128DB64*/ 698, rgftab_avr128db64, 6, UART_AVR8X, // Register file, UART - /*AVR128DB64*/ 7, ports_avr64da64}, // Ports + /*AVR128DB64*/ 7, ports_avr64da64, WDT_AVR8X}, // Ports, WDT }; diff --git a/src/libavrdude-avrintel.h b/src/libavrdude-avrintel.h index 49a28ba7..a1304e95 100644 --- a/src/libavrdude-avrintel.h +++ b/src/libavrdude-avrintel.h @@ -11,8 +11,8 @@ * Published under GNU General Public License, version 3 (GPL-3.0) * Meta-author Stefan Rueger * - * v 1.43 - * 11.03.2025 + * v 1.44 + * 22.03.2025 * */ @@ -84,12 +84,13 @@ typedef struct { // Value of -1 typically means unknown uint16_t nregisters; // Number of I/O registers const Register_file *regf; // Register file uint8_t numuarts; // Number of UART interfaces - uint8_t uarttype; // UARTTYPE_UNKNOWN, _NONE, _CLASSIC, _LIN, XMEGA, _AVR8X + uint8_t uarttype; // UARTTYPE_UNKNOWN, _NONE, _CLASSIC, _LIN, _XMEGA, _AVR8X uint8_t has_u2x; // 1 = 2x speed possible (8 samples), 0 = 1x speed only uint8_t brr_nbits; // Number of baud rate divisor bits (integer part) uint8_t brr_nfraction; // Number of bits for fractional part of baud rate divisor uint8_t nports; // Number of port registers (one per letter A-H, J-N, P-R) const Port_bits *ports; // Port list + uint8_t wdttype; // WDT_UNKOWN, _NONE, _CLASSIC3, _CLASSIC4, _XMEGA, _AVR8X, _AVR8X_DUAL } Avrintel; #define F_AVR8L 1 // TPI programming, ATtiny(4|5|9|10|20|40|102|104) @@ -104,6 +105,14 @@ typedef struct { // Value of -1 typically means unknown #define UARTTYPE_XMEGA 3 #define UARTTYPE_AVR8X 4 +#define WDT_UNKNOWN (-1) +#define WDT_NONE 0 +#define WDT_CLASSIC3 1 // 3-bit prescaler: 8 timeouts from 16 ms ... 2 s (mask 0x07) +#define WDT_CLASSIC4 2 // 4-bit prescaler: 10 timeouts from 16 ms ... 8 s (mask 0x27) +#define WDT_XMEGA 3 // 11 timeouts from 8 ms to 8 s +#define WDT_AVR8X 4 // 11 timeouts from 8 ms to 8 s +#define WDT_AVR8X_DUAL 5 // 11 timeouts from 244 us to 250 ms + synchronous wdt + #define UB_N_MCU 2040 // mcuid is in 0..2039 extern const Avrintel uP_table[412];