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<title>AVRDUDE: B. Troubleshooting</title>
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<a name="Troubleshooting"></a>
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<table cellpadding="1" cellspacing="1" border="0">
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<tr><td valign="middle" align="left">[<a href="avrdude_45.html#Parallel-Ports" title="Previous section in reading order"> < </a>]</td>
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<td valign="middle" align="left">[<a href="avrdude_47.html#List-of-Programmers" title="Next section in reading order"> > </a>]</td>
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<td valign="middle" align="left"> </td>
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<td valign="middle" align="left">[<a href="avrdude_27.html#Platform-Dependent-Information" title="Beginning of this chapter or previous chapter"> << </a>]</td>
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<td valign="middle" align="left">[<a href="avrdude.html#Top" title="Up section"> Up </a>]</td>
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<td valign="middle" align="left">[<a href="avrdude_47.html#List-of-Programmers" title="Next chapter"> >> </a>]</td>
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<td valign="middle" align="left"> </td>
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<td valign="middle" align="left"> </td>
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<td valign="middle" align="left"> </td>
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<td valign="middle" align="left"> </td>
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<td valign="middle" align="left">[<a href="avrdude.html#Top" title="Cover (top) of document">Top</a>]</td>
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<td valign="middle" align="left">[<a href="avrdude_toc.html#SEC_Contents" title="Table of contents">Contents</a>]</td>
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<td valign="middle" align="left">[<a href="avrdude_53.html#Index" title="Index">Index</a>]</td>
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<td valign="middle" align="left">[<a href="avrdude_abt.html#SEC_About" title="About (help)"> ? </a>]</td>
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</tr></table>
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<hr size="1">
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<a name="Troubleshooting-1"></a>
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<h1 class="appendix">B. Troubleshooting</h1>
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<p>Please report any bugs encountered via
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<a href="https://github.com/avrdudes/avrdude/issues">https://github.com/avrdudes/avrdude/issues</a>.
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</p>
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<p>AVRDUDE’s wiki <a href="https://github.com/avrdudes/avrdude/wiki">https://github.com/avrdudes/avrdude/wiki</a> is a great
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place to learn about installing AVRDUDE on various platforms and,
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generally, to learn a few tricks of the trade. In paticular, the
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<a href="https://github.com/avrdudes/avrdude/wiki/FAQ">FAQ</a> and the
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<a href="https://github.com/avrdudes/avrdude/wiki/Known-limitations-of-avrdude">known limitations</a> of avrdude are worth reading.
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</p>
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<p>Here a few examples for things that can go wrong and what to do:
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</p>
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<ul>
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<li>
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Problem: I’m using a serial programmer under Windows and get the following
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error:
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<p><code>avrdude: serial_open(): can't set attributes for device "com1"</code>,
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</p>
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<p>Solution: This problem seems to appear with certain versions of Cygwin. Specifying
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<code>"/dev/com1"</code> instead of <code>"com1"</code> should help.
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</p>
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</li><li>
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Problem: I’m using Linux and my AVR910 programmer is really slow.
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<p>Solution:
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There are two problems here. First, the system may wait some time before it
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passes data from the serial port to the program. Under Linux the following
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command works around this (you may need root privileges for this).
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</p>
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<p><code>setserial <var>port</var> low_latency</code>
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</p>
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<p>Secondly, the serial interface chip may delay the interrupt for some time.
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This behaviour can be changed by setting the FIFO-threshold to one. Under Linux this
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can only be done by changing the kernel source in <code>drivers/char/serial.c</code>.
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Search the file for <code>UART_FCR_TRIGGER_8</code> and replace it with <code>UART_FCR_TRIGGER_1</code>.
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Note that overall performance might suffer if there
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is high throughput on serial lines. Also note that you are modifying the kernel at
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your own risk.
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</p>
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</li><li>
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Problem: I’m not using Linux and my AVR910 programmer is really slow.
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<p>Solution: The reasons for this are the same as above.
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If you know how to work around this on your OS, please let us know.
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</p>
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<a name="index-eeprom-15"></a>
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</li><li>
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Problem: Page-mode programming the EEPROM using the -U option does
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not erase EEPROM cells before writing, and thus cannot necessarily overwrite
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non-0xff values.
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<p>Solution: This is an inherent feature of how JTAG EEPROM programming
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works, and is documented as such in the datasheets. In order to
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successfully program the EEPROM, a prior chip erase with the EESAVE fuse
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unprogrammed is required. This also applies to the STK500 and STK600 in
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high-voltage programming mode.
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</p>
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<p>The terminal, however, recognises that the programmer struggles to write
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to EEPROM. It then reads flash, EEPROM and, if present, bootrow contents,
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performs a chip erase and then writes these memories back. This happens
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when flushing the cache or leaving the terminal and takes some time.
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EESAVE needs to be unprogrammed for this.
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</p>
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</li><li>
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Problem: How do I turn off the <code>DWEN</code> fuse?
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<p>Solution: If the <code>DWEN</code> (debugWIRE enable) fuse is activated,
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the <code>/RESET</code> pin is not functional anymore, so normal ISP
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communication cannot be established.
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There are two options to deactivate that fuse again: high-voltage
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programming, or getting the JTAG ICE mkII talk debugWIRE, and
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prepare the target AVR to accept normal ISP communication again.
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</p>
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<p>The first option requires a programmer that is capable of high-voltage
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programming (either serial or parallel, depending on the AVR device),
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for example the STK500. In high-voltage programming mode, the
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<code>/RESET</code> pin is activated initially using a 12 V pulse (thus the
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name <em>high voltage</em>), so the target AVR can subsequently be
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reprogrammed, and the <code>DWEN</code> fuse can be cleared. Typically, this
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operation cannot be performed while the AVR is located in the target
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circuit though.
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</p>
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<p>The second option requires a JTAG ICE mkII that can talk the debugWIRE
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protocol. The ICE needs to be connected to the target using the
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JTAG-to-ISP adapter, so the JTAG ICE mkII can be used as a debugWIRE
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initiator as well as an ISP programmer. AVRDUDE will then be activated
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using the <code>jtag2isp</code> programmer type. The initial ISP
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communication attempt will fail, but AVRDUDE then tries to initiate a
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debugWIRE reset. When successful, this will leave the target AVR in a
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state where it can accept standard ISP communication. The ICE is then
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signed off (which will make it signing off from the USB as well), so
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AVRDUDE has to be called again afterwards. This time, standard ISP
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communication can work, so the <code>DWEN</code> fuse can be cleared.
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The pin mapping for the JTAG-to-ISP adapter is:
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</p>
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<table>
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<tr><td width="10%"></td><td width="10%"><strong>JTAG</strong></td><td width="10%"><strong>ISP</strong></td></tr>
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<tr><td width="10%"></td><td width="10%">1</td><td width="10%">3</td></tr>
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<tr><td width="10%"></td><td width="10%">2</td><td width="10%">6</td></tr>
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<tr><td width="10%"></td><td width="10%">3</td><td width="10%">1</td></tr>
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<tr><td width="10%"></td><td width="10%">4</td><td width="10%">2</td></tr>
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<tr><td width="10%"></td><td width="10%">6</td><td width="10%">5</td></tr>
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<tr><td width="10%"></td><td width="10%">9</td><td width="10%">4</td></tr>
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</table>
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</li><li>
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Problem: Differentiate multiple USBtinyISP (or USBasp) programmers
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<p>Solution: The ‘<samp>-c usbtiny</samp>’ programmer distinguishes multiple physical
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USBtinyISP devices based on their busdir:devicefile pairs that describe
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their place in the USB hierarchy on a specific host. This pair can be
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specified in the ‘<samp>-P usb:<var>busdir</var>:<var>devicefile</var></samp>’ option. The
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naming convention for the bus and device depends on the operating system.
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Examples for Linux, FreeBSD and Windows, respectively:
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</p>
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<table><tr><td> </td><td><pre class="example">$ avrdude -c usbtiny -p atmega8 -P usb:003:025
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$ avrdude -c usbtiny -p atmega8 -P usb:/dev/usb:/dev/ugen1.3
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$ avrdude -c usbtiny -p atmega8 \
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-P 'usb:bus-0:\\?\usb#vid_16c0&pid_05dc#0001#{a5...ed}--WinUSB'
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</pre></td></tr></table>
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<p>The Windows device name contains the backslash file separator, so the
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‘<samp>-P</samp>’ option will need appropriate quoting on the command line, eg,
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in bash with single quotes.
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</p>
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<p>For USBasp the same ‘<samp>-P usb:<var>busdir</var>:<var>devicefile</var></samp>’ as with
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USBtiny selects the right device. Alternatively, USBasp can select the
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device via its serial number using ‘<samp>-P usb:<var>serialno</var></samp>’.
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</p>
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<p>Note that <code>avrdude -v -P usb:xyz</code> will print out suitable programmers
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on the bus assuming xyz does not match any device.
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</p>
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<table><tr><td> </td><td><pre class="example">$ avrdude -v -Pusb:xyz -c usbasp -p m328p 2>&1 | grep ^Found
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Found USBasp with busdir:devicefile = 001:008, serial_number = 0001
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Found USBasp with busdir:devicefile = 001:009, serial_number = 1234
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$ avrdude -qq -c USBasp -p atmega8 -P usb:34
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</pre></td></tr></table>
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</li><li>
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Problem: I cannot do … when the target is in debugWIRE mode.
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<p>Solution: debugWIRE mode imposes several limitations.
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</p>
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<p>The debugWIRE protocol is Atmel’s proprietary one-wire (plus ground)
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protocol to allow an in-circuit emulation of the smaller AVR devices,
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using the <code>/RESET</code> line.
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DebugWIRE mode is initiated by activating the <code>DWEN</code>
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fuse, and then power-cycling the target.
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While this mode is mainly intended for debugging/emulation, it
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also offers limited programming capabilities.
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Effectively, the only memory areas that can be read or programmed
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in this mode are flash and EEPROM.
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It is also possible to read out the signature.
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All other memory areas cannot be accessed.
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There is no
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<em>chip erase</em>
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functionality in debugWIRE mode; instead, while reprogramming the
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flash, each flash page is erased right before updating it.
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This is done transparently by the JTAG ICE mkII (or AVR Dragon).
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The only way back from debugWIRE mode is to initiate a special
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sequence of commands to the JTAG ICE mkII (or AVR Dragon), so the
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debugWIRE mode will be temporarily disabled, and the target can
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be accessed using normal ISP programming.
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This sequence is automatically initiated by using the JTAG ICE mkII
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or AVR Dragon in ISP mode, when they detect that ISP mode cannot be
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entered.
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</p>
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</li><li>
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Problem: I want to use my JTAG ICE mkII to program an
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Xmega device through PDI. The documentation tells me to use the
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<em>XMEGA PDI adapter for JTAGICE mkII</em> that is supposed to ship
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with the kit, yet I don’t have it.
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<p>Solution: Use the following pin mapping:
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</p>
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<table>
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<tr><td width="5%"></td><td width="20%"><strong>JTAG ICE</strong></td><td width="20%"><strong>Target</strong></td><td width="20%"><strong>Squid cable</strong></td><td width="20%"><strong>PDI</strong></td></tr>
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<tr><td width="5%"></td><td width="20%"><strong>mkII probe</strong></td><td width="20%"><strong>pins</strong></td><td width="20%"><strong>colors</strong></td><td width="20%"><strong>header</strong></td></tr>
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<tr><td width="5%"></td><td width="20%">1 (TCK)</td><td width="20%"></td><td width="20%">Black</td><td width="20%"></td></tr>
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<tr><td width="5%"></td><td width="20%">2 (GND)</td><td width="20%">GND</td><td width="20%">White</td><td width="20%">6</td></tr>
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<tr><td width="5%"></td><td width="20%">3 (TDO)</td><td width="20%"></td><td width="20%">Grey</td><td width="20%"></td></tr>
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<tr><td width="5%"></td><td width="20%">4 (VTref)</td><td width="20%">VTref</td><td width="20%">Purple</td><td width="20%">2</td></tr>
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<tr><td width="5%"></td><td width="20%">5 (TMS)</td><td width="20%"></td><td width="20%">Blue</td><td width="20%"></td></tr>
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<tr><td width="5%"></td><td width="20%">6 (nSRST)</td><td width="20%">PDI_CLK</td><td width="20%">Green</td><td width="20%">5</td></tr>
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<tr><td width="5%"></td><td width="20%">7 (N.C.)</td><td width="20%"></td><td width="20%">Yellow</td><td width="20%"></td></tr>
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<tr><td width="5%"></td><td width="20%">8 (nTRST)</td><td width="20%"></td><td width="20%">Orange</td><td width="20%"></td></tr>
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<tr><td width="5%"></td><td width="20%">9 (TDI)</td><td width="20%">PDI_DATA</td><td width="20%">Red</td><td width="20%">1</td></tr>
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<tr><td width="5%"></td><td width="20%">10 (GND)</td><td width="20%"></td><td width="20%">Brown</td><td width="20%"></td></tr>
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</table>
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</li><li>
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Problem: I want to use my AVR Dragon to program an
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Xmega device through PDI.
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<p>Solution: Use the 6 pin ISP header on the Dragon and the following pin mapping:
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</p>
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<table>
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<tr><td width="5%"></td><td width="20%"><strong>Dragon</strong></td><td width="30%"><strong>Target</strong></td></tr>
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<tr><td width="5%"></td><td width="20%"><strong>ISP Header</strong></td><td width="30%"><strong>pins</strong></td></tr>
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<tr><td width="5%"></td><td width="20%">1 (SDI)</td><td width="30%">PDI_DATA</td></tr>
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<tr><td width="5%"></td><td width="20%">2 (VCC)</td><td width="30%">VCC</td></tr>
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<tr><td width="5%"></td><td width="20%">3 (SCK)</td><td width="30%"></td></tr>
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<tr><td width="5%"></td><td width="20%">4 (SDO)</td><td width="30%"></td></tr>
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<tr><td width="5%"></td><td width="20%">5 (RESET)</td><td width="30%">PDI_CLK / RST</td></tr>
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<tr><td width="5%"></td><td width="20%">6 (GND)</td><td width="30%">GND</td></tr>
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</table>
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</li><li>
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Problem: I want to use my AVRISP mkII to program an
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ATtiny4/5/9/10 device through TPI. How to connect the pins?
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<p>Solution: Use the following pin mapping:
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</p>
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<table>
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<tr><td width="5%"></td><td width="20%"><strong>AVRISP</strong></td><td width="20%"><strong>Target</strong></td><td width="20%"><strong>ATtiny</strong></td></tr>
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<tr><td width="5%"></td><td width="20%"><strong>connector</strong></td><td width="20%"><strong>pins</strong></td><td width="20%"><strong>pin #</strong></td></tr>
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<tr><td width="5%"></td><td width="20%">1 (SDI)</td><td width="20%">TPIDATA</td><td width="20%">1</td></tr>
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<tr><td width="5%"></td><td width="20%">2 (VTref)</td><td width="20%">Vcc</td><td width="20%">5</td></tr>
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<tr><td width="5%"></td><td width="20%">3 (SCK)</td><td width="20%">TPICLK</td><td width="20%">3</td></tr>
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<tr><td width="5%"></td><td width="20%">4 (SDO)</td><td width="20%"></td><td width="20%"></td></tr>
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<tr><td width="5%"></td><td width="20%">5 (RESET)</td><td width="20%">/RESET</td><td width="20%">6</td></tr>
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<tr><td width="5%"></td><td width="20%">6 (GND)</td><td width="20%">GND</td><td width="20%">2</td></tr>
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</table>
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</li><li>
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Problem: I want to program an ATtiny4/5/9/10 device using a serial/parallel
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bitbang programmer. How to connect the pins?
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<p>Solution: Since TPI has only 1 pin for bi-directional data transfer, both
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<code>SDI</code> and <code>SDO</code> pins should be connected to the <code>TPIDATA</code> pin
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on the ATtiny device.
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However, a 1K resistor should be placed between the <code>SDO</code> and <code>TPIDATA</code>.
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The <code>SDI</code> pin connects to <code>TPIDATA</code> directly.
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The <code>SCK</code> pin is connected to <code>TPICLK</code>.
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</p>
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<p>In addition, the <code>Vcc</code>, <code>/RESET</code> and <code>GND</code> pins should
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be connected to their respective ports on the ATtiny device.
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</p>
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</li><li>
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Problem: How can I use a FTDI FT232R USB-to-Serial device for bitbang programming?
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<p>Solution: When connecting the FT232 directly to the pins of the target Atmel device,
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the polarity of the pins defined in the <code>programmer</code> definition should be
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inverted by prefixing a tilde. For example, the <code>dasa</code> programmer would
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look like this when connected via a FT232R device (notice the tildes in
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front of pins 7, 4, 3 and 8):
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</p>
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<table><tr><td> </td><td><pre class="example">programmer
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id = "dasa_ftdi";
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desc = "serial port banging, reset=rts sck=dtr sdo=txd sdi=cts";
|
|
type = serbb;
|
|
reset = ~7;
|
|
sck = ~4;
|
|
sdo = ~3;
|
|
sdi = ~8;
|
|
;
|
|
</pre></td></tr></table>
|
|
|
|
<p>Note that this uses the FT232 device as a normal serial port, not using the
|
|
FTDI drivers in the special bitbang mode.
|
|
</p>
|
|
</li><li>
|
|
Problem: My ATtiny4/5/9/10 reads out fine, but any attempt to program
|
|
it (through TPI) fails. Instead, the memory retains the old contents.
|
|
|
|
<p>Solution: Mind the limited programming supply voltage range of these
|
|
devices.
|
|
</p>
|
|
<p>In-circuit programming through TPI is only guaranteed by the datasheet
|
|
at Vcc = 5 V.
|
|
</p>
|
|
</li><li>
|
|
Problem: My ATxmega…A1/A2/A3 cannot be programmed through PDI with
|
|
my AVR Dragon. Programming through a JTAG ICE mkII works though, as does
|
|
programming through JTAG.
|
|
|
|
<p>Solution: None (may be a firmware issue of the AVR Dragon).
|
|
</p>
|
|
<p>It is said that the AVR Dragon can only program devices from the A4
|
|
Xmega sub-family.
|
|
</p>
|
|
</li><li>
|
|
Problem: after flashing a firmware that reduces the target’s clock
|
|
speed (e.g. through the <code>CLKPR</code> register), further ISP connection
|
|
attempts fail. Or a programmer cannot initialize communication with
|
|
a brand new chip.
|
|
|
|
<p>Solution: Even though ISP starts with pulling <code>/RESET</code> low, the
|
|
target continues to run at the internal clock speed either as defined by
|
|
the firmware running before or as set by the factory. Therefore, the
|
|
ISP clock speed must be reduced appropriately (to less than 1/4 of the
|
|
internal clock speed) using the -B option before the ISP initialization
|
|
sequence will succeed.
|
|
</p>
|
|
<p>As that slows down the entire subsequent ISP session, it might make
|
|
sense to just issue a <em>chip erase</em> using the slow ISP clock
|
|
(option ‘<samp>-e</samp>’), and then start a new session at higher speed.
|
|
Option ‘<samp>-D</samp>’ might be used there, to prevent another unneeded
|
|
erase cycle.
|
|
</p>
|
|
</li></ul>
|
|
|
|
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|
|
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|
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