From f90d99fcb2760e5d413d55471752a7fb8feaf8cb Mon Sep 17 00:00:00 2001 From: Zhihuan He Date: Mon, 5 Dec 2022 11:16:17 +0800 Subject: [PATCH] tool: ddrbin_tool: update to v1.13 20221205 build from: db59e31 tools: version v1.13 20221205 Signed-off-by: Zhihuan He Change-Id: I0efed772ccff77ba840e6440407fdd5d30324742 --- tools/ddrbin_tool | Bin 74070 -> 74070 bytes tools/ddrbin_tool_user_guide.txt | 20 ++++++++++++++++++-- 2 files changed, 18 insertions(+), 2 deletions(-) mode change 100644 => 100755 tools/ddrbin_tool_user_guide.txt diff --git a/tools/ddrbin_tool b/tools/ddrbin_tool index 6e8474fe5c322014f2fad4e331b567c4979c7fa7..fbf1678df96511ffd4b18c4b28f4b0095e1a816e 100755 GIT binary patch delta 1084 zcmYL|Z%k8H6u|Gj1z!0xBL8kHI@UPCmJL^|sUyq}O{SAY{F6+hA-W;0^ogyK&A6y> z&n0N)whxpeN{po32QnuJWn~j_;ZGN{MA49JAy{x9jLRg`Mfb_LEZ1}EBfJmqcYo)c zo_pSXuhWUN=|oz~RMy&VlDgJ*N0OuY<>pH(H+`u^xe1qPvT&z=WvuVtM|XNYNz1fv z3C=x!wmv=H&PoHUK)`6j3ig(O`wdlWrGS#4cez{mNcHLI>eIgtt1b`k3MuDLW)L#s z6L2u-Wo`jIK@VFeAQ>!WHKJAL>>~kA-OI3I3j!-n>6NTjz_|W~vUv>d7U0@9$o2^M zZQn)~Kx_Po9Tzauc*N0)dps@5HOMt$=Id4Ga{=0y=2b7Spgn<9| zAI_Um(L*Zwu8KYr&>U)IIVL#6TNN6^>zT`p4~7dpu&K?ic|DabydZX=gjT?8$7_%g zEx=WOTQA&*Zq8cm@>F;{t2`B6c(ro?raJ3thZ>}8#uJ#)rR+miwn;gO+%Y8OBP5JS znS+}jzb<7ta_@wcHAwd_QihOUBELmOkbTJCZ{hEefl2sUl(9D(;0Hvh4oOkM0%zbk z!XJlXvxFJfpbGKf2-G6-#^EU9`UIRuJf46N#JvefBFIg6ZkDC%H>G6pRb78)#-074 zw`mkk-YqqvT0PEbi%j|p+{J{@sOEJkANM;B5GpicBZNh&9f$XX7PW?N;8?qmUB~~) zMm4SCt=wOP+NF&xQ=M82p1T~q+wyjUk1j>OsNBGUPQ%eeXpi<)YLH6?uPem#cb3Nt z{z?J*C2bx*Fk58G&*yMKzqdRV=CgM6%UTtVYKuJig5Or#^=jEEA2yb%H$nSS)A3Cz zcSUF7(VA*=q;r-h;Ula2pbK{B2lOy2KJ+7Y?Amfotl`rYzV~`Xb~N8ADG?! z032~YTFxeZk)2EH$CRn8elX^cq017%gt>%FWQ*A(!m=zb(O+gcd(ZW@aFgEWKJW9~ z=Y7vPH=P_!nH)_CPuNPM$hbz>}7S#j`# zyC2ys54IhQA0=)dQ8^pl^CDT!*&ll<$P1h;_m?dz;9gYSHCf&D)1XY5y{8K?*I_|u zsFbt4{xVX)*=fIrtmSOV?5mftWy zc5wDf!v?YwSmRZ)kF#GJKXi6N&)Flr&`2W)9nL;qn~w&2I14njFOEv>*-6kIVuWs7 z4MOw-dXES(4*2dBA^rwD@tqKM=+<#v zh$6tys1O?g%Wnx01ndI*4Dc9WKj8E@ybl<>!@BzlNwJ>|^%ZJGkX};+aqAozo#fR; z7G+nFUA3ZRQ1Zbq_=OO8c? z5Yo_ASjKGX0)z5rY9invlyiO%;x>$(3{ZZ=2|WesH(}Xtf}GUJrep&*=ubh zWMhCT>_%t?43#iZGC)~ll@^eY4+5-XjKm64TgHSS@sil1w755B$8pz%;0oN!I_|l( zUbPmyN@Tol$*Nq0aIadHFZoEFvl-zpRiq$9BGt|VyMyy|BVA9yn^3FhKj}cZY2HHX zvVrRAjioXvtWgJ?2<|iaQH>7g0FO$pfq`qz7KCH!r^X;>HCmGe@+p&F(&(Zkz)!1l za8ycUqK;0(13qK&OCfq6b^xDMD_~S5^7vzVN4EP)O*icpR?{STT&ZCd~U diff --git a/tools/ddrbin_tool_user_guide.txt b/tools/ddrbin_tool_user_guide.txt old mode 100644 new mode 100755 index 5eb10300..e6994e68 --- a/tools/ddrbin_tool_user_guide.txt +++ b/tools/ddrbin_tool_user_guide.txt @@ -191,6 +191,9 @@ The 'X' as follows means not support change frequencies by tool. +---------------+-----------------------------------------------------------------+ | RK3588 | LP4/LP4x [306.5MHz - 2133MHz]; LP5: [400MHz - 2750MHz] | +---------------+-----------------------------------------------------------------+ +| RK3528 | DDR3/LP3: 324,396,528,630,780,920,1056 | +| | DDR4/LP4/LP4X: 324,396,528,630,780,920,1056,1184 | ++---------------+-----------------------------------------------------------------+ * DDR frequencies(add more) @@ -232,7 +235,7 @@ ddr_2t: ddr 2T timing mode. 1: enable ddr 2T, 0: disable ddr 2T. * PLL ssmod These parameters are about Spread Spectrum Modulator(ssmod) for PLL. -ssmod_downspread: ssmod work mode. 0: down spread, 1: center spread. +ssmod_downspread: ssmod work mode. 1: down spread, 0: center spread. ssmod_div: Divider required to set the modulation frequency. RK3308 suggests to ssmod_div=2, others platforms suggest to ssmod_div=5. ssmod_spread: spread amplitude % = 0.1 * ssmod_spread; 0: disable ssmod, others will enable ssmod, max to 0x1f. @@ -267,6 +270,13 @@ The phy side driver strength support value as follows: | RK3588 | X | X | X | 240,120,80,60, | follow LP4 | follow LP4 | follow LP4 | | | | | | 48,40,34,30 | | | | +---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+-------------+ +| | 572,289,195,145, | 595,300,202,151, | | 654,328,221,165,| 585,297,202, | 585,297,202, | | +| | 117,99,85,73,66, | 122,102,89,76,68, | |133,112,97,83,74,| 150,122,103,90,| 150,122,103,90,| | +| RK3528 | 60,55,50,47,44,41,| 62,57,52,49,45,43,| follow DDR4 | 67,62,57,53,49, | 77,69,63,58,53,| 77,69,63,58,53,| X | +| | 38,36,34,33,31,30,| 39,37,35,34,32,31,| | 46,43,40,38,37, | 50,47,44,40,38,| 50,47,44,40,38,| | +| | 29,28 | 30,29 | | 35,33,32,31 | 37,35,33,32,31,| 37,35,33,32,31,| | +| | | | | | 30 | 30 | | ++---------------+-------------------+-------------------+--------------+-----------------+----------------+----------------+-------------+ The DRAM side driver strength support value as follows: +---------------+-------------------+-------------------+----------------+----------------------+----------------+-------------+ @@ -304,7 +314,13 @@ The ODT "0" means disabled ODT. | RK3588 | X | X | X | 0,240,120,80, | follow LP4 | follow LP4 | follow LP4 | | | | | | 60,48,40,34,30 | | | | +---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+-------------+ - +| | 572,289,195,145, | 595,300,202,151, | | 654,328,221,165, | 585,297,202, | 585,297,202, | | +| | 117,99,85,73,66, | 122,102,89,76,68, | |133,112,97,83,74, | 150,122,103,90,| 150,122,103,90,| | +| RK3528 | 60,55,50,47,44,41,| 62,57,52,49,45,43, | follow DDR4 | 67,62,57,53,49, | 77,69,63,58,53,| 77,69,63,58,53,| X | +| | 38,36,34,33,31,30,| 39,37,35,34,32,31, | | 46,43,40,38,37, | 50,47,44,40,38,| 50,47,44,40,38,| | +| | 29,28 | 30,29 | | 35,33,32,31 | 37,35,33,32,31,| 37,35,33,32,31,| | +| | | | | | 30 | 30 | | ++---------------+-------------------+--------------------+--------------+-------------------+----------------+----------------+-------------+ The DRAM side ODT support value as follows: +---------------+-------------------+-------------------+--------------+-----------------------+----------------+---------------+ | platform | DDR3 | DDR4 | LP3 | LP4(include DQ and CA)| LP4X | LP5 |