build from:
2d653b3476 rk356x: ddr: update ddrbin to v1.21
build command:
./make.sh rk3568
update feature:
1. Fixed issue that CA training may be missed during reboot.
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I0db741443e2af91ce760596f8a7cae5ce13eb24c
build from:
77170a5e90 rk356x: ddr: en lp4/4x rx odt when freq greater than 600MHz
build command:
./make.sh rk3568
update feature:
1. When DDR ECC is enabled, ensure the correctness of the
ECC of the pstore segment memory after restarting.
2. Update DDR3/LPDDR3 rd/wr training pattern to improve
read and write signal margin.
3. Fixed 6GB LPDDR3/4 initialization failure problem.
4. LPDDR4/4X enable 780MHz read odt。
5. Eanble read/write vref training to improve
compatibility.(can be disable using ddrbin_tool).
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I1ef3ac7528106b937da236529d1a2f26041b5ce0
Build from:
e4e124926e rockchip: spl: Fix fwver prefix
Build command:
./make.sh rk3568 --spl-new --spl-fwver v1.13
Update features:
1. Print and pass the firmware version number.
2. Solve the issue that the backup image is not loaded when
the SPL load or check u-boot.dtb fails.
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
Change-Id: I6c79621136c84f927a8ab6b58eb59429e4a9eb8a
build from:
992b933606 rk3568: ddr: update ddr bin to v1.17
build command:
./make.sh rk3568
update feature:
1. Added support for 4rank LPDDR3/LPDDR4/LPDDR4x of different rows.
2. Add DDR ECC poison function support.
3. Enable derate function for LPDDR4/LPDDR4x.
4. Add pstore support when ECC enabled.
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Ibf34399532706153d98ee3b2f56cde4ca83e8e91
from commit:
0661d5 platfrom: rk3568: Update to v1.17
update feature:
Support new spiflash and fix commit(b90bc43 rk3568: usbplug:
revert to the former version v1.16)
Change-Id: Ieeea864f30436e6f03c0f7f2ef02e2b1829f1f8d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
ec2fae0c96 rk356x: ddr: update ddr bin to v1.15
update feature:
4023ab4e29 rk3568: ddr: use upctl control dfi_init_start/complete
f254ec2b5d rk356x: Add adjust the hold timing of the digital to
analog interface
a14b1383ca drivers: rk356x: Add automatic temperature derating
for LPDDR4(X)
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I732fe0346555a002a3bdd6b987260a2fb3dbab1f
from commit:
eaaeb1: rk356x: mmc: add ffu for FEMDNN064G_A3A44
update feature:
Support new spiflash
Change-Id: Ie3cc0509c8fdc802e994fc7166a092a90b1c0794
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
from commit:
65048d1 platform: rk3568: Update to v1.15
update feature:
Support new spiflash
Change-Id: I4fbcdb5c5b619f47c5600f2b2332fcbcdbb79d78
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
69b359 src: spinand: support GD5F2GM7xxG
update feature:
support new spiflash
Change-Id: I6d31582ff7b1f07106ed594c9999d918ca2051ba
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
rk_boot_all c9221db src: spinand: support GD5FxGQ5REYIG
new feature:
support new spiflash
Change-Id: I0b54b8d60548b249b214081322ad32ea0cce3754
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
rk_boot_all f817b47 src: slc_nand: support S34ML08G3
build feature:
support new flash devices
Change-Id: I8a8e9987e93ef91d24fc9902f6c196a3439d65e6
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
d66fc41e9c rk356x: ddr: update ddr bin to v1.09
build command:
./make.sh rk3568
update feature:
74bdef59fd rk356x: ddr: add 3568s/m/j/b2 support
3220a096ba rk356x: ddr: adjust print info
7dc3ec451a rk356x: ddr: fix reg_*_*_rxen_lp4 bug
b16ddd2a97 rk356x: ddr: allow user program otp in the user area
de4ccf565f rk356x: ddr: fix lpddr4/4x WDQS bug
dd0befbb88 rk356x: ddr: disable cs1/cs3 ca odt
f8c5ebd50e rk356x: ddr: add lpddr4 byte mode support
18225d611d rk356x: ddr: modify trfc base on real capacity
7e7f62e1e7 rk356x: ddr: auto detect 4 ch lpddr4/4x.
db9aecc5ae rk356x: ddr: add more ddrconf support move to highest 256MB
5ee3419e72 rk356x: ddr: only support 4GB map to high 8GB-256MB
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Ifc726aaf94150b9ce2841eb71ff388c7642a5e50
from commit: 98d5681 src: slc_flash: Support S34ML08G2
Change-Id: Ib95aa44b04c1a8ce1927a9bab10b04dbfb734a22
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
from commit: b651e66 src: spinand: Support new devices
Change-Id: I089c9ad80fa357612fa42fd7e23f50fd818c997f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
c613b7e: drm/rockchip: dw-hdmi: Fixe the condition for EDID read failure
build command:
./make.sh rk3568
update features:
1.fix mmc read error if not reset mmc dll in system reboot test
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I6a68439879f5abae2c3a0ee66b2f61d117600579
build form rk_boot_all commit:
75259ded5: rk3568: enable emmc compatibility check
update feature:
Some EMMC devices will have compatibility problems on rk3568.
This patch can automatically detect these devices and report
errors when upgrading firmware.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I1d50cb94f721e6f2c8bbba5df836ad6ff4997a42
build from:
abfd1c5e: rockchip: support assign kernel dtb name which is build-in
build command:
./make.sh rk3568
update features:
1.get kernel fdt from index 1 of "fdt" property
2.not allow load fit image fail
3.correct some mmc device logs
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I0d0ba6be8631b250a02b7945c81dc0331d1a1f15
from commit: 681cb7
src: slc_flash: Support F59L4G81KAR1AM
Change-Id: I0ec9028ade0e4ed0db6833b6b4d30a5e09d61699
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
f9f1f1 src: spinor: IDB aligned to 128KB for RK_NEW_IDB
update feature:
spinor: IDB aligned to 128KB for RK_NEW_IDB
Change-Id: I9abbd18c04081ef81559d7f4bf9a9945b6d5a8e4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
print info:
DDR Version V1.03 20201224
build from u-boot-ddr:
434fcab38a rk356x: ddr: ddr bin version update to v1.03 20201224
build command:
./make.sh rk3568
update feature:
ad78184260 rk356x: ddr: disable ca odt when freq smaller than 800
498c940405 rk356x: ddr: gating training logic for power saving
f1e7e8286d rk356x: ddr: fix phy 2 cs cmd switch bug
cd72792efa rk356x: ddr: msch div follow with ddr freq
3d038f9428 rk356x: ddr: fix some ddr bug
01d47d2a87 rk356x: ddr: ddr_freq match DPLL setting
30a7d012c0 rk356x: ddr: add cs2_3_ca_skew in rk3568_fsp_param
56dd70be24 rk356x: ddr: lp4x use lp4 inc file to reduce code size
7e665ae1e3 rk356x: ddr: fix bug of pucal set
e15c349125 rk356x: ddr: set diff cs rd/wr gap to 2
11d6a8467e rk356x: ddr: fix auto low power bug and en auto low power
41385de8e5 rk356x: ddr: adjust drv/odt info
400a568e95 rk356x: ddr: optimizing and fix some code bug
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I02774dfb739615f3e4653fb2638569037779bc27
build from:
c8dcae6 Do not undef emmc when wo_ftl enable
update feature:
Enable emmc
Change-Id: I3b67920c2d7873b9993bfb2ae8f77e4be1ae7b0e
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
d5c3b6a support usb phy reset funcion
update feature:
Support SPI flash.
Change-Id: Ibb5529521c72ca8ec085be06aefa454466d4a7ef
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
build from:
186b00109f rockchip: rk3568: place U-Boot at 10MB offset
build command:
./make.sh rk3568
update feature:
Support get U-Boot entry address by fit header info
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I6ee4143dd9469ba100ba328c0e34cbbcb0032d73
