21 Commits

Author SHA1 Message Date
Jon Lin
ab9d4193ae rv1106: usbplug: Update to v1.09
from commit:
	20b8d8f8d src: spinand: Support new device W25N01JWZEIG
update feature:
	Support new SPI Flash

Change-Id: I458b0639a299722ffa3b69522b80248717f9f2ff
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2024-02-06 17:38:13 +08:00
Wesley Yao
cdb538868d rv1106: ddr: Update to v1.15 20231221
Build from:
	306b9977f5 dram_init: rv1106: Upadate to v1.15

Update features:
	cf081b2cc5 dram_init: timer: Initialize hptimer as soft adjust mode in RV1106
	fefaf6ae79 rv1106: ddr: Do not reinit hp_timer in resume_flow
	617232e4e1 drivers: ram: rv1106: Change PVTPLL length to 7
	43bdca99ff dram_init: Add BROM_BOOTSOURCE_IS_DOWNLOAD macro
	58e29ce5b4 drivers: ram: rv1106: Fix maskrom bug
	204a8810e6 drivers: ram: rockchip: remove DDR2/DDR3 Die bus-width log

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ie4ffc308cfdaf890c3f78c54b0f111a74ee7bd1f
2023-12-21 11:32:00 +08:00
Wesley Yao
b4a5167bb5 rv1106: ddr: Update DDR bin to v1.14 20231024
Build from:
	1df264c461 dram_init: rv1106: Change CFG_VERSION from V1.14 to v1.14

Update features:
	60cd8a05aa dram_init: rv1106: Upadate to v1.14
	a33ae16d09 drivers: ram: rv1106: Adjust SI info of BGA DDR3
	cef2fb4a30 drivers: ram: rv1106: Raise vref_out when wr trn of BGA DDR3
	1db2fd720d drivers: ram: rv1106: Adjust SI info of DDR4
	b58f8e70ca drivers: ram: rv1106: Add fwver support

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ic814c33de3a39f9c1c62ed4dc946a7cdfea4dac9
2023-10-24 19:10:27 +08:00
Jon Lin
6d00a9d2f9 rv1106: usbplug: Update to v1.08
from commit:
	I0043a8b1 Revert "src: spinand: Support 4KB page for new IDB"
update feature:
	Revert "src: spinand: Support 4KB page for new IDB"

Change-Id: I27b89a31d60f85303bfc53bb2852d18fe78170db
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2023-10-10 15:32:03 +08:00
Wesley Yao
431b866369 rv1106: ddr: Update DDR bin to v1.13 20230710
Build from:
	37a6671fc7 dram_init: rv1106: Update to v1.13

Update feature:
	be7129d2d5 drivers: ram: rv1106: Support resume

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ib26434a5149e9a992d80203b5d9350a9835c2875
2023-07-11 16:36:58 +08:00
Wesley Yao
10d78d1de2 rv1106: ddr: Update DDR bin to v1.12 20230531
Build from:
	6cf9a2f250 dram_init: rv1106: Update to v1.12

Update feature:
	dd6f7dc7c6 drivers: ram: rv1106: Fast exit (DLL on) for power down on DDR3
	76b28dbce9 drivers: ram: rv1106: Support modify refresh rate in loader_params
	ed9d2f002f drivers: ram: rv1106: Fix calc of cs_pst
	5af756bb61 drivers: ram: rv1106: Add print when distinguishing DDR2 from DDR3

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I87dd6ceb87479c5827c2957fa057e5b4b8afd359
2023-05-31 16:04:32 +08:00
Jon Lin
5714bb7f95 rv1106: usbplug: Update to v1.07
from commit:
	I6b73e5e src: spinand: Fix unnecessary QE for S35ML0xG3
update feature:
	Support new spiflash.

Change-Id: Ic9a96bcf98ebe00951370fcacb28bd95eccf06ee
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2023-03-29 17:34:22 +08:00
Wesley Yao
b957c293eb rv1106: ddr: Update DDR bin to v1.11 20230328
Build from:
	285bced5c1 dram_init: rv1106: Update to v1.11

Update feature:
	7c3a0782c9 drivers: ram: rv1106: Strengthen clk drv of QFN DDR3

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I22a1e128fb4ef8a0effd2049f728a2ae28014aa2
2023-03-28 16:06:23 +08:00
Ziyuan Xu
cf843a06d0 rv1106: enable thunderboot feature for eMMC_TB scene
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I940b17b3f83c3ebcaedc2f404deb0ec810165853
2022-12-06 18:20:13 +08:00
Wesley Yao
5fbf4949b1 rv1106: ddr: Update DDR bin to v1.10 20221115
Build from:
	ec2fae0c96 rk356x: ddr: update ddr bin to v1.15

Update feature:
	25f78a9a5d drivers: ram: rv1106: Initial version v1.10 20221108
	1. Set reg_fb1xclk_invdelaysel_dqcmd to 0x15 except DDR2
	2. Simplify print
	3. Set DPLL Fvco_max of BGA to 3800MHz
	4. Config sw_done to change INIT7 in set_ds_odt()
	5. Use bitflip pattern to do write tain
	6. Keep CLK skew = 0x80, and adjust DQS Tx skew according to wrlvl
	7. Update DDR4 dram vref by A7 of MR6
	8. Fix value of SCHED
	9. Fix value of RANKCTL

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I6d4a71228636c7ff56d336ca138b071706363ed8
2022-11-15 15:30:11 +08:00
Weiwen Chen
9ab44c2761 rv1106: usbplug: fix other ini version to v1.06
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: Ie6e27f865217f67b75fd8a458d7033b0b5423120
2022-08-15 16:53:34 +08:00
Jon Lin
373334e6d1 rv1106: usbplug: Update to v1.05 part 2
Update ini file.

Change-Id: If0a34b890a694d417899738b81e7aae3836a7745
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2022-07-21 13:59:30 +08:00
Jon Lin
16bb94b2b7 rv1106: usbplug: Update to v1.04
from commit:
	rk_boot_all: 7eadab
update feature:
	src: spinor: Support GD25LQ128

Change-Id: Ic83227375bb969a23d490a27c66830741483fd79
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2022-07-11 15:40:58 +08:00
Wesley Yao
35c3e2e438 rv1106: ddr: Update DDR bin to v1.09 20220630
Build from:
	9e9c51a040 drivers: ram: rv1106: Initial version v1.09 20220630
	(https://10.10.10.29/c/rk/ubd/+/145841/47)

Update feature:
	1. Fix atag, which may affect boot
	2. Skip update_dqs_rx_phase() when master DLL lock is timeout
	3. Run exit code after train timeout instead of return
	4. Dis auto ZQ of dram in ddr_set_rate()

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I4f36d98ea0b935710001a96cfa7cc48223bbfd73
2022-06-30 16:17:58 +08:00
Su Yuefu
31e6e27537 rv1106: bin: update hpmcu tb bin to v1.01
build from rt-thread commit in develop branch:
    2033558: [BSP] Rockchip: sc230ai add 25fps config

update feature:
    baee2bf: [BSP] Rockchip: awb : apply wbgain in awbgain0 module
    8018479: [BSP] Rockchip: fastae: release fastae 2.1.3 version
    2820f81: [BSP] Rockchip: fastae: move read_adc to fast_ae.c
    a35b55a: [BSP] Rockchip: rv1106-mcu: fix bug when patch merge
    2033558: [BSP] Rockchip: sc230ai add 25fps config

Signed-off-by: Su Yuefu <yuefu.su@rock-chips.com>
Change-Id: Ia0f7a988e58ac9845002414ff5f7e62e5dd01e92
2022-06-27 09:19:26 +08:00
Wesley Yao
aa706f909c rv1106: ddr: Update DDR bin to v1.08 20220531
Build from:
	2ac734343a drivers: ram: rv1106: Initial version v1.08 20220531
	(https://10.10.10.29/c/rk/ubd/+/145841/45)

Updat feature:
	1. Reduce drv of QFN DDR3
	2. Enable PD dfi_lp
	3. Change sr/pd idle (20/13 -> 5/1)

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Icac2cff34a276096adcc0713c924b5759a597283
2022-05-31 11:17:29 +08:00
Wesley Yao
89d11b7390 rv1106: ddr: Update DDR bin to v1.07 20220523
Build from:
	c483db9fb8 drivers: ram: rv1106: Initial version v1.07 20220523
	(https://10.10.10.29/c/rk/ubd/+/145841/43)

Update feature:
	1. Reduce drv of QFN DDR2
	2. Change 780MHz to 792MHz
	3. Improve calc of tRP
	4. Delete unsupported freq (1056)

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I331f29ff21c7db5a5caf10ab9b9d4f900885a98d
2022-05-24 18:18:44 +08:00
Jason Zhu
d5bc39c390 rv1106: hpmcu: pack mcu_wrap firmware for tb
hpmcu firmware naming rule:
rv1106_hpmcu_tb_vxxx.bin	- thunderboot
rv1106_hpmcu_wrap_vxxx.bin	- mcu wrap

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I8acbffef585045701901699a23c0221dcb793cd6
2022-05-24 17:10:01 +08:00
Wesley Yao
fa338c408c rv1106: ddr: Update DDR bin to v1.06 20220509
Build from:
	5dc6490a60 drivers: ram: rv1106: Initial version v1.06 20220509
	(https://10.10.10.29/c/rk/ubd/+/145841/42)

Update feature:
	1. Set defalut pack to QFN
	2. Add 528MHz of DDR3 (Config 528MHz with ddrbin_tool)
	3. Do not print warning when read eye trn flag is high, because
it is easy to happen at low freq

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I40ada0a143b7b0b561fcc88f0c24f88ec7b29b52
2022-05-11 09:45:03 +08:00
Wesley Yao
814f23f5e9 rv1106: ddr: Update DDR bin to v1.05 20220425
Build from u-boot-ddr:
	drivers: ram: rv1106: Initial version v1.05 20220425
	(https://10.10.10.29/c/rk/u-boot-ddr/+/145841/41)

Update feature:
	1. Read OTP to get pack
	2. Adjust NOC ReadLatency of DDR3 924MHz & 1056MHz
	3. Delete 324MHz & 396MHz of DDR2
	4. Enable PVTPLL
	5. Config DDR_GRF_CON1&2 for power consumption
	6. QFN gets SI info from MACRO, BGA gets SI info from
loader_params.inc
	7. Set reg_train_2t_mode, and fix reg_cmd_2t_mode to 0x7fffff
	8. Exit read gate if detect error flag
	9. Fix set of t_xs_x32, t_xs_abort_x32 and t_xs_fast_x32
	10. wait_phy_pll_lock in ddr_set_rate()
	11. Decrease delay between rkclk_ddr_reset(dram, 1, 1, 1, 1) and
rkclk_ddr_reset(dram, 1, 1, 1, 0)
	12. Call dram_all_config and enable_low_power in post_init
	13. Add delay when detect row

Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ic125bf2081c01aafdd6ef473c9b2145d41337a66
2022-04-25 09:42:33 +08:00
Jason Zhu
1b5b427dfd rv1106: support thunderboot
Build from commit:
 - hpmcu: a4b58c7 [BSP] rv1106-mcu: move execution address to 0x40000
 - spl: 4bc827 Revert "rockchip: rv1106: select CONFIG_ARM_ZERO_CNTVOFF"

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I7d353d20f6e7261a12392215f07e72ab5b4ecc54
2022-04-22 14:33:50 +08:00