Files
rkbin/bin
XiaoDong Huang 1f87e1f4cf rk3588: bl31: update version to v1.29
Build from ATF commit:
    686b5c48b plat: rk3588: sleep: disable gpio 1/3 int if mcu_wakup
update feature:
    686b5c48b plat: rk3588: sleep: disable gpio 1/3 int if mcu_wakup
    af5ab70fc plat: rockchip: set "plat_uart_base=0" if uart disable
    3eb5ebec2 plat: rockchip: uart: wait no busy before restore
    6d4252c24 plat: rk3588: secure: only support ddr-4ch,stride-en by default
    dc491ee36 plat: rk3588: secure: support config for different ddr-channel number
    304673533 plat: rk3588: sleep: support different ddr-channel number
    0f4f44e43 plat: rk3588: ddr: add some ddr-channel related functions
    9dbfb40af plat: rk3588: secure: simplify secure_region_init function
    a7e0c6c06 plat: rk3588: secure: config dsu_mp_sec can access all ddr-regions
    988ba1e81 plat: rk3588: move secure related code to secure.c
    dee611ca6 plat: rockchip: rk3588: dmc: get LPDDR5 mr16 value from fsp_param
    73824e139 plat: rockchip: rk3588: dmc: add support M0_PARAM_INT_VOP
    f175a33cf plat: rockchip: rk3588: dmc: force reset if the ddr_m0 is on the halt
    a9e5261be plat: rockchip: rk3588: dmc: add bits mask for low power config
    8b4543970 plat: rk3588: enable ERRATA_A55_1530923

Change-Id: I041acae523c3b2dba7eb1677411f32d4f1aadba5
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
2022-09-29 16:08:30 +08:00
..
2022-09-24 10:37:02 +08:00
2022-09-16 17:50:33 +08:00