CanYang He
c02d94aba0
rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.08
built from ddr init project commit:
79d5673 version: DDR Version 1.08 20190523
update feature:
b5065df rk3288: ddr: enable 2T mode
f92a1c0 rk3288: ddr: support bus-width=16bit with row=16
88fab8f rk32: ddr: fix bug of idle port fail
579f3c0 rk32: ddr: fix wrong uart base address for atags
Change-Id: I23791bb0a58bdbb718bd77d62b383eea91418e1d
Signed-off-by: CanYang He <hcy@rock-chips.com>
2019-05-23 18:34:05 +08:00
..
2019-05-23 10:45:59 +08:00
2019-05-23 14:19:51 +08:00
2019-05-23 18:34:05 +08:00
2019-05-23 10:45:59 +08:00
2019-01-29 16:36:22 +08:00