built from ddr init project commit:
49df872 version: DDR Version 1.05 20170712
update feature:
1) fix customer DDR3 3GB with
channel a: col=10, row=16, cs=1, size = 2048MB
channel b: col=10, row=15, cs=1, size = 1024MB
2) support all 3GB and 1.5GB setting with DDR3
512Mx16bit and LPDDR3 single die with 8Gb case.
these rarely type of die was not consider before.
Change-Id: Ibdb5d758cc622a72672faff7069bd5efa85ce2e4
Signed-off-by: Hecanyang <hcy@rock-chips.com>
dfe94b5140