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Merge git://www.denx.de/git/u-boot into uboot

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This commit is contained in:
Gerald Van Baren
2008-03-21 11:58:22 -04:00
parent 11abe45c48 81a0ac62ea
commit 01026a6e61
62 changed files with 1170 additions and 63 deletions
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1
include/asm-arm/global_data.h
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@@ -60,6 +60,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r8")

1
include/asm-avr32/global_data.h
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@@ -51,6 +51,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm("r5")

1
include/asm-blackfin/global_data.h
View File

@@ -61,6 +61,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register gd_t * volatile gd asm ("P5")

1
include/asm-i386/global_data.h
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@@ -54,6 +54,7 @@ typedef struct {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
extern gd_t *global_data;

1
include/asm-m68k/global_data.h
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@@ -68,6 +68,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#if 0
extern gd_t *global_data;

1
include/asm-microblaze/global_data.h
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@@ -52,6 +52,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r31")

1
include/asm-mips/global_data.h
View File

@@ -54,6 +54,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("k0")

1
include/asm-nios/global_data.h
View File

@@ -45,6 +45,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("%g7")

1
include/asm-nios2/global_data.h
View File

@@ -44,6 +44,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r15")

1
include/asm-ppc/global_data.h
View File

@@ -164,6 +164,7 @@ typedef struct global_data {
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#if 1
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")

1
include/asm-sh/global_data.h
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@@ -44,6 +44,7 @@ typedef struct global_data
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r13")

96
include/configs/lwmon5.h
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@@ -36,6 +36,7 @@
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_BOARD_POSTCLK_INIT 1 /* Call board_postclk_init */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
#define CONFIG_BOARD_RESET 1 /* Call board_reset */
/*-----------------------------------------------------------------------
* Base addresses -- Note these are effective addresses where the
@@ -86,6 +87,15 @@
#define CFG_POST_ALT_WORD_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP6)
/* unused GPT0 COMP reg */
/* Additional registers for watchdog timer post test */
#define CFG_DSPIC_TEST_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5)
#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP4)
#define CFG_WATCHDOG_FLAGS_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5)
#define CFG_WATCHDOG_MAGIC 0x12480000
#define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000
#define CFG_DSPIC_TEST_MASK 0x00000001
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
@@ -156,10 +166,86 @@
CFG_POST_MEMORY | \
CFG_POST_RTC | \
CFG_POST_SPR | \
CFG_POST_UART)
CFG_POST_UART | \
CFG_POST_SYSMON | \
CFG_POST_WATCHDOG | \
CFG_POST_DSP | \
CFG_POST_BSPEC1 | \
CFG_POST_BSPEC2 | \
CFG_POST_BSPEC3 | \
CFG_POST_BSPEC4 | \
CFG_POST_BSPEC5)
#define CONFIG_POST_WATCHDOG {\
"Watchdog timer test", \
"watchdog", \
"This test checks the watchdog timer.", \
POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT, \
&lwmon5_watchdog_post_test, \
NULL, \
NULL, \
CFG_POST_WATCHDOG \
}
#define CONFIG_POST_BSPEC1 {\
"dsPIC init test", \
"dspic_init", \
"This test returns result of dsPIC READY test run earlier.", \
POST_RAM | POST_ALWAYS, \
&dspic_init_post_test, \
NULL, \
NULL, \
CFG_POST_BSPEC1 \
}
#define CONFIG_POST_BSPEC2 {\
"dsPIC test", \
"dspic", \
"This test gets result of dsPIC POST and dsPIC version.", \
POST_RAM | POST_ALWAYS, \
&dspic_post_test, \
NULL, \
NULL, \
CFG_POST_BSPEC2 \
}
#define CONFIG_POST_BSPEC3 {\
"FPGA test", \
"fpga", \
"This test checks FPGA registers and memory.", \
POST_RAM | POST_ALWAYS, \
&fpga_post_test, \
NULL, \
NULL, \
CFG_POST_BSPEC3 \
}
#define CONFIG_POST_BSPEC4 {\
"GDC test", \
"gdc", \
"This test checks GDC registers and memory.", \
POST_RAM | POST_ALWAYS, \
&gdc_post_test, \
NULL, \
NULL, \
CFG_POST_BSPEC4 \
}
#define CONFIG_POST_BSPEC5 {\
"SYSMON1 test", \
"sysmon1", \
"This test checks GPIO_62_EPX pin indicating power failure.", \
POST_RAM | POST_MANUAL | POST_NORMAL | POST_SLOWTEST, \
&sysmon1_post_test, \
NULL, \
NULL, \
CFG_POST_BSPEC5 \
}
#define CFG_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */
#define CONFIG_LOGBUFFER
#define CONFIG_ALT_LH_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP1)
#define CONFIG_ALT_LB_ADDR (CFG_OCM_BASE)
#define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
/*-----------------------------------------------------------------------
@@ -181,6 +267,7 @@
#define CONFIG_RTC_PCF8563 1 /* enable Philips PCF8563 RTC */
#define CFG_I2C_RTC_ADDR 0x51 /* Philips PCF8563 RTC address */
#define CFG_I2C_KEYBD_ADDR 0x56 /* PIC LWE keyboard */
#define CFG_I2C_DSPIC_IO_ADDR 0x57 /* PIC I/O addr */
#define CONFIG_POST_KEY_MAGIC "3C+3E" /* press F3 + F5 keys to force POST */
#if 0
@@ -366,9 +453,6 @@
#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
#define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
/*
* ToDo: Watchdog is not test fully, so exclude it for now
*/
#define CONFIG_HW_WATCHDOG 1 /* Use external HW-Watchdog */
#define CONFIG_WD_PERIOD 40000 /* in usec */
@@ -431,10 +515,14 @@
#define CFG_GPIO_PHY1_RST 12
#define CFG_GPIO_FLASH_WP 14
#define CFG_GPIO_PHY0_RST 22
#define CFG_GPIO_DSPIC_READY 51
#define CFG_GPIO_EEPROM_EXT_WP 55
#define CFG_GPIO_HIGHSIDE 56
#define CFG_GPIO_EEPROM_INT_WP 57
#define CFG_GPIO_BOARD_RESET 58
#define CFG_GPIO_LIME_S 59
#define CFG_GPIO_LIME_RST 60
#define CFG_GPIO_SYSMON_STATUS 62
#define CFG_GPIO_WATCHDOG 63
/*-----------------------------------------------------------------------

9
include/post.h
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@@ -42,12 +42,16 @@
#define POST_REBOOT 0x0800 /* test may cause rebooting */
#define POST_PREREL 0x1000 /* test runs before relocation */
#define POST_CRITICAL 0x2000 /* Use failbootcmd if test failed */
#define POST_MEM (POST_RAM | POST_ROM)
#define POST_ALWAYS (POST_NORMAL | \
POST_SLOWTEST | \
POST_MANUAL | \
POST_POWERON )
#define POST_FAIL_SAVE 0x80
#ifndef __ASSEMBLY__
struct post_test {
@@ -93,6 +97,11 @@ extern int post_hotkeys_pressed(void);
#define CFG_POST_CODEC 0x00002000
#define CFG_POST_FPU 0x00004000
#define CFG_POST_ECC 0x00008000
#define CFG_POST_BSPEC1 0x00010000
#define CFG_POST_BSPEC2 0x00020000
#define CFG_POST_BSPEC3 0x00040000
#define CFG_POST_BSPEC4 0x00080000
#define CFG_POST_BSPEC5 0x00100000
#endif /* CONFIG_POST */

5
include/ppc440.h
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@@ -1431,6 +1431,11 @@
#define SDR0_MFR_PKT_REJ_POL 0x00200000 /* Packet Reject Polarity */
#define GPT0_COMP6 0x00000098
#define GPT0_COMP5 0x00000094
#define GPT0_COMP4 0x00000090
#define GPT0_COMP3 0x0000008C
#define GPT0_COMP2 0x00000088
#define GPT0_COMP1 0x00000084
#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
#define SDR0_USB2D0CR 0x0320

2
include/rtc.h
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@@ -52,7 +52,7 @@ struct rtc_time {
int tm_isdst;
};
void rtc_get (struct rtc_time *);
int rtc_get (struct rtc_time *);
void rtc_set (struct rtc_time *);
void rtc_reset (void);