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powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb

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Using DDR as RAMBOOT base instead of L2SRAM for SDCard and SPI Flash
boot loaders because:
- P1_P2_RDB boards have soldered DDR so no need for SPD
- Also P102x has 256K L2 cache size so becomes a limiting factor for
  size of image that could be loaded in SRAM mode and would require three
  stage boot loader (TPL).

Changes done:
 1. CONFIG_SYS_TEXT_BASE to 0x11000000
 2. CONFIG_RESET_VECTOR_ADDRESS to 0x1107fffc

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Priyanka Jain
2011-02-08 13:13:15 +05:30
committed by Kumar Gala
parent f098c9c880
commit 0c871e952e
3 changed files with 19 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
include/configs/P1_P2_RDB.h
View File

@@ -57,14 +57,14 @@
#ifdef CONFIG_SDCARD
#define CONFIG_RAMBOOT_SDCARD 1
#define CONFIG_SYS_TEXT_BASE 0xf8f80000
#define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc
#define CONFIG_SYS_TEXT_BASE 0x11000000
#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc
#endif
#ifdef CONFIG_SPIFLASH
#define CONFIG_RAMBOOT_SPIFLASH 1
#define CONFIG_SYS_TEXT_BASE 0xf8f80000
#define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc
#define CONFIG_SYS_TEXT_BASE 0x11000000
#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc
#endif
#ifndef CONFIG_SYS_TEXT_BASE