mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2026-06-13 15:03:58 +03:00
imx95_evk: add i.MX95 19x19 EVK board basic support
This patch adds i.MX95 19x19 EVK board basic support. Messaging unit for EdgeLock Secure Enclave, messaging unit for System Manager, uSDHC for SD Card, gpio, lpuart are supported now. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
62
arch/arm/dts/imx95-19x19-evk-u-boot.dtsi
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62
arch/arm/dts/imx95-19x19-evk-u-boot.dtsi
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@@ -0,0 +1,62 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2025 NXP
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*/
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#include "imx95-u-boot.dtsi"
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&lpuart1 {
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bootph-pre-ram;
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};
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®_usdhc2_vmmc {
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bootph-pre-ram;
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};
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&usdhc1 {
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bootph-pre-ram;
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};
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&usdhc2 {
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bootph-pre-ram;
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};
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&wdog3 {
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status = "disabled";
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};
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&pinctrl_uart1 {
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bootph-pre-ram;
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};
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&pinctrl_usdhc1 {
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bootph-pre-ram;
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};
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&pinctrl_usdhc1_100mhz {
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bootph-pre-ram;
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};
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&pinctrl_usdhc1_200mhz {
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bootph-pre-ram;
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};
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&pinctrl_usdhc2 {
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bootph-pre-ram;
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};
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&pinctrl_usdhc2_100mhz {
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bootph-pre-ram;
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};
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&pinctrl_usdhc2_200mhz {
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bootph-pre-ram;
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};
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&pinctrl_usdhc2_gpio {
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bootph-pre-ram;
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};
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&pinctrl_reg_usdhc2_vmmc {
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bootph-pre-ram;
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};
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188
arch/arm/dts/imx95-u-boot.dtsi
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188
arch/arm/dts/imx95-u-boot.dtsi
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@@ -0,0 +1,188 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2025 NXP
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*/
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/ {
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binman {
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multiple-images;
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m33-oei-ddrfw {
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pad-byte = <0x00>;
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align-size = <0x8>;
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filename = "m33-oei-ddrfw.bin";
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oei-m33-ddr {
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align-size = <0x4>;
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filename = "oei-m33-ddr.bin";
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type = "blob-ext";
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};
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imx-lpddr {
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type = "nxp-header-ddrfw";
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imx-lpddr-imem {
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filename = "lpddr5_imem_v202311.bin";
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type = "blob-ext";
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};
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imx-lpddr-dmem {
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filename = "lpddr5_dmem_v202311.bin";
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type = "blob-ext";
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};
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};
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imx-lpddr-qb {
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type = "nxp-header-ddrfw";
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imx-lpddr-imem-qb {
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filename = "lpddr5_imem_qb_v202311.bin";
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type = "blob-ext";
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};
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imx-lpddr-dmem-qb {
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filename = "lpddr5_dmem_qb_v202311.bin";
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type = "blob-ext";
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};
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};
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};
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imx-boot {
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filename = "flash.bin";
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pad-byte = <0x00>;
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spl {
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align = <0x400>;
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align-size = <0x400>;
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type = "mkimage";
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args = "-n spl/u-boot-spl.cfgout -T imx8image";
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};
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u-boot {
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type = "mkimage";
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args = "-n u-boot-container.cfgout -T imx8image";
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};
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};
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};
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};
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&A55_0 {
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clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>;
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/delete-property/ power-domains;
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};
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&A55_1 {
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clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>;
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/delete-property/ power-domains;
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};
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&A55_2 {
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clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>;
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/delete-property/ power-domains;
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};
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&A55_3 {
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clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>;
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/delete-property/ power-domains;
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};
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&A55_4 {
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clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>;
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/delete-property/ power-domains;
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};
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&A55_5 {
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clocks = <&scmi_clk IMX95_CLK_ARMPLL_PFD0>;
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/delete-property/ power-domains;
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};
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&aips1 {
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bootph-all;
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};
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&aips2 {
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bootph-all;
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};
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&aips3 {
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bootph-pre-ram;
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};
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&clk_ext1 {
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bootph-all;
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};
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&elemu1 {
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bootph-all;
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status = "okay";
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};
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&elemu3 {
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bootph-all;
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status = "okay";
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};
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&{/firmware} {
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bootph-all;
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};
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&{/firmware/scmi} {
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bootph-all;
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};
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&{/firmware/scmi/protocol@11} {
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bootph-all;
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};
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&{/firmware/scmi/protocol@13} {
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bootph-all;
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};
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&{/firmware/scmi/protocol@14} {
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bootph-all;
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};
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&{/firmware/scmi/protocol@19} {
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bootph-all;
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};
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&gpio2 {
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bootph-pre-ram;
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};
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&gpio3 {
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bootph-pre-ram;
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};
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&gpio4 {
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bootph-pre-ram;
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};
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&gpio5 {
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bootph-pre-ram;
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};
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&mu2 {
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bootph-all;
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};
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&osc_24m {
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bootph-all;
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};
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&{/soc} {
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bootph-all;
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};
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&sram0 {
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bootph-all;
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};
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&scmi_buf0 {
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reg = <0x0 0x400>;
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bootph-all;
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};
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&scmi_buf1 {
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bootph-all;
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};
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@@ -76,6 +76,13 @@ config TARGET_PHYCORE_IMX93
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select OF_BOARD_FIXUP
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select OF_BOARD_SETUP
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config TARGET_IMX95_19X19_EVK
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bool "imx95_19x19_evk"
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select IMX95
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imply BOOTSTD_BOOTCOMMAND
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imply BOOTSTD_FULL
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imply OF_UPSTREAM
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endchoice
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source "board/freescale/imx91_evk/Kconfig"
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@@ -83,6 +90,7 @@ source "board/freescale/imx93_evk/Kconfig"
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source "board/freescale/imx93_qsb/Kconfig"
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source "board/phytec/phycore_imx93/Kconfig"
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source "board/variscite/imx93_var_som/Kconfig"
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source "board/freescale/imx95_evk/Kconfig"
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endif
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10
arch/arm/mach-imx/imx9/scmi/container.cfg
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10
arch/arm/mach-imx/imx9/scmi/container.cfg
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@@ -0,0 +1,10 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2025 NXP
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*/
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BOOT_FROM SD
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SOC_TYPE IMX9
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CONTAINER
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IMAGE A55 bl31.bin 0x8a200000
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IMAGE A55 u-boot.bin CONFIG_TEXT_BASE
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15
arch/arm/mach-imx/imx9/scmi/imximage.cfg
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15
arch/arm/mach-imx/imx9/scmi/imximage.cfg
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@@ -0,0 +1,15 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2025 NXP
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*/
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BOOT_FROM SD
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SOC_TYPE IMX9
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APPEND mx95a0-ahab-container.img
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CONTAINER
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IMAGE OEI m33-oei-ddrfw.bin 0x1ffc0000
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HOLD 0x10000
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IMAGE OEI oei-m33-tcm.bin 0x1ffc0000
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IMAGE M33 m33_image.bin 0x1ffc0000
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IMAGE A55 spl/u-boot-spl.bin 0x20480000
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DUMMY_V2X 0x8b000000
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