WS cleanup: remove SPACE(s) followed by TAB

Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk
2021-09-27 17:42:39 +02:00
committed by Tom Rini
parent 0a50b3c97b
commit 0cf207ec01
183 changed files with 807 additions and 807 deletions

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@@ -2,8 +2,8 @@
* I2C Driver for Atmel ATSHA204 over I2C
*
* Copyright (C) 2014 Josh Datko, Cryptotronix, jbd@cryptotronix.com
* 2016 Tomas Hlavacek, CZ.NIC, tmshlvck@gmail.com
* 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz
* 2016 Tomas Hlavacek, CZ.NIC, tmshlvck@gmail.com
* 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as

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@@ -86,7 +86,7 @@
(AT91_PMC_PLLAR_29 | \
AT91_PMC_PLLXR_OUT(MASTER_PLL_OUT) | \
AT91_PMC_PLLXR_PLLCOUNT(63) | \
AT91_PMC_PLLXR_MUL(MASTER_PLL_MUL - 1) | \
AT91_PMC_PLLXR_MUL(MASTER_PLL_MUL - 1) | \
AT91_PMC_PLLXR_DIV(MASTER_PLL_DIV))
/* PCK/2 = MCK Master Clock from PLLA */
@@ -96,7 +96,7 @@
/* PCK/2 = MCK Master Clock from PLLA */
#define CONFIG_SYS_MCKR2_VAL \
(AT91_PMC_MCKR_CSS_PLLA | AT91_PMC_MCKR_PRES_1 | \
(AT91_PMC_MCKR_CSS_PLLA | AT91_PMC_MCKR_PRES_1 | \
AT91_PMC_MCKR_MDIV_2)
/* define PDC[31:16] as DATA[31:16] */

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@@ -148,7 +148,7 @@
#define PIXIS_LBMAP_ALTBANK 0x40
#define CONFIG_SYS_FLASH_QUIET_TEST
#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */

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@@ -20,9 +20,9 @@
/*
* Use:
* boot-mode=mix
* boot-mode=sd
* boot-mode=net
* boot-mode=mix
* boot-mode=sd
* boot-mode=net
*/
#define MY_CONFIG_BOOT_MODE "boot-mode=sd\0"

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@@ -219,7 +219,7 @@
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
"fdt_addr=0x64f00000\0" \
"fdt_addr=0x64f00000\0" \
"kernel_addr=0x61000000\0" \
"scriptaddr=0x80000000\0" \
"scripthdraddr=0x80080000\0" \

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@@ -104,7 +104,7 @@
"kernel_addr_r="__stringify(CONFIG_SYS_LOAD_ADDR)"\0" \
"pxefile_addr_r="__stringify(CONFIG_SYS_LOAD_ADDR)"\0" \
"scriptaddr="__stringify(CONFIG_SYS_LOAD_ADDR)"\0" \
"ramdisk_addr_r=0x28000000\0" \
"ramdisk_addr_r=0x28000000\0" \
"fdt_addr_r=0x18000000\0" \
"fdtfile=imx6q-novena.dtb\0" \
"stdout=serial,vidconsole\0" \

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@@ -203,7 +203,7 @@
"${defargs} " \
"${optargs} " \
"root=${ramroot} ramdisk_size=${ramdisk_size} " \
"rootfstype=${ramrootfstype}\0" \
"rootfstype=${ramrootfstype}\0" \
"ramboot=run mmcbootenv; " \
"if run loadimage && run loaddtb && run loadramdisk; then " \
"echo Booting ${bootdir}/${bootfile} from mmc ${bootpart} w/ramdisk ...; " \

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@@ -75,7 +75,7 @@
"mmcrootfstype=ext4 rootwait\0" \
"kernelimg=" __stringify(CONFIG_BOARD_NAME) "-linux.bin\0" \
"splashpos=0,0\0" \
"splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"videomode=video=ctfb:x:800,y:480,depth:18,pclk:33033,le:96,ri:96,up:20,lo:21,hs:64,vs:4,sync:0,vmode:0\0" \
"check_env=if test -n ${flash_env_version}; " \
"then env default env_version; " \

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@@ -129,7 +129,7 @@
#define CONFIG_SYS_FPGA_SIZE 0x00100000 /* 1 MB */
#define CONFIG_SYS_HMI_BASE 0xc0010000
#define CONFIG_SYS_BR3_PRELIM 0xc0001881 /* UPMA, 32-bit */
#define CONFIG_SYS_OR3_PRELIM 0xfff00000 /* 1 MB */
#define CONFIG_SYS_OR3_PRELIM 0xfff00000 /* 1 MB */
#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_FPGA_BASE + 0x70)
#define CONFIG_SYS_MAX_NAND_DEVICE 1
@@ -246,17 +246,17 @@
"era fe000000 fe1dffff;" \
"cp.b 100000 fe000000 ${filesize};" \
"setenv filesize;saveenv\0" \
"update_fdt=tftp 100000 ${fdt_file};" \
"update_fdt=tftp 100000 ${fdt_file};" \
"era fe1e0000 fe1fffff;" \
"cp.b 100000 fe1e0000 ${filesize};" \
"setenv filesize;saveenv\0" \
"update_initrd=tftp 100000 ${initrd_file};" \
"update_initrd=tftp 100000 ${initrd_file};" \
"era fe200000 fe9fffff;" \
"cp.b 100000 fe200000 ${filesize};" \
"setenv filesize;saveenv\0" \
"clean_data=era fea00000 fff5ffff\0" \
"usbargs=setenv bootargs root=/dev/sda1 rw\0" \
"load_usb=usb start;" \
"usbargs=setenv bootargs root=/dev/sda1 rw\0" \
"load_usb=usb start;" \
"ext2load usb 0:1 ${kernel_addr_r} /boot/uImage\0" \
"boot_usb=run load_usb usbargs addcons;" \
"bootm ${kernel_addr_r} - ${fdt_addr};" \

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@@ -220,7 +220,7 @@ extern u32 __div64_32(u64 *dividend, u32 divisor);
} else if (likely(((n) >> 32) == 0)) { \
__rem = (u32)(n) % __base; \
(n) = (u32)(n) / __base; \
} else \
} else \
__rem = __div64_32(&(n), __base); \
__rem; \
})

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@@ -12,64 +12,64 @@
*/
#define ARMCLK 0
#define PRCMU_ACLK 1
#define PRCMU_SVAMMCSPCLK 2
#define PRCMU_SDMMCHCLK 2 /* DBx540 only. */
#define PRCMU_SIACLK 3
#define PRCMU_SIAMMDSPCLK 3 /* DBx540 only. */
#define PRCMU_SGACLK 4
#define PRCMU_UARTCLK 5
#define PRCMU_MSP02CLK 6
#define PRCMU_MSP1CLK 7
#define PRCMU_I2CCLK 8
#define PRCMU_SDMMCCLK 9
#define PRCMU_SLIMCLK 10
#define PRCMU_CAMCLK 10 /* DBx540 only. */
#define PRCMU_PER1CLK 11
#define PRCMU_PER2CLK 12
#define PRCMU_PER3CLK 13
#define PRCMU_PER5CLK 14
#define PRCMU_PER6CLK 15
#define PRCMU_PER7CLK 16
#define PRCMU_LCDCLK 17
#define PRCMU_BMLCLK 18
#define PRCMU_HSITXCLK 19
#define PRCMU_HSIRXCLK 20
#define PRCMU_SVAMMCSPCLK 2
#define PRCMU_SDMMCHCLK 2 /* DBx540 only. */
#define PRCMU_SIACLK 3
#define PRCMU_SIAMMDSPCLK 3 /* DBx540 only. */
#define PRCMU_SGACLK 4
#define PRCMU_UARTCLK 5
#define PRCMU_MSP02CLK 6
#define PRCMU_MSP1CLK 7
#define PRCMU_I2CCLK 8
#define PRCMU_SDMMCCLK 9
#define PRCMU_SLIMCLK 10
#define PRCMU_CAMCLK 10 /* DBx540 only. */
#define PRCMU_PER1CLK 11
#define PRCMU_PER2CLK 12
#define PRCMU_PER3CLK 13
#define PRCMU_PER5CLK 14
#define PRCMU_PER6CLK 15
#define PRCMU_PER7CLK 16
#define PRCMU_LCDCLK 17
#define PRCMU_BMLCLK 18
#define PRCMU_HSITXCLK 19
#define PRCMU_HSIRXCLK 20
#define PRCMU_HDMICLK 21
#define PRCMU_APEATCLK 22
#define PRCMU_APETRACECLK 23
#define PRCMU_MCDECLK 24
#define PRCMU_IPI2CCLK 25
#define PRCMU_DSIALTCLK 26
#define PRCMU_DMACLK 27
#define PRCMU_B2R2CLK 28
#define PRCMU_TVCLK 29
#define SPARE_UNIPROCLK 30
#define PRCMU_SSPCLK 31
#define PRCMU_RNGCLK 32
#define PRCMU_UICCCLK 33
#define PRCMU_APEATCLK 22
#define PRCMU_APETRACECLK 23
#define PRCMU_MCDECLK 24
#define PRCMU_IPI2CCLK 25
#define PRCMU_DSIALTCLK 26
#define PRCMU_DMACLK 27
#define PRCMU_B2R2CLK 28
#define PRCMU_TVCLK 29
#define SPARE_UNIPROCLK 30
#define PRCMU_SSPCLK 31
#define PRCMU_RNGCLK 32
#define PRCMU_UICCCLK 33
#define PRCMU_G1CLK 34 /* DBx540 only. */
#define PRCMU_HVACLK 35 /* DBx540 only. */
#define PRCMU_SPARE1CLK 36
#define PRCMU_SPARE2CLK 37
#define PRCMU_SPARE1CLK 36
#define PRCMU_SPARE2CLK 37
#define PRCMU_NUM_REG_CLOCKS 38
#define PRCMU_NUM_REG_CLOCKS 38
#define PRCMU_RTCCLK PRCMU_NUM_REG_CLOCKS
#define PRCMU_SYSCLK 39
#define PRCMU_CDCLK 40
#define PRCMU_TIMCLK 41
#define PRCMU_PLLSOC0 42
#define PRCMU_PLLSOC1 43
#define PRCMU_ARMSS 44
#define PRCMU_PLLDDR 45
#define PRCMU_RTCCLK PRCMU_NUM_REG_CLOCKS
#define PRCMU_SYSCLK 39
#define PRCMU_CDCLK 40
#define PRCMU_TIMCLK 41
#define PRCMU_PLLSOC0 42
#define PRCMU_PLLSOC1 43
#define PRCMU_ARMSS 44
#define PRCMU_PLLDDR 45
/* DSI Clocks */
#define PRCMU_PLLDSI 46
#define PRCMU_DSI0CLK 47
#define PRCMU_DSI1CLK 48
#define PRCMU_DSI0ESCCLK 49
#define PRCMU_DSI1ESCCLK 50
#define PRCMU_DSI2ESCCLK 51
#define PRCMU_PLLDSI 46
#define PRCMU_DSI0CLK 47
#define PRCMU_DSI1CLK 48
#define PRCMU_DSI0ESCCLK 49
#define PRCMU_DSI1ESCCLK 50
#define PRCMU_DSI2ESCCLK 51
/* LCD DSI PLL - Ux540 only */
#define PRCMU_PLLDSI_LCD 52
@@ -79,6 +79,6 @@
#define PRCMU_DSI1ESCCLK_LCD 56
#define PRCMU_DSI2ESCCLK_LCD 57
#define PRCMU_NUM_CLKS 58
#define PRCMU_NUM_CLKS 58
#endif

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@@ -10,16 +10,16 @@
#if CONFIG_IS_ENABLED(CMD_SF)
#define BOOTENV_SHARED_SF(devtypel) \
#devtypel "_boot=" \
#devtypel "_boot=" \
"if " #devtypel " probe ${busnum}; then " \
"devtype=" #devtypel "; " \
"run scan_sf_for_scripts; " \
"devtype=" #devtypel "; " \
"run scan_sf_for_scripts; " \
"fi\0"
#define BOOTENV_DEV_SF(devtypeu, devtypel, instance) \
"bootcmd_" #devtypel #instance "=" \
"busnum=" #instance "; " \
#define BOOTENV_DEV_SF(devtypeu, devtypel, instance) \
"bootcmd_" #devtypel #instance "=" \
"busnum=" #instance "; " \
"run " #devtypel "_boot\0"
#define BOOTENV_DEV_NAME_SF(devtypeu, devtypel, instance) \
#define BOOTENV_DEV_NAME_SF(devtypeu, devtypel, instance) \
#devtypel #instance " "
#else
#define BOOTENV_SHARED_SF(devtypel)

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@@ -137,7 +137,7 @@ struct ftpmu010 {
* 1. FTPMU010_PDLLCR0_HCLKOUTDIS:
* Datasheet indicated it starts at bit #21 which was wrong.
* 2. FTPMU010_PDLLCR0_DLLFRAG:
* Datasheet indicated it has 2 bit which was wrong.
* Datasheet indicated it has 2 bit which was wrong.
*/
#define FTPMU010_PDLLCR0_HCLKOUTDIS(cr0) (((cr0) & 0xf) << 20)
#define FTPMU010_PDLLCR0_DLLFRAG(cr0) (1 << 19)

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@@ -40,7 +40,7 @@ typedef struct qe_snum {
#define QE_RISC_ALLOCATION_RISC2 0x2 /* RISC 2 */
#define QE_RISC_ALLOCATION_RISC3 0x4 /* RISC 3 */
#define QE_RISC_ALLOCATION_RISC4 0x8 /* RISC 4 */
#define QE_RISC_ALLOCATION_RISC1_AND_RISC2 (QE_RISC_ALLOCATION_RISC1 | \
#define QE_RISC_ALLOCATION_RISC1_AND_RISC2 (QE_RISC_ALLOCATION_RISC1 | \
QE_RISC_ALLOCATION_RISC2)
#define QE_RISC_ALLOCATION_FOUR_RISCS (QE_RISC_ALLOCATION_RISC1 | \
QE_RISC_ALLOCATION_RISC2 | \

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@@ -14,6 +14,6 @@ struct watchdog_regs {
#define WCR_WDE 0x04
#define WCR_WDT 0x08
#define WCR_SRS 0x10
#define WCR_WDA 0x20
#define WCR_WDA 0x20
#define SET_WCR_WT(x) (x << 8)
#define WCR_WT_MSK SET_WCR_WT(0xFF)

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@@ -201,7 +201,7 @@ int generic_phy_power_off(struct phy *phy);
* generic_phy_configure() - configure a PHY device
*
* @phy: PHY port to be configured
* @params: PHY Parameters, underlying data is specific to the PHY function
* @params: PHY Parameters, underlying data is specific to the PHY function
* @return 0 if OK, or a negative error code
*/
int generic_phy_configure(struct phy *phy, void *params);

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@@ -124,7 +124,7 @@ typedef struct {
} flash_header_v1_t;
typedef struct {
uint32_t length; /* Length of data to be read from flash */
uint32_t length; /* Length of data to be read from flash */
} flash_cfg_parms_t;
typedef struct {

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@@ -34,7 +34,7 @@ struct apm_bios_info {
#define APM_16_BIT_SUPPORT 0x0001
#define APM_32_BIT_SUPPORT 0x0002
#define APM_IDLE_SLOWS_CLOCK 0x0004
#define APM_BIOS_DISABLED 0x0008
#define APM_BIOS_DISABLED 0x0008
#define APM_BIOS_DISENGAGED 0x0010
/*

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@@ -203,7 +203,7 @@ void __read_once_size(const volatile void *p, void *res, int size)
/*
* We can't declare function 'inline' because __no_sanitize_address confilcts
* with inlining. Attempt to inline it may cause a build failure.
* https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67368
* https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67368
* '__maybe_unused' allows us to avoid defined-but-not-used warnings.
*/
# define __no_kasan_or_inline __no_sanitize_address notrace __maybe_unused

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@@ -63,7 +63,7 @@ struct resource_list {
#define IORESOURCE_IRQ_HIGHLEVEL (1<<2)
#define IORESOURCE_IRQ_LOWLEVEL (1<<3)
#define IORESOURCE_IRQ_SHAREABLE (1<<4)
#define IORESOURCE_IRQ_OPTIONAL (1<<5)
#define IORESOURCE_IRQ_OPTIONAL (1<<5)
/* PnP DMA specific bits (IORESOURCE_BITS) */
#define IORESOURCE_DMA_TYPE_MASK (3<<0)

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@@ -456,7 +456,7 @@ static inline void list_splice_tail_init(struct list_head *list,
* Continue to iterate over list of given type, continuing after
* the current position.
*/
#define list_for_each_entry_continue(pos, head, member) \
#define list_for_each_entry_continue(pos, head, member) \
for (pos = list_entry(pos->member.next, typeof(*pos), member); \
prefetch(pos->member.next), &pos->member != (head); \
pos = list_entry(pos->member.next, typeof(*pos), member))
@@ -510,7 +510,7 @@ static inline void list_splice_tail_init(struct list_head *list,
* Iterate over list of given type, continuing after current point,
* safe against removal of list entry.
*/
#define list_for_each_entry_safe_continue(pos, n, head, member) \
#define list_for_each_entry_safe_continue(pos, n, head, member) \
for (pos = list_entry(pos->member.next, typeof(*pos), member), \
n = list_entry(pos->member.next, typeof(*pos), member); \
&pos->member != (head); \

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@@ -54,7 +54,7 @@
#define DoC_Mplus_Configuration 0x100a
#define DoC_Mplus_OutputControl 0x100c
#define DoC_Mplus_FlashControl 0x1020
#define DoC_Mplus_FlashSelect 0x1022
#define DoC_Mplus_FlashSelect 0x1022
#define DoC_Mplus_FlashCmd 0x1024
#define DoC_Mplus_FlashAddress 0x1026
#define DoC_Mplus_FlashData0 0x1028
@@ -62,14 +62,14 @@
#define DoC_Mplus_ReadPipeInit 0x102a
#define DoC_Mplus_LastDataRead 0x102c
#define DoC_Mplus_LastDataRead1 0x102d
#define DoC_Mplus_WritePipeTerm 0x102e
#define DoC_Mplus_WritePipeTerm 0x102e
#define DoC_Mplus_ECCSyndrome0 0x1040
#define DoC_Mplus_ECCSyndrome1 0x1041
#define DoC_Mplus_ECCSyndrome2 0x1042
#define DoC_Mplus_ECCSyndrome3 0x1043
#define DoC_Mplus_ECCSyndrome4 0x1044
#define DoC_Mplus_ECCSyndrome5 0x1045
#define DoC_Mplus_ECCConf 0x1046
#define DoC_Mplus_ECCConf 0x1046
#define DoC_Mplus_Toggle 0x1046
#define DoC_Mplus_DownloadStatus 0x1074
#define DoC_Mplus_CtrlConfirm 0x1076

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@@ -21,16 +21,16 @@
* For each partition, these fields are available:
* name: string that will be used to label the partition's MTD device.
* size: the partition size; if defined as MTDPART_SIZ_FULL, the partition
* will extend to the end of the master MTD device.
* will extend to the end of the master MTD device.
* offset: absolute starting position within the master MTD device; if
* defined as MTDPART_OFS_APPEND, the partition will start where the
* defined as MTDPART_OFS_APPEND, the partition will start where the
* previous one ended; if MTDPART_OFS_NXTBLK, at the next erase block;
* if MTDPART_OFS_RETAIN, consume as much as possible, leaving size
* after the end of partition.
* mask_flags: contains flags that have to be masked (removed) from the
* master MTD flag set for the corresponding MTD partition.
* For example, to force a read-only partition, simply adding
* MTD_WRITEABLE to the mask_flags will do the trick.
* master MTD flag set for the corresponding MTD partition.
* For example, to force a read-only partition, simply adding
* MTD_WRITEABLE to the mask_flags will do the trick.
*
* Note: writeable partitions require their size and offset be
* erasesize aligned (e.g. use MTDPART_OFS_NEXTBLK).

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@@ -47,7 +47,7 @@ struct screen_info {
} __attribute__((packed));
#define VIDEO_TYPE_MDA 0x10 /* Monochrome Text Display */
#define VIDEO_TYPE_CGA 0x11 /* CGA Display */
#define VIDEO_TYPE_CGA 0x11 /* CGA Display */
#define VIDEO_TYPE_EGAM 0x20 /* EGA/VGA in Monochrome Mode */
#define VIDEO_TYPE_EGAC 0x21 /* EGA in Color Mode */
#define VIDEO_TYPE_VGAC 0x22 /* VGA+ in Color Mode */
@@ -74,7 +74,7 @@ extern struct screen_info screen_info;
#define ORIG_X (screen_info.orig_x)
#define ORIG_Y (screen_info.orig_y)
#define ORIG_VIDEO_MODE (screen_info.orig_video_mode)
#define ORIG_VIDEO_COLS (screen_info.orig_video_cols)
#define ORIG_VIDEO_COLS (screen_info.orig_video_cols)
#define ORIG_VIDEO_EGA_BX (screen_info.orig_video_ega_bx)
#define ORIG_VIDEO_LINES (screen_info.orig_video_lines)
#define ORIG_VIDEO_ISVGA (screen_info.orig_video_isVGA)

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@@ -257,7 +257,7 @@
*/
#define UART_ASR 0x01 /* Additional Status Register */
#define UART_RFL 0x03 /* Receiver FIFO level */
#define UART_TFL 0x04 /* Transmitter FIFO level */
#define UART_TFL 0x04 /* Transmitter FIFO level */
#define UART_ICR 0x05 /* Index Control Register */
/* The 16950 ICR registers */

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@@ -160,14 +160,14 @@ struct usb_ep_caps {
* endpoint. It's set once by UDC driver when endpoint is initialized, and
* should not be changed. Should not be confused with maxpacket.
* @max_streams: The maximum number of streams supported
* by this EP (0 - 16, actual number is 2^n)
* by this EP (0 - 16, actual number is 2^n)
* @maxburst: the maximum number of bursts supported by this EP (for usb3)
* @driver_data:for use by the gadget driver. all other fields are
* read-only to gadget drivers.
* @desc: endpoint descriptor. This pointer is set before the endpoint is
* enabled and remains valid until the endpoint is disabled.
* enabled and remains valid until the endpoint is disabled.
* @comp_desc: In case of SuperSpeed support, this is the endpoint companion
* descriptor that is used to configure the endpoint
* descriptor that is used to configure the endpoint
*
* the bus controller driver lists all the general purpose endpoints in
* gadget->ep_list. the control endpoint (gadget->ep0) is not in that list,

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@@ -18,7 +18,7 @@
#define VIOLOEN (1 << 6)
#define VIOLOSTBY (1 << 7)
#define VIOLOMODE (1 << 8)
#define VDIGEN (1 << 9)
#define VDIGEN (1 << 9)
#define VDIGSTBY (1 << 10)
#define VDIGMODE (1 << 11)
#define VGENEN (1 << 12)

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@@ -42,7 +42,7 @@ CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead."
#endif
#ifndef CONFIG_SYS_CCSRBAR
#define CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT
#define CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT
#endif
#ifndef CONFIG_SYS_CCSRBAR_PHYS_HIGH
@@ -54,14 +54,14 @@ CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead."
#endif
#ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT
#endif
#define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \
CONFIG_SYS_CCSRBAR_PHYS_LOW)
#ifndef CONFIG_SYS_IMMR
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR
#endif
#endif /* __MPC85xx_H__ */

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@@ -106,7 +106,7 @@ struct mtd_write_req {
#define MTD_NANDECC_PLACE 1 // Use the given placement in the structure (YAFFS1 legacy mode)
#define MTD_NANDECC_AUTOPLACE 2 // Use the default placement scheme
#define MTD_NANDECC_PLACEONLY 3 // Use the given placement in the structure (Do not store ecc result on read)
#define MTD_NANDECC_AUTOPL_USR 4 // Use the given autoplacement scheme rather than using the default
#define MTD_NANDECC_AUTOPL_USR 4 // Use the given autoplacement scheme rather than using the default
/* OTP mode selection */
#define MTD_OTP_OFF 0

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@@ -45,7 +45,7 @@
/*
* to facilitate the definition, the following macros are provided
*
* offset, pull,pF, drv,dF, edge,eF ,afn,aF
* offset, pull,pF, drv,dF, edge,eF ,afn,aF
*/
#define MFP_OFFSET_MASK MFP(0xffff, 0, 0, 0, 0, 0, 0)
#define MFP_REG(x) MFP(x, 0, 0, 0, 0, 0, 0)

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@@ -75,7 +75,7 @@ struct disk_partition {
char type_guid[UUID_STR_LEN + 1]; /* type GUID as string, if exists */
#endif
#ifdef CONFIG_DOS_PARTITION
uchar sys_ind; /* partition type */
uchar sys_ind; /* partition type */
#endif
};

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@@ -575,8 +575,8 @@ static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
}
/* PHY UIDs for various PHYs that are referenced in external code */
#define PHY_UID_CS4340 0x13e51002
#define PHY_UID_CS4223 0x03e57003
#define PHY_UID_CS4340 0x13e51002
#define PHY_UID_CS4223 0x03e57003
#define PHY_UID_TN2020 0x00a19410
#define PHY_UID_IN112525_S03 0x02107440

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@@ -25,7 +25,7 @@
#define TSEC_SIZE 0x40000
#define TSEC_MDIO_OFFSET 0x40000
#else
#define TSEC_SIZE 0x01000
#define TSEC_SIZE 0x01000
#define TSEC_MDIO_OFFSET 0x01000
#endif

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