From d31a3bd08ed46c51cdc5f5f126f2a721c5425bfb Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Mon, 10 Feb 2025 16:27:25 +0000 Subject: [PATCH 01/47] clk: add stub clock driver Add a stub clock driver which can be used to bind clock controllers which aren't required for the platform to boot, but which are needed for U-Boot drivers to work. In addition, add a NOP parent driver to allow for binding the parent nodes of the clock. Initially this driver supports a Qualcomm platform where the MMC driver tries to fetch the RPM clock controller, which is not actually required for the device to work. Reviewed-by: Neil Armstrong Acked-by: Ilias Apalodimas Signed-off-by: Caleb Connolly --- drivers/clk/Kconfig | 7 +++++ drivers/clk/Makefile | 1 + drivers/clk/clk-stub.c | 66 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 74 insertions(+) create mode 100644 drivers/clk/clk-stub.c diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index d9d518d7038..18bd640a68b 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -96,6 +96,13 @@ config SPL_CLK_GPIO Enable this option to add GPIO-controlled clock gate driver in U-Boot SPL. +config CLK_STUB + bool "Stub clock driver" + depends on CLK + help + Enable this to provide a stub clock driver for non-essential clock + controllers. + config CLK_BCM6345 bool "Clock controller driver for BCM6345" depends on CLK && ARCH_BMIPS diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 7f84f22d4b1..fe0e49f6112 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_$(PHASE_)CLK_CCF) += clk.o clk-divider.o clk-mux.o clk-gate.o obj-$(CONFIG_$(PHASE_)CLK_CCF) += clk-fixed-factor.o obj-$(CONFIG_$(PHASE_)CLK_COMPOSITE_CCF) += clk-composite.o obj-$(CONFIG_$(PHASE_)CLK_GPIO) += clk-gpio.o +obj-$(CONFIG_$(PHASE_)CLK_STUB) += clk-stub.o obj-y += adi/ obj-y += analogbits/ diff --git a/drivers/clk/clk-stub.c b/drivers/clk/clk-stub.c new file mode 100644 index 00000000000..ea817031fa6 --- /dev/null +++ b/drivers/clk/clk-stub.c @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Stub clk driver for non-essential clocks. + * + * This driver should be used for clock controllers + * which are described as dependencies in DT but aren't + * actually necessary for hardware functionality. + */ + +#include +#include + +/* NOP parent nodes to stub clocks */ +static const struct udevice_id nop_parent_ids[] = { + { .compatible = "qcom,rpm-proc" }, + { .compatible = "qcom,glink-rpm" }, + { .compatible = "qcom,rpm-sm6115" }, + { } +}; + +U_BOOT_DRIVER(nop_parent) = { + .name = "nop_parent", + .id = UCLASS_NOP, + .of_match = nop_parent_ids, + .bind = dm_scan_fdt_dev, + .flags = DM_FLAG_DEFAULT_PD_CTRL_OFF, +}; + +static ulong stub_clk_set_rate(struct clk *clk, ulong rate) +{ + return (clk->rate = rate); +} + +static ulong stub_clk_get_rate(struct clk *clk) +{ + return clk->rate; +} + +static int stub_clk_nop(struct clk *clk) +{ + return 0; +} + +static struct clk_ops stub_clk_ops = { + .set_rate = stub_clk_set_rate, + .get_rate = stub_clk_get_rate, + .enable = stub_clk_nop, + .disable = stub_clk_nop, +}; + +static const struct udevice_id stub_clk_ids[] = { + { .compatible = "qcom,rpmcc" }, + { .compatible = "qcom,sm8250-rpmh-clk" }, + { .compatible = "qcom,sm8550-rpmh-clk" }, + { .compatible = "qcom,sm8650-rpmh-clk" }, + { } +}; + +U_BOOT_DRIVER(clk_stub) = { + .name = "clk_stub", + .id = UCLASS_CLK, + .ops = &stub_clk_ops, + .of_match = stub_clk_ids, + .flags = DM_FLAG_DEFAULT_PD_CTRL_OFF, +}; + From b72d6a9d619b000875699fde633b26c0ec1bca67 Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Mon, 10 Feb 2025 16:27:26 +0000 Subject: [PATCH 02/47] qcom_defconfig: enable stub clock Enable the stub clock driver for rpmcc Reviewed-by: Neil Armstrong Acked-by: Ilias Apalodimas Signed-off-by: Caleb Connolly --- configs/qcom_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index e4abfdf16bb..9f5518a9fe9 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -58,6 +58,7 @@ CONFIG_CLK_QCOM_SM8550=y CONFIG_CLK_QCOM_SM8650=y CONFIG_CLK_QCOM_SC7280=y CONFIG_CLK_QCOM_X1E80100=y +CONFIG_CLK_STUB=y CONFIG_DFU_MMC=y CONFIG_DFU_SCSI=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x200000 From 506f6a384c335e86c4812c5e734dea4eabc21130 Mon Sep 17 00:00:00 2001 From: Julius Lehmann Date: Mon, 10 Feb 2025 16:27:27 +0000 Subject: [PATCH 03/47] clk: stub: add sm8150 compatible id Add support for sm8150 clock controller to clk stub driver. Signed-off-by: Julius Lehmann Reviewed-by: Neil Armstrong --- drivers/clk/clk-stub.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk-stub.c b/drivers/clk/clk-stub.c index ea817031fa6..5fbbb07b7f7 100644 --- a/drivers/clk/clk-stub.c +++ b/drivers/clk/clk-stub.c @@ -50,6 +50,7 @@ static struct clk_ops stub_clk_ops = { static const struct udevice_id stub_clk_ids[] = { { .compatible = "qcom,rpmcc" }, + { .compatible = "qcom,sm8150-rpmh-clk" }, { .compatible = "qcom,sm8250-rpmh-clk" }, { .compatible = "qcom,sm8550-rpmh-clk" }, { .compatible = "qcom,sm8650-rpmh-clk" }, From e57b72abb71b267d9b7b61181dc2ce902b47f425 Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Mon, 10 Feb 2025 16:30:23 +0000 Subject: [PATCH 04/47] power: regulator: add additional supported LDOs for pm8150l Add the other LDOs that our rpmh driver can currently support. Some of these are used on the RB5 to power the sdcard. Reviewed-by: Neil Armstrong Tested-by: Amit Pundir Signed-off-by: Caleb Connolly --- drivers/power/regulator/qcom-rpmh-regulator.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/power/regulator/qcom-rpmh-regulator.c b/drivers/power/regulator/qcom-rpmh-regulator.c index 70df51b5fa4..cd2b1a654c1 100644 --- a/drivers/power/regulator/qcom-rpmh-regulator.c +++ b/drivers/power/regulator/qcom-rpmh-regulator.c @@ -481,6 +481,13 @@ static const struct rpmh_vreg_init_data pm8150_vreg_data[] = { static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = { RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"), + RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"), + RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"), + RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"), + RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"), + RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l1-l8"), + RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"), + RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"), RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"), {} }; From 554562f7b50d780eea64763d444b6ddd2c216072 Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Mon, 10 Feb 2025 16:30:24 +0000 Subject: [PATCH 05/47] pinctrl: qcom: sm8250: fix pin count The pin count wasn't updated when the special pins were added, as a result it was never possible to configure the special pins on SM8250 boards. Fix the pin count and allow the special pins to be configured. This fixes sdcard support on the RB5. Fixes: 58fa52042471 ("pinctr: qcom: sm8250: add special pins pins configuration data") Reviewed-by: Neil Armstrong Tested-by: Amit Pundir Signed-off-by: Caleb Connolly --- drivers/pinctrl/qcom/pinctrl-sm8250.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250.c b/drivers/pinctrl/qcom/pinctrl-sm8250.c index cab42fa64ed..b21cdc4d24b 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm8250.c +++ b/drivers/pinctrl/qcom/pinctrl-sm8250.c @@ -107,7 +107,7 @@ static unsigned int sm8250_get_function_mux(__maybe_unused unsigned int pin, uns static struct msm_pinctrl_data sm8250_data = { .pin_data = { .pin_offsets = sm8250_pin_offsets, - .pin_count = ARRAY_SIZE(sm8250_pin_offsets), + .pin_count = 184, .special_pins_start = 180, .special_pins_data = sm8250_special_pins_data, }, From 6267ce556595e0586aee3a7d63042d105dc3fa4e Mon Sep 17 00:00:00 2001 From: Sam Day Date: Mon, 3 Feb 2025 16:42:20 +0000 Subject: [PATCH 06/47] cmd: ufetch: use 3-bit colour ANSI codes Currently, the 8-bit escapes are being used, which aren't supported by vidconsole_escape_char. Since the current usage maps directly to the 3-bit equivalents anyway, let's use those instead. With this change, the fetch output looks as fetching in the vidconsole as it does over serial! Signed-off-by: Sam Day Tested-by: Alexey Minnekhanov Tested-by: Ferass El Hafidi --- cmd/ufetch.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cmd/ufetch.c b/cmd/ufetch.c index ed5a856c7ab..46bd16824e6 100644 --- a/cmd/ufetch.c +++ b/cmd/ufetch.c @@ -24,8 +24,8 @@ DECLARE_GLOBAL_DATA_PTR; #define LINE_WIDTH 40 -#define BLUE "\033[38;5;4m" -#define YELLOW "\033[38;5;11m" +#define BLUE "\033[34m" +#define YELLOW "\033[33m" #define BOLD "\033[1m" #define RESET "\033[0m" static const char * const logo_lines[] = { From 46a110aac01e375a3143cc6a3b0f01cc94d31909 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 22 Feb 2025 20:17:10 +0800 Subject: [PATCH 07/47] imx8mq: imx8mq_evk: fix DEFAULT_FDT_FILE The CONFIG_DEFAULT_FDT_FILE should be imx8mq_evk.dtb for this board Fixes: 7050bd925f7 ("imx: imx8mq_evk: Switch to BOOTSTD") Reported-by: Ludwig Nussel Signed-off-by: Peng Fan --- configs/imx8mq_evk_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 97ef352dfb8..0de98152b2b 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -32,7 +32,7 @@ CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" -CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" +CONFIG_DEFAULT_FDT_FILE="imx8mq-evk.dtb" CONFIG_SYS_PBSIZE=1050 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y From 542cac02d0b2070708f40746f4bfef0611df6f85 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 22 Feb 2025 20:17:11 +0800 Subject: [PATCH 08/47] imx8mm: imx8mm_evk: fix BOOTSTD boot Select BOOTSTD_FULL and BOOTSTD_BOOTCOMMAND Correct DEFAULT_FDT_FILE Correct env file for imx8mm_evk_fspi_defconfig Fixes: 364ba68ed1a ("imx: imx8mm_evk: Switch to BOOTSTD") Reported-by: Ludwig Nussel Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8m/Kconfig | 2 ++ configs/imx8mm_evk_defconfig | 3 ++- configs/imx8mm_evk_fspi_defconfig | 4 ++-- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index 0fe9c46e499..89f2b50c8a2 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -92,6 +92,8 @@ config TARGET_IMX8MM_EVK select FSL_CAAM select ARCH_MISC_INIT select SPL_CRYPTO if SPL + imply BOOTSTD_FULL + imply BOOTSTD_BOOTCOMMAND imply OF_UPSTREAM config TARGET_IMX8MM_ICORE_MX8MM diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 659fc9ec039..2048391439f 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -25,7 +25,8 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y -CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" +CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" +CONFIG_DEFAULT_FDT_FILE="imx8mm-evk.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y diff --git a/configs/imx8mm_evk_fspi_defconfig b/configs/imx8mm_evk_fspi_defconfig index 4a8d4994b80..59ebdc5782f 100644 --- a/configs/imx8mm_evk_fspi_defconfig +++ b/configs/imx8mm_evk_fspi_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_ENV_SOURCE_FILE="imx8mn_evk" CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SF_DEFAULT_MODE=0 CONFIG_ENV_SIZE=0x1000 @@ -29,7 +28,8 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y CONFIG_OF_SYSTEM_SETUP=y -CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" +CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" +CONFIG_DEFAULT_FDT_FILE="imx8mm-evk.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y From 65d150bf7b17b93b95629936d0f9caf17cd5e770 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 27 Feb 2025 07:29:15 -0300 Subject: [PATCH 09/47] imx93_evk: Pass kernel_addr_r Currently, booting via bootstd fails because the kernel cannot be retrieved. The reason for this is the lack of 'kernel_addr_r'. Pass 'kernel_addr_r' to fix booting via bootstd. Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan --- board/freescale/imx93_evk/imx93_evk.env | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/imx93_evk/imx93_evk.env b/board/freescale/imx93_evk/imx93_evk.env index f692f42f78a..8c3aef6b557 100644 --- a/board/freescale/imx93_evk/imx93_evk.env +++ b/board/freescale/imx93_evk/imx93_evk.env @@ -16,6 +16,7 @@ mmcroot=/dev/mmcblk1p2 rootwait rw mmcautodetect=yes mmcargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=${mmcroot} prepare_mcore=setenv mcore_clk clk-imx93.mcore_booted +kernel_addr_r=CONFIG_SYS_LOAD_ADDR loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file} From 11ad9f8b15b983054ee7a3ec6ada1fd4e0194d6d Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 27 Feb 2025 07:29:16 -0300 Subject: [PATCH 10/47] imx8mp_evk: Pass kernel_addr_r Currently, booting via bootstd fails because the kernel cannot be retrieved. The reason for this is the lack of 'kernel_addr_r'. Pass 'kernel_addr_r' to fix booting via bootstd. Signed-off-by: Fabio Estevam Reviewed-by: Peng Fan --- board/freescale/imx8mp_evk/imx8mp_evk.env | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/imx8mp_evk/imx8mp_evk.env b/board/freescale/imx8mp_evk/imx8mp_evk.env index 18f6c6e200e..f70e18fa9d9 100644 --- a/board/freescale/imx8mp_evk/imx8mp_evk.env +++ b/board/freescale/imx8mp_evk/imx8mp_evk.env @@ -16,6 +16,7 @@ mmcroot=/dev/mmcblk1p2 rootwait rw mmcautodetect=yes mmcargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=${mmcroot} prepare_mcore=setenv mcore_clk clk-imx8mp.mcore_booted +kernel_addr_r=CONFIG_SYS_LOAD_ADDR loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} mmcboot=echo Booting from mmc ...; From c5aa4a46244f7fc0262370e3803bd42e5c10bd87 Mon Sep 17 00:00:00 2001 From: Daniel Schultz Date: Mon, 10 Feb 2025 22:42:04 -0800 Subject: [PATCH 11/47] arch: arm: dts: k3-am625-phycore-som-binman: Add custMpk to overlays There are some device-tree overlays with missing entries for the keyfile. Add them to sign all images in the U-Boot FIT image. Signed-off-by: Daniel Schultz Reviewed-by: Wadim Egorov --- arch/arm/dts/k3-am625-phycore-som-binman.dtsi | 28 +++++++++++++------ 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/arch/arm/dts/k3-am625-phycore-som-binman.dtsi b/arch/arm/dts/k3-am625-phycore-som-binman.dtsi index 31456d23167..4a65427e877 100644 --- a/arch/arm/dts/k3-am625-phycore-som-binman.dtsi +++ b/arch/arm/dts/k3-am625-phycore-som-binman.dtsi @@ -321,8 +321,11 @@ compression = "none"; load = <0x8F000000>; arch = "arm"; - - blob-ext { + ti-secure { + content = <&am6xx_phycore_disable_rtc_dtbo>; + keyfile = "custMpk.pem"; + }; + am6xx_phycore_disable_rtc_dtbo: blob-ext { filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-disable-rtc.dtbo"; }; }; @@ -333,8 +336,11 @@ compression = "none"; load = <0x8F001000>; arch = "arm"; - - blob-ext { + ti-secure { + content = <&am6xx_phycore_disable_spi_not_dtbo>; + keyfile = "custMpk.pem"; + }; + am6xx_phycore_disable_spi_not_dtbo: blob-ext { filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-disable-spi-nor.dtbo"; }; }; @@ -345,8 +351,11 @@ compression = "none"; load = <0x8F002000>; arch = "arm"; - - blob-ext { + ti-secure { + content = <&am6xx_phycore_disable_eth_phy_dtbo>; + keyfile = "custMpk.pem"; + }; + am6xx_phycore_disable_eth_phy_dtbo: blob-ext { filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-disable-eth-phy.dtbo"; }; }; @@ -357,8 +366,11 @@ compression = "none"; load = <0x8F003000>; arch = "arm"; - - blob-ext { + ti-secure { + content = <&am6xx_phycore_disable_qspi_nor_dtbo>; + keyfile = "custMpk.pem"; + }; + am6xx_phycore_disable_qspi_nor_dtbo: blob-ext { filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-qspi-nor.dtbo"; }; }; From b78f8677cde8b1dde31b66f5b780f2e9b62fba7f Mon Sep 17 00:00:00 2001 From: Daniel Schultz Date: Mon, 10 Feb 2025 22:42:05 -0800 Subject: [PATCH 12/47] arch: arm: dts: k3-am642-phycore-som-binman: Add custMpk to overlays There are some device-tree overlays with missing entries for the keyfile. Add them to sign all images in the U-Boot FIT image. Signed-off-by: Daniel Schultz Reviewed-by: Wadim Egorov --- arch/arm/dts/k3-am642-phycore-som-binman.dtsi | 28 +++++++++++++------ 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/arch/arm/dts/k3-am642-phycore-som-binman.dtsi b/arch/arm/dts/k3-am642-phycore-som-binman.dtsi index 3710564cd4a..5228eed19bf 100644 --- a/arch/arm/dts/k3-am642-phycore-som-binman.dtsi +++ b/arch/arm/dts/k3-am642-phycore-som-binman.dtsi @@ -363,8 +363,11 @@ compression = "none"; load = <0x8F000000>; arch = "arm"; - - blob-ext { + ti-secure { + content = <&am6xx_phycore_disable_rtc_dtbo>; + keyfile = "custMpk.pem"; + }; + am6xx_phycore_disable_rtc_dtbo: blob-ext { filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-disable-rtc.dtbo"; }; }; @@ -375,8 +378,11 @@ compression = "none"; load = <0x8F001000>; arch = "arm"; - - blob-ext { + ti-secure { + content = <&am6xx_phycore_disable_spi_not_dtbo>; + keyfile = "custMpk.pem"; + }; + am6xx_phycore_disable_spi_not_dtbo: blob-ext { filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-disable-spi-nor.dtbo"; }; }; @@ -387,8 +393,11 @@ compression = "none"; load = <0x8F002000>; arch = "arm"; - - blob-ext { + ti-secure { + content = <&am6xx_phycore_disable_eth_phy_dtbo>; + keyfile = "custMpk.pem"; + }; + am6xx_phycore_disable_eth_phy_dtbo: blob-ext { filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-disable-eth-phy.dtbo"; }; }; @@ -399,8 +408,11 @@ compression = "none"; load = <0x8F003000>; arch = "arm"; - - blob-ext { + ti-secure { + content = <&am6xx_phycore_disable_qspi_nor_dtbo>; + keyfile = "custMpk.pem"; + }; + am6xx_phycore_disable_qspi_nor_dtbo: blob-ext { filename = "dts/upstream/src/arm64/ti/k3-am6xx-phycore-qspi-nor.dtbo"; }; }; From a26e957381ecba59603a3ca455c30d6f8eae0ce7 Mon Sep 17 00:00:00 2001 From: Raymond Mao Date: Mon, 3 Feb 2025 14:08:12 -0800 Subject: [PATCH 13/47] mbedtls: fix incorrect kconfig dependencies on mbedtls Fixed the building failures when WGET_HTTPS,NET_LWIP and MBEDTLS_LIB are selected due to a few incorrect kconfig dependencies. Signed-off-by: Raymond Mao Reviewed-by: Ilias Apalodimas --- cmd/Kconfig | 1 - lib/mbedtls/Kconfig | 3 ++- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index a04fcaa0e08..642cc1116e8 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -2168,7 +2168,6 @@ config WGET_HTTPS select ASYMMETRIC_PUBLIC_KEY_SUBTYPE select X509_CERTIFICATE_PARSER select PKCS7_MESSAGE_PARSER - select MBEDTLS_LIB_CRYPTO select MBEDTLS_LIB_TLS select RSA_VERIFY_WITH_PKEY select X509_CERTIFICATE_PARSER diff --git a/lib/mbedtls/Kconfig b/lib/mbedtls/Kconfig index 35d8c507a89..bb8ac5f862b 100644 --- a/lib/mbedtls/Kconfig +++ b/lib/mbedtls/Kconfig @@ -156,6 +156,7 @@ endif # LEGACY_CRYPTO_BASIC config LEGACY_CRYPTO_CERT bool "legacy certificate libraries" + depends on LEGACY_CRYPTO select ASN1_DECODER_LEGACY if ASN1_DECODER select ASYMMETRIC_PUBLIC_KEY_LEGACY if \ ASYMMETRIC_PUBLIC_KEY_SUBTYPE @@ -491,7 +492,7 @@ config MBEDTLS_LIB_TLS depends on ASYMMETRIC_PUBLIC_KEY_MBEDTLS depends on ASN1_DECODER_MBEDTLS depends on ASYMMETRIC_PUBLIC_KEY_MBEDTLS - depends on MBEDTLS_LIB_CRYPTO + depends on MBEDTLS_LIB help Enable MbedTLS TLS library. Required for HTTPs support in wget From f13cd90762247661f9bd508303d830055e135ec0 Mon Sep 17 00:00:00 2001 From: Raymond Mao Date: Mon, 3 Feb 2025 14:08:13 -0800 Subject: [PATCH 14/47] mbedtls: access mbedtls private members in mscode and pkcs7 parser U-Boot requires to access x509_internal.h, mbedtls_sha256_context and mbedtls_sha1_context in the porting layer, and this requires to enable MBEDTLS_ALLOW_PRIVATE_ACCESS. Enable it to mscode and pkcs7_parser to fix a mbedtls internal building error when X509 is selected. Moreover, Move it to a separate file to avoid enabling it in multiple places. Signed-off-by: Raymond Mao Acked-by: Ilias Apalodimas --- include/crypto/mscode.h | 1 + include/crypto/pkcs7_parser.h | 1 + include/u-boot/sha1.h | 12 +----------- include/u-boot/sha256.h | 12 +----------- lib/mbedtls/port/mbedtls_options.h | 23 +++++++++++++++++++++++ 5 files changed, 27 insertions(+), 22 deletions(-) create mode 100644 lib/mbedtls/port/mbedtls_options.h diff --git a/include/crypto/mscode.h b/include/crypto/mscode.h index 678e69001b9..55501c22acb 100644 --- a/include/crypto/mscode.h +++ b/include/crypto/mscode.h @@ -10,6 +10,7 @@ #include #endif #if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509) +#include "mbedtls_options.h" #include #include #endif diff --git a/include/crypto/pkcs7_parser.h b/include/crypto/pkcs7_parser.h index 469c2711fa6..fd1e48da09e 100644 --- a/include/crypto/pkcs7_parser.h +++ b/include/crypto/pkcs7_parser.h @@ -12,6 +12,7 @@ #include #include #if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509) +#include "mbedtls_options.h" #include #include #include diff --git a/include/u-boot/sha1.h b/include/u-boot/sha1.h index dd66258bbe9..c2d62e9cf0f 100644 --- a/include/u-boot/sha1.h +++ b/include/u-boot/sha1.h @@ -18,17 +18,7 @@ #include #if CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO) -/* - * FIXME: - * MbedTLS define the members of "mbedtls_sha256_context" as private, - * but "state" needs to be access by arch/arm/cpu/armv8/sha1_ce_glue. - * MBEDTLS_ALLOW_PRIVATE_ACCESS needs to be enabled to allow the external - * access. - * Directly including is not allowed, - * since this will include and break the sandbox test. - */ -#define MBEDTLS_ALLOW_PRIVATE_ACCESS - +#include "mbedtls_options.h" #include #endif diff --git a/include/u-boot/sha256.h b/include/u-boot/sha256.h index d7a3403270b..2d86508332e 100644 --- a/include/u-boot/sha256.h +++ b/include/u-boot/sha256.h @@ -7,17 +7,7 @@ #include #if CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO) -/* - * FIXME: - * MbedTLS define the members of "mbedtls_sha256_context" as private, - * but "state" needs to be access by arch/arm/cpu/armv8/sha256_ce_glue. - * MBEDTLS_ALLOW_PRIVATE_ACCESS needs to be enabled to allow the external - * access. - * Directly including is not allowed, - * since this will include and break the sandbox test. - */ -#define MBEDTLS_ALLOW_PRIVATE_ACCESS - +#include "mbedtls_options.h" #include #endif diff --git a/lib/mbedtls/port/mbedtls_options.h b/lib/mbedtls/port/mbedtls_options.h new file mode 100644 index 00000000000..885ed6990b6 --- /dev/null +++ b/lib/mbedtls/port/mbedtls_options.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Internal build options for MbedTLS + * + * Copyright (c) 2025 Linaro Limited + * Author: Raymond Mao + */ + +#ifndef _MBEDTLS_OPT_H +#define _MBEDTLS_OPT_H + +/* + * FIXME: + * U-Boot/MbedTLS port requires to access a few of members which are defined + * as private in MbedTLS context. + * E.g: x509_internal.h, mbedtls_sha256_context and mbedtls_sha1_context. + * MBEDTLS_ALLOW_PRIVATE_ACCESS needs to be enabled to allow the external + * access, but directly including is not + * allowed, since this will include and break the sandbox test. + */ +#define MBEDTLS_ALLOW_PRIVATE_ACCESS + +#endif /* _MBEDTLS_OPT_H */ From ac0b1e82ff8540bd106824ddcc8919f85469c5f8 Mon Sep 17 00:00:00 2001 From: Raymond Mao Date: Mon, 3 Feb 2025 14:08:14 -0800 Subject: [PATCH 15/47] mbedtls: refactor mbedtls build for XPL Refactor the entire kconfig page for mbedtls, adapt mbedtls makefile and default config file using 'XPL_', in order to have independent mbedtls kconfig options in U-Boot Proper, SPL, TPL and VPL. User can choose legacy or mbedtls libraries for them independently. Set mbedtls native hashing libraries as default when MBEDTLS_LIB, SPL_MBEDTLS_LIB, TPL_MBEDTLS_LIB or VPL_MBEDTLS_LIB is selected. If users prefer using U-Boot legacy hashing libraries, please select MBEDTLS_LIB_HASHING_ALT, SPL_MBEDTLS_LIB_HASHING_ALT, TPL_MBEDTLS_LIB_HASHING_ALT or VPL_MBEDTLS_LIB_HASHING_ALT for U-Boot Proper, SPL, TPL and VPL respectively. Moreover, rename a few kconfig options and update their descriptions to improve the consistency of terminology. Signed-off-by: Raymond Mao Acked-by: Ilias Apalodimas --- Makefile | 2 +- lib/mbedtls/Kconfig | 805 ++++++++++++++++++++++--------- lib/mbedtls/Makefile | 44 +- lib/mbedtls/mbedtls_def_config.h | 37 +- 4 files changed, 622 insertions(+), 266 deletions(-) diff --git a/Makefile b/Makefile index b4cac995b8e..4fca315ecff 100644 --- a/Makefile +++ b/Makefile @@ -829,7 +829,7 @@ KBUILD_HOSTCFLAGS += $(if $(CONFIG_TOOLS_DEBUG),-g) UBOOTINCLUDE := \ -Iinclude \ $(if $(KBUILD_SRC), -I$(srctree)/include) \ - $(if $(CONFIG_MBEDTLS_LIB), \ + $(if $(CONFIG_$(XPL_)MBEDTLS_LIB), \ "-DMBEDTLS_CONFIG_FILE=\"mbedtls_def_config.h\"" \ -I$(srctree)/lib/mbedtls \ -I$(srctree)/lib/mbedtls/port \ diff --git a/lib/mbedtls/Kconfig b/lib/mbedtls/Kconfig index bb8ac5f862b..789721ee6cd 100644 --- a/lib/mbedtls/Kconfig +++ b/lib/mbedtls/Kconfig @@ -1,57 +1,54 @@ +# For U-Boot Proper + choice - prompt "Select crypto libraries" - default LEGACY_CRYPTO + prompt "Crypto libraries (U-Boot Proper)" + default LEGACY_HASHING_AND_CRYPTO help Select crypto libraries. - LEGACY_CRYPTO for legacy crypto libraries, + LEGACY_HASHING_AND_CRYPTO for legacy crypto libraries, MBEDTLS_LIB for MbedTLS libraries. -config LEGACY_CRYPTO +config LEGACY_HASHING_AND_CRYPTO bool "legacy crypto libraries" - select LEGACY_CRYPTO_BASIC - select LEGACY_CRYPTO_CERT + select LEGACY_HASHING + select LEGACY_CRYPTO config MBEDTLS_LIB bool "MbedTLS libraries" select MBEDTLS_LIB_X509 endchoice -if LEGACY_CRYPTO || MBEDTLS_LIB_CRYPTO_ALT +if LEGACY_HASHING_AND_CRYPTO || MBEDTLS_LIB_HASHING_ALT -config LEGACY_CRYPTO_BASIC - bool "legacy basic crypto libraries" +config LEGACY_HASHING + bool "Use U-Boot legacy hashing libraries" select MD5_LEGACY if MD5 select SHA1_LEGACY if SHA1 select SHA256_LEGACY if SHA256 select SHA512_LEGACY if SHA512 select SHA384_LEGACY if SHA384 - select SPL_MD5_LEGACY if SPL_MD5 - select SPL_SHA1_LEGACY if SPL_SHA1 - select SPL_SHA256_LEGACY if SPL_SHA256 - select SPL_SHA512_LEGACY if SPL_SHA512 - select SPL_SHA384_LEGACY if SPL_SHA384 help - Enable legacy basic crypto libraries. + Enable U-Boot legacy hashing libraries. -if LEGACY_CRYPTO_BASIC +if LEGACY_HASHING config SHA1_LEGACY bool "Enable SHA1 support with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && SHA1 + depends on LEGACY_HASHING && SHA1 help This option enables support of hashing using SHA1 algorithm with legacy crypto library. config SHA256_LEGACY bool "Enable SHA256 support with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && SHA256 + depends on LEGACY_HASHING && SHA256 help This option enables support of hashing using SHA256 algorithm with legacy crypto library. config SHA512_LEGACY bool "Enable SHA512 support with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && SHA512 + depends on LEGACY_HASHING && SHA512 default y if TI_SECURE_DEVICE && FIT_SIGNATURE help This option enables support of hashing using SHA512 algorithm @@ -59,7 +56,7 @@ config SHA512_LEGACY config SHA384_LEGACY bool "Enable SHA384 support with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && SHA384 + depends on LEGACY_HASHING && SHA384 select SHA512_LEGACY help This option enables support of hashing using SHA384 algorithm @@ -67,96 +64,16 @@ config SHA384_LEGACY config MD5_LEGACY bool "Enable MD5 support with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && MD5 + depends on LEGACY_HASHING && MD5 help This option enables support of hashing using MD5 algorithm with legacy crypto library. -if SPL +endif # LEGACY_HASHING -config SPL_SHA1_LEGACY - bool "Enable SHA1 support in SPL with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && SPL_SHA1 - help - This option enables support of hashing using SHA1 algorithm - with legacy crypto library. - -config SPL_SHA256_LEGACY - bool "Enable SHA256 support in SPL with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && SPL_SHA256 - help - This option enables support of hashing using SHA256 algorithm - with legacy crypto library. - -config SPL_SHA512_LEGACY - bool "Enable SHA512 support in SPL with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && SPL_SHA512 - help - This option enables support of hashing using SHA512 algorithm - with legacy crypto library. - -config SPL_SHA384_LEGACY - bool "Enable SHA384 support in SPL with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && SPL_SHA384 - select SPL_SHA512_LEGACY - help - This option enables support of hashing using SHA384 algorithm - with legacy crypto library. - -config SPL_MD5_LEGACY - bool "Enable MD5 support in SPL with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && SPL_MD5 - help - This option enables support of hashing using MD5 algorithm - with legacy crypto library. - -endif # SPL - -if VPL - -config VPL_SHA1_LEGACY - bool "Enable SHA1 support in VPL with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && VPL_SHA1 - help - This option enables support of hashing using SHA1 algorithm - with legacy crypto library. - -config VPL_SHA256_LEGACY - bool "Enable SHA256 support in VPL with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && VPL_SHA256 - help - This option enables support of hashing using SHA256 algorithm - with legacy crypto library. - -config VPL_SHA512_LEGACY - bool "Enable SHA512 support in VPL with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && VPL_SHA512 - help - This option enables support of hashing using SHA512 algorithm - with legacy crypto library. - -config VPL_SHA384_LEGACY - bool "Enable SHA384 support in VPL with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && VPL_SHA384 - select VPL_SHA512_LEGACY - help - This option enables support of hashing using SHA384 algorithm - with legacy crypto library. - -config VPL_MD5_LEGACY - bool "Enable MD5 support in VPL with legacy crypto library" - depends on LEGACY_CRYPTO_BASIC && VPL_MD5 - help - This option enables support of hashing using MD5 algorithm - with legacy crypto library. - -endif # VPL - -endif # LEGACY_CRYPTO_BASIC - -config LEGACY_CRYPTO_CERT +config LEGACY_CRYPTO bool "legacy certificate libraries" - depends on LEGACY_CRYPTO + depends on LEGACY_HASHING_AND_CRYPTO select ASN1_DECODER_LEGACY if ASN1_DECODER select ASYMMETRIC_PUBLIC_KEY_LEGACY if \ ASYMMETRIC_PUBLIC_KEY_SUBTYPE @@ -164,24 +81,20 @@ config LEGACY_CRYPTO_CERT select X509_CERTIFICATE_PARSER_LEGACY if X509_CERTIFICATE_PARSER select PKCS7_MESSAGE_PARSER_LEGACY if PKCS7_MESSAGE_PARSER select MSCODE_PARSER_LEGACY if MSCODE_PARSER - select SPL_ASN1_DECODER_LEGACY if SPL_ASN1_DECODER - select SPL_ASYMMETRIC_PUBLIC_KEY_LEGACY if \ - SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE - select SPL_RSA_PUBLIC_KEY_PARSER_LEGACY if SPL_RSA_PUBLIC_KEY_PARSER help Enable legacy certificate libraries. -if LEGACY_CRYPTO_CERT +if LEGACY_CRYPTO config ASN1_DECODER_LEGACY bool "ASN1 decoder with legacy certificate library" - depends on LEGACY_CRYPTO_CERT && ASN1_DECODER + depends on LEGACY_CRYPTO && ASN1_DECODER help This option chooses legacy certificate library for ASN1 decoder. config ASYMMETRIC_PUBLIC_KEY_LEGACY bool "Asymmetric public key crypto with legacy certificate library" - depends on LEGACY_CRYPTO_CERT && ASYMMETRIC_PUBLIC_KEY_SUBTYPE + depends on LEGACY_CRYPTO && ASYMMETRIC_PUBLIC_KEY_SUBTYPE help This option chooses legacy certificate library for asymmetric public key crypto algorithm. @@ -212,68 +125,41 @@ config PKCS7_MESSAGE_PARSER_LEGACY config MSCODE_PARSER_LEGACY bool "MS authenticode parser with legacy certificate library" - depends on LEGACY_CRYPTO_CERT && MSCODE_PARSER + depends on LEGACY_CRYPTO && MSCODE_PARSER select ASN1_DECODER_LEGACY help This option chooses legacy certificate library for MS authenticode parser. -if SPL - -config SPL_ASN1_DECODER_LEGACY - bool "ASN1 decoder with legacy certificate library in SPL" - depends on LEGACY_CRYPTO_CERT && SPL_ASN1_DECODER - help - This option chooses legacy certificate library for ASN1 decoder in - SPL. - -config SPL_ASYMMETRIC_PUBLIC_KEY_LEGACY - bool "Asymmetric public key crypto with legacy certificate library in SPL" - depends on LEGACY_CRYPTO_CERT && SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE - help - This option chooses legacy certificate library for asymmetric public - key crypto algorithm in SPL. - -config SPL_RSA_PUBLIC_KEY_PARSER_LEGACY - bool "RSA public key parser with legacy certificate library in SPL" - depends on SPL_ASYMMETRIC_PUBLIC_KEY_LEGACY - select SPL_ASN1_DECODER_LEGACY - help - This option chooses legacy certificate library for RSA public key - parser in SPL. - -endif # SPL - -endif # LEGACY_CRYPTO_CERT - endif # LEGACY_CRYPTO +endif # LEGACY_HASHING_AND_CRYPTO || MBEDTLS_LIB_HASHING_ALT + if MBEDTLS_LIB -config MBEDTLS_LIB_CRYPTO_ALT - bool "MbedTLS crypto alternatives" +config MBEDTLS_LIB_HASHING_ALT + bool "Replace MbedTLS native hashing with U-Boot legacy libraries" depends on MBEDTLS_LIB && !MBEDTLS_LIB_CRYPTO - select LEGACY_CRYPTO_BASIC + select LEGACY_HASHING default y if MBEDTLS_LIB && !MBEDTLS_LIB_CRYPTO help - Enable MbedTLS crypto alternatives. + Enable MbedTLS hashing alternatives and replace them with legacy hashing + libraries. + This allows user to use U-Boot legacy hashing algorithms together with + other MbedTLS modules. Mutually incompatible with MBEDTLS_LIB_CRYPTO. config MBEDTLS_LIB_CRYPTO - bool "MbedTLS crypto libraries" + bool "Use MbedTLS native crypto libraries for hashing" + default y if MBEDTLS_LIB select MD5_MBEDTLS if MD5 select SHA1_MBEDTLS if SHA1 select SHA256_MBEDTLS if SHA256 select SHA512_MBEDTLS if SHA512 select SHA384_MBEDTLS if SHA384 - select SPL_MD5_MBEDTLS if SPL_MD5 - select SPL_SHA1_MBEDTLS if SPL_SHA1 - select SPL_SHA256_MBEDTLS if SPL_SHA256 - select SPL_SHA512_MBEDTLS if SPL_SHA512 - select SPL_SHA384_MBEDTLS if SPL_SHA384 help - Enable MbedTLS crypto libraries. - Mutually incompatible with MBEDTLS_LIB_CRYPTO_ALT. + Enable MbedTLS native crypto libraries. + Mutually incompatible with MBEDTLS_LIB_HASHING_ALT. if MBEDTLS_LIB_CRYPTO @@ -345,53 +231,6 @@ config HKDF_MBEDTLS This option enables support of key derivation using HKDF algorithm with MbedTLS crypto library. -if SPL - -config SPL_SHA1_MBEDTLS - bool "Enable SHA1 support in SPL with MbedTLS crypto library" - depends on MBEDTLS_LIB_CRYPTO && SPL_SHA1 - help - This option enables support of hashing using SHA1 algorithm - with MbedTLS crypto library. - -config SPL_SHA256_MBEDTLS - bool "Enable SHA256 support in SPL with MbedTLS crypto library" - depends on MBEDTLS_LIB_CRYPTO && SPL_SHA256 - help - This option enables support of hashing using SHA256 algorithm - with MbedTLS crypto library. - -config SPL_SHA512_MBEDTLS - bool "Enable SHA512 support in SPL with MbedTLS crypto library" - depends on MBEDTLS_LIB_CRYPTO && SPL_SHA512 - help - This option enables support of hashing using SHA512 algorithm - with MbedTLS crypto library. - -config SPL_SHA384_MBEDTLS - bool "Enable SHA384 support in SPL with MbedTLS crypto library" - depends on MBEDTLS_LIB_CRYPTO && SPL_SHA384 - select SPL_SHA512 - help - This option enables support of hashing using SHA384 algorithm - with MbedTLS crypto library. - -config SPL_MD5_MBEDTLS - bool "Enable MD5 support in SPL with MbedTLS crypto library" - depends on MBEDTLS_LIB_CRYPTO && SPL_MD5 - help - This option enables support of hashing using MD5 algorithm - with MbedTLS crypto library. - -config SPL_HKDF_MBEDTLS - bool "Enable HKDF support in SPL with MbedTLS crypto library" - depends on MBEDTLS_LIB_CRYPTO - help - This option enables support of key derivation using HKDF algorithm - with MbedTLS crypto library. - -endif # SPL - endif # MBEDTLS_LIB_CRYPTO config MBEDTLS_LIB_X509 @@ -403,10 +242,6 @@ config MBEDTLS_LIB_X509 select X509_CERTIFICATE_PARSER_MBEDTLS if X509_CERTIFICATE_PARSER select PKCS7_MESSAGE_PARSER_MBEDTLS if PKCS7_MESSAGE_PARSER select MSCODE_PARSER_MBEDTLS if MSCODE_PARSER - select SPL_ASN1_DECODER_MBEDTLS if SPL_ASN1_DECODER - select SPL_ASYMMETRIC_PUBLIC_KEY_MBEDTLS if \ - SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE - select SPL_RSA_PUBLIC_KEY_PARSER_MBEDTLS if SPL_RSA_PUBLIC_KEY_PARSER help Enable MbedTLS certificate libraries. @@ -457,32 +292,6 @@ config MSCODE_PARSER_MBEDTLS This option chooses MbedTLS certificate library for MS authenticode parser. -if SPL - -config SPL_ASN1_DECODER_MBEDTLS - bool "ASN1 decoder with MbedTLS certificate library in SPL" - depends on MBEDTLS_LIB_X509 && SPL_ASN1_DECODER - help - This option chooses MbedTLS certificate library for ASN1 decoder in - SPL. - -config SPL_ASYMMETRIC_PUBLIC_KEY_MBEDTLS - bool "Asymmetric public key crypto with MbedTLS certificate library in SPL" - depends on MBEDTLS_LIB_X509 && SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE - help - This option chooses MbedTLS certificate library for asymmetric public - key crypto algorithm in SPL. - -config SPL_RSA_PUBLIC_KEY_PARSER_MBEDTLS - bool "RSA public key parser with MbedTLS certificate library in SPL" - depends on SPL_ASYMMETRIC_PUBLIC_KEY_MBEDTLS - select SPL_ASN1_DECODER_MBEDTLS - help - This option chooses MbedTLS certificate library for RSA public key - parser in SPL. - -endif # SPL - endif # MBEDTLS_LIB_X509 config MBEDTLS_LIB_TLS @@ -491,10 +300,546 @@ config MBEDTLS_LIB_TLS depends on X509_CERTIFICATE_PARSER_MBEDTLS depends on ASYMMETRIC_PUBLIC_KEY_MBEDTLS depends on ASN1_DECODER_MBEDTLS - depends on ASYMMETRIC_PUBLIC_KEY_MBEDTLS depends on MBEDTLS_LIB help Enable MbedTLS TLS library. Required for HTTPs support in wget endif # MBEDTLS_LIB + +# For SPL + +if SPL + +choice + prompt "Crypto libraries (SPL)" + default SPL_LEGACY_HASHING_AND_CRYPTO + help + Select crypto libraries in SPL. + SPL_LEGACY_HASHING_AND_CRYPTO for legacy crypto libraries, + SPL_MBEDTLS_LIB for MbedTLS libraries. + +config SPL_LEGACY_HASHING_AND_CRYPTO + bool "legacy crypto libraries" + select SPL_LEGACY_HASHING + select SPL_LEGACY_CRYPTO + +config SPL_MBEDTLS_LIB + bool "MbedTLS libraries" + select SPL_MBEDTLS_LIB_X509 +endchoice + +if SPL_LEGACY_HASHING_AND_CRYPTO || SPL_MBEDTLS_LIB_HASHING_ALT + +config SPL_LEGACY_HASHING + bool "Use U-Boot legacy hashing libraries (SPL)" + select SPL_MD5_LEGACY if SPL_MD5 + select SPL_SHA1_LEGACY if SPL_SHA1 + select SPL_SHA256_LEGACY if SPL_SHA256 + select SPL_SHA512_LEGACY if SPL_SHA512 + select SPL_SHA384_LEGACY if SPL_SHA384 + help + Enable U-Boot legacy hashing libraries in SPL. + +if SPL_LEGACY_HASHING + +config SPL_SHA1_LEGACY + bool "Enable SHA1 support with legacy crypto library (SPL)" + depends on SPL_LEGACY_HASHING && SPL_SHA1 + help + This option enables support of hashing using SHA1 algorithm + with legacy crypto library in SPL. + +config SPL_SHA256_LEGACY + bool "Enable SHA256 support with legacy crypto library (SPL)" + depends on SPL_LEGACY_HASHING && SPL_SHA256 + help + This option enables support of hashing using SHA256 algorithm + with legacy crypto library in SPL. + +config SPL_SHA512_LEGACY + bool "Enable SHA512 support with legacy crypto library (SPL)" + depends on SPL_LEGACY_HASHING && SPL_SHA512 + help + This option enables support of hashing using SHA512 algorithm + with legacy crypto library in SPL. + +config SPL_SHA384_LEGACY + bool "Enable SHA384 support with legacy crypto library (SPL)" + depends on SPL_LEGACY_HASHING && SPL_SHA384 + select SPL_SHA512_LEGACY + help + This option enables support of hashing using SHA384 algorithm + with legacy crypto library in SPL. + +config SPL_MD5_LEGACY + bool "Enable MD5 support with legacy crypto library (SPL)" + depends on SPL_LEGACY_HASHING && SPL_MD5 + help + This option enables support of hashing using MD5 algorithm + with legacy crypto library in SPL. + +endif # SPL_LEGACY_HASHING + +config SPL_LEGACY_CRYPTO + bool "legacy certificate libraries (SPL)" + depends on SPL_LEGACY_HASHING_AND_CRYPTO + select SPL_ASN1_DECODER_LEGACY if SPL_ASN1_DECODER + select SPL_ASYMMETRIC_PUBLIC_KEY_LEGACY if \ + SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE + select SPL_RSA_PUBLIC_KEY_PARSER_LEGACY if SPL_RSA_PUBLIC_KEY_PARSER + help + Enable legacy certificate libraries in SPL. + +if SPL_LEGACY_CRYPTO + +config SPL_ASN1_DECODER_LEGACY + bool "ASN1 decoder with legacy certificate library (SPL)" + depends on SPL_LEGACY_CRYPTO && SPL_ASN1_DECODER + help + This option chooses legacy certificate library for ASN1 decoder in + SPL. + +config SPL_ASYMMETRIC_PUBLIC_KEY_LEGACY + bool "Asymmetric public key crypto with legacy certificate library (SPL)" + depends on SPL_LEGACY_CRYPTO && SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE + help + This option chooses legacy certificate library for asymmetric public + key crypto algorithm in SPL. + +config SPL_RSA_PUBLIC_KEY_PARSER_LEGACY + bool "RSA public key parser with legacy certificate library (SPL)" + depends on SPL_ASYMMETRIC_PUBLIC_KEY_LEGACY + select SPL_ASN1_DECODER_LEGACY + help + This option chooses legacy certificate library for RSA public key + parser in SPL. + +endif # SPL_LEGACY_CRYPTO + +endif # SPL_LEGACY_HASHING_AND_CRYPTO || SPL_MBEDTLS_LIB_HASHING_ALT + +if SPL_MBEDTLS_LIB + +config SPL_MBEDTLS_LIB_HASHING_ALT + bool "Replace MbedTLS native hashing with U-Boot legacy libraries (SPL)" + depends on SPL_MBEDTLS_LIB && !SPL_MBEDTLS_LIB_CRYPTO + select SPL_LEGACY_HASHING + default y if SPL_MBEDTLS_LIB && !SPL_MBEDTLS_LIB_CRYPTO + help + Enable MbedTLS hashing alternatives and replace them with legacy hashing + libraries in SPL. + This allows user to use U-Boot legacy hashing algorithms together with + other MbedTLS modules. + Mutually incompatible with SPL_MBEDTLS_LIB_CRYPTO. + +config SPL_MBEDTLS_LIB_CRYPTO + bool "Use MbedTLS native crypto libraries for hashing (SPL)" + default y if SPL_MBEDTLS_LIB + select SPL_MD5_MBEDTLS if SPL_MD5 + select SPL_SHA1_MBEDTLS if SPL_SHA1 + select SPL_SHA256_MBEDTLS if SPL_SHA256 + select SPL_SHA512_MBEDTLS if SPL_SHA512 + select SPL_SHA384_MBEDTLS if SPL_SHA384 + help + Enable MbedTLS native crypto libraries in SPL. + +if SPL_MBEDTLS_LIB_CRYPTO + +config SPL_SHA1_MBEDTLS + bool "Enable SHA1 support with MbedTLS crypto library (SPL)" + depends on SPL_MBEDTLS_LIB_CRYPTO && SPL_SHA1 + help + This option enables support of hashing using SHA1 algorithm + with MbedTLS crypto library in SPL. + +config SPL_SHA256_MBEDTLS + bool "Enable SHA256 support with MbedTLS crypto library (SPL)" + depends on SPL_MBEDTLS_LIB_CRYPTO && SPL_SHA256 + help + This option enables support of hashing using SHA256 algorithm + with MbedTLS crypto library in SPL. + +config SPL_SHA512_MBEDTLS + bool "Enable SHA512 support with MbedTLS crypto library (SPL)" + depends on SPL_MBEDTLS_LIB_CRYPTO && SPL_SHA512 + help + This option enables support of hashing using SHA512 algorithm + with MbedTLS crypto library in SPL. + +config SPL_SHA384_MBEDTLS + bool "Enable SHA384 support with MbedTLS crypto library (SPL)" + depends on SPL_MBEDTLS_LIB_CRYPTO && SPL_SHA384 + select SPL_SHA512 + help + This option enables support of hashing using SHA384 algorithm + with MbedTLS crypto library in SPL. + +config SPL_MD5_MBEDTLS + bool "Enable MD5 support with MbedTLS crypto library (SPL)" + depends on SPL_MBEDTLS_LIB_CRYPTO && SPL_MD5 + help + This option enables support of hashing using MD5 algorithm + with MbedTLS crypto library in SPL. + +config SPL_HKDF_MBEDTLS + bool "Enable HKDF support with MbedTLS crypto library (SPL)" + depends on SPL_MBEDTLS_LIB_CRYPTO + help + This option enables support of key derivation using HKDF algorithm + with MbedTLS crypto library in SPL. + +endif # SPL_MBEDTLS_LIB_CRYPTO + +config SPL_MBEDTLS_LIB_X509 + bool "MbedTLS certificate libraries (SPL)" + select SPL_ASN1_DECODER_MBEDTLS if SPL_ASN1_DECODER + select SPL_ASYMMETRIC_PUBLIC_KEY_MBEDTLS if \ + SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE + select SPL_RSA_PUBLIC_KEY_PARSER_MBEDTLS if SPL_RSA_PUBLIC_KEY_PARSER + help + Enable MbedTLS certificate libraries in SPL. + +if SPL_MBEDTLS_LIB_X509 + +config SPL_ASN1_DECODER_MBEDTLS + bool "ASN1 decoder with MbedTLS certificate library (SPL)" + depends on SPL_MBEDTLS_LIB_X509 && SPL_ASN1_DECODER + help + This option chooses MbedTLS certificate library for ASN1 decoder in + SPL. + +config SPL_ASYMMETRIC_PUBLIC_KEY_MBEDTLS + bool "Asymmetric public key crypto with MbedTLS certificate library (SPL)" + depends on SPL_MBEDTLS_LIB_X509 && SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE + help + This option chooses MbedTLS certificate library for asymmetric public + key crypto algorithm in SPL. + +config SPL_RSA_PUBLIC_KEY_PARSER_MBEDTLS + bool "RSA public key parser with MbedTLS certificate library (SPL)" + depends on SPL_ASYMMETRIC_PUBLIC_KEY_MBEDTLS + select SPL_ASN1_DECODER_MBEDTLS + help + This option chooses MbedTLS certificate library for RSA public key + parser in SPL. + +endif # SPL_MBEDTLS_LIB_X509 + +config SPL_MBEDTLS_LIB_TLS + bool "MbedTLS TLS library (SPL)" + depends on SPL_RSA_PUBLIC_KEY_PARSER_MBEDTLS + depends on SPL_X509_CERTIFICATE_PARSER_MBEDTLS + depends on SPL_ASYMMETRIC_PUBLIC_KEY_MBEDTLS + depends on SPL_ASN1_DECODER_MBEDTLS + depends on SPL_MBEDTLS_LIB + help + Enable MbedTLS TLS library in SPL. Required for HTTPs support + in wget + +endif # SPL_MBEDTLS_LIB + +endif # SPL + +# For TPL + +if TPL + +choice + prompt "Crypto libraries (TPL)" + default TPL_LEGACY_HASHING_AND_CRYPTO + help + Select crypto libraries in TPL. + TPL_LEGACY_HASHING_AND_CRYPTO for legacy crypto libraries, + TPL_MBEDTLS_LIB for MbedTLS libraries. + +config TPL_LEGACY_HASHING_AND_CRYPTO + bool "legacy crypto libraries" + select TPL_LEGACY_HASHING + select TPL_LEGACY_CRYPTO + +config TPL_MBEDTLS_LIB + bool "MbedTLS libraries" + +endchoice + +if TPL_LEGACY_HASHING_AND_CRYPTO || TPL_MBEDTLS_LIB_HASHING_ALT + +config TPL_LEGACY_HASHING + bool "Use U-Boot legacy hashing libraries (TPL)" + select TPL_MD5_LEGACY if TPL_MD5 + select TPL_SHA1_LEGACY if TPL_SHA1 + select TPL_SHA256_LEGACY if TPL_SHA256 + select TPL_SHA512_LEGACY if TPL_SHA512 + select TPL_SHA384_LEGACY if TPL_SHA384 + help + Enable U-Boot legacy hashing libraries in TPL. + +if TPL_LEGACY_HASHING + +config TPL_SHA1_LEGACY + bool "Enable SHA1 support with legacy crypto library (TPL)" + depends on TPL_LEGACY_HASHING && TPL_SHA1 + help + This option enables support of hashing using SHA1 algorithm + with legacy crypto library in TPL. + +config TPL_SHA256_LEGACY + bool "Enable SHA256 support with legacy crypto library (TPL)" + depends on TPL_LEGACY_HASHING && TPL_SHA256 + help + This option enables support of hashing using SHA256 algorithm + with legacy crypto library in TPL. + +config TPL_SHA512_LEGACY + bool "Enable SHA512 support with legacy crypto library (TPL)" + depends on TPL_LEGACY_HASHING && TPL_SHA512 + help + This option enables support of hashing using SHA512 algorithm + with legacy crypto library in TPL. + +config TPL_SHA384_LEGACY + bool "Enable SHA384 support with legacy crypto library (TPL)" + depends on TPL_LEGACY_HASHING && TPL_SHA384 + select TPL_SHA512_LEGACY + help + This option enables support of hashing using SHA384 algorithm + with legacy crypto library in TPL. + +config TPL_MD5_LEGACY + bool "Enable MD5 support with legacy crypto library (TPL)" + depends on TPL_LEGACY_HASHING && TPL_MD5 + help + This option enables support of hashing using MD5 algorithm + with legacy crypto library in TPL. + +endif # TPL_LEGACY_HASHING + +endif # TPL_LEGACY_HASHING_AND_CRYPTO || TPL_MBEDTLS_LIB_HASHING_ALT + +if TPL_MBEDTLS_LIB + +config TPL_MBEDTLS_LIB_HASHING_ALT + bool "Replace MbedTLS native hashing with U-Boot legacy libraries (TPL)" + depends on TPL_MBEDTLS_LIB && !TPL_MBEDTLS_LIB_CRYPTO + select TPL_LEGACY_HASHING + default y if TPL_MBEDTLS_LIB && !TPL_MBEDTLS_LIB_CRYPTO + help + Enable MbedTLS hashing alternatives and replace them with legacy hashing + libraries in TPL. + This allows user to use U-Boot legacy hashing algorithms together with + other MbedTLS modules. + Mutually incompatible with TPL_MBEDTLS_LIB_CRYPTO. + +config TPL_MBEDTLS_LIB_CRYPTO + bool "Use MbedTLS native crypto libraries for hashing (TPL)" + default y if TPL_MBEDTLS_LIB + select TPL_MD5_MBEDTLS if TPL_MD5 + select TPL_SHA1_MBEDTLS if TPL_SHA1 + select TPL_SHA256_MBEDTLS if TPL_SHA256 + select TPL_SHA512_MBEDTLS if TPL_SHA512 + select TPL_SHA384_MBEDTLS if TPL_SHA384 + help + Enable MbedTLS native crypto libraries in TPL. + +if TPL_MBEDTLS_LIB_CRYPTO + +config TPL_SHA1_MBEDTLS + bool "Enable SHA1 support with MbedTLS crypto library (TPL)" + depends on TPL_MBEDTLS_LIB_CRYPTO && TPL_SHA1 + help + This option enables support of hashing using SHA1 algorithm + with MbedTLS crypto library in TPL. + +config TPL_SHA256_MBEDTLS + bool "Enable SHA256 support with MbedTLS crypto library (TPL)" + depends on TPL_MBEDTLS_LIB_CRYPTO && TPL_SHA256 + help + This option enables support of hashing using SHA256 algorithm + with MbedTLS crypto library in TPL. + +config TPL_SHA512_MBEDTLS + bool "Enable SHA512 support with MbedTLS crypto library (TPL)" + depends on TPL_MBEDTLS_LIB_CRYPTO && TPL_SHA512 + help + This option enables support of hashing using SHA512 algorithm + with MbedTLS crypto library in TPL. + +config TPL_SHA384_MBEDTLS + bool "Enable SHA384 support with MbedTLS crypto library (TPL)" + depends on TPL_MBEDTLS_LIB_CRYPTO && TPL_SHA384 + select TPL_SHA512 + help + This option enables support of hashing using SHA384 algorithm + with MbedTLS crypto library in TPL. + +config TPL_MD5_MBEDTLS + bool "Enable MD5 support with MbedTLS crypto library (TPL)" + depends on TPL_MBEDTLS_LIB_CRYPTO && TPL_MD5 + help + This option enables support of hashing using MD5 algorithm + with MbedTLS crypto library in TPL. + +config TPL_HKDF_MBEDTLS + bool "Enable HKDF support with MbedTLS crypto library (TPL)" + depends on TPL_MBEDTLS_LIB_CRYPTO + help + This option enables support of key derivation using HKDF algorithm + with MbedTLS crypto library in TPL. + +endif # TPL_MBEDTLS_LIB_CRYPTO + +endif # TPL_MBEDTLS_LIB + +endif # TPL + +# For VPL + +if VPL + +choice + prompt "Crypto libraries (VPL)" + default VPL_LEGACY_HASHING_AND_CRYPTO + help + Select crypto libraries in VPL. + VPL_LEGACY_HASHING_AND_CRYPTO for legacy crypto libraries, + VPL_MBEDTLS_LIB for MbedTLS libraries. + +config VPL_LEGACY_HASHING_AND_CRYPTO + bool "legacy crypto libraries" + select VPL_LEGACY_HASHING + +config VPL_MBEDTLS_LIB + bool "MbedTLS libraries" + +endchoice + +if VPL_LEGACY_HASHING_AND_CRYPTO || VPL_MBEDTLS_LIB_HASHING_ALT + +config VPL_LEGACY_HASHING + bool "Use U-Boot legacy hashing libraries (VPL)" + select VPL_MD5_LEGACY if VPL_MD5 + select VPL_SHA1_LEGACY if VPL_SHA1 + select VPL_SHA256_LEGACY if VPL_SHA256 + select VPL_SHA512_LEGACY if VPL_SHA512 + select VPL_SHA384_LEGACY if VPL_SHA384 + help + Enable U-Boot legacy hashing libraries in VPL. + +if VPL_LEGACY_HASHING + +config VPL_SHA1_LEGACY + bool "Enable SHA1 support with legacy crypto library (VPL)" + depends on VPL_LEGACY_HASHING && VPL_SHA1 + help + This option enables support of hashing using SHA1 algorithm + with legacy crypto library in VPL. + +config VPL_SHA256_LEGACY + bool "Enable SHA256 support with legacy crypto library (VPL)" + depends on VPL_LEGACY_HASHING && VPL_SHA256 + help + This option enables support of hashing using SHA256 algorithm + with legacy crypto library in VPL. + +config VPL_SHA512_LEGACY + bool "Enable SHA512 support with legacy crypto library (VPL)" + depends on VPL_LEGACY_HASHING && VPL_SHA512 + help + This option enables support of hashing using SHA512 algorithm + with legacy crypto library in VPL. + +config VPL_SHA384_LEGACY + bool "Enable SHA384 support with legacy crypto library (VPL)" + depends on VPL_LEGACY_HASHING && VPL_SHA384 + select VPL_SHA512_LEGACY + help + This option enables support of hashing using SHA384 algorithm + with legacy crypto library in VPL. + +config VPL_MD5_LEGACY + bool "Enable MD5 support with legacy crypto library (VPL)" + depends on VPL_LEGACY_HASHING && VPL_MD5 + help + This option enables support of hashing using MD5 algorithm + with legacy crypto library in VPL. + +endif # VPL_LEGACY_HASHING + +endif # VPL_LEGACY_HASHING_AND_CRYPTO || VPL_MBEDTLS_LIB_HASHING_ALT + +if VPL_MBEDTLS_LIB + +config VPL_MBEDTLS_LIB_HASHING_ALT + bool "Replace MbedTLS native hashing with U-Boot legacy libraries (VPL)" + depends on VPL_MBEDTLS_LIB && !VPL_MBEDTLS_LIB_CRYPTO + select VPL_LEGACY_HASHING + default y if VPL_MBEDTLS_LIB && !VPL_MBEDTLS_LIB_CRYPTO + help + Enable MbedTLS hashing alternatives and replace them with legacy hashing + libraries in VPL. + This allows user to use U-Boot legacy hashing algorithms together with + other MbedTLS modules. + Mutually incompatible with VPL_MBEDTLS_LIB_CRYPTO. + +config VPL_MBEDTLS_LIB_CRYPTO + bool "Use MbedTLS native crypto libraries for hashing (VPL)" + default y if VPL_MBEDTLS_LIB + select VPL_MD5_MBEDTLS if VPL_MD5 + select VPL_SHA1_MBEDTLS if VPL_SHA1 + select VPL_SHA256_MBEDTLS if VPL_SHA256 + select VPL_SHA512_MBEDTLS if VPL_SHA512 + select VPL_SHA384_MBEDTLS if VPL_SHA384 + help + Enable MbedTLS native crypto libraries in VPL. + +if VPL_MBEDTLS_LIB_CRYPTO + +config VPL_SHA1_MBEDTLS + bool "Enable SHA1 support with MbedTLS crypto library (VPL)" + depends on VPL_MBEDTLS_LIB_CRYPTO && VPL_SHA1 + help + This option enables support of hashing using SHA1 algorithm + with MbedTLS crypto library in VPL. + +config VPL_SHA256_MBEDTLS + bool "Enable SHA256 support with MbedTLS crypto library (VPL)" + depends on VPL_MBEDTLS_LIB_CRYPTO && VPL_SHA256 + help + This option enables support of hashing using SHA256 algorithm + with MbedTLS crypto library in VPL. + +config VPL_SHA512_MBEDTLS + bool "Enable SHA512 support with MbedTLS crypto library (VPL)" + depends on VPL_MBEDTLS_LIB_CRYPTO && VPL_SHA512 + help + This option enables support of hashing using SHA512 algorithm + with MbedTLS crypto library in VPL. + +config VPL_SHA384_MBEDTLS + bool "Enable SHA384 support with MbedTLS crypto library (VPL)" + depends on VPL_MBEDTLS_LIB_CRYPTO && VPL_SHA384 + select VPL_SHA512 + help + This option enables support of hashing using SHA384 algorithm + with MbedTLS crypto library in VPL. + +config VPL_MD5_MBEDTLS + bool "Enable MD5 support with MbedTLS crypto library (VPL)" + depends on VPL_MBEDTLS_LIB_CRYPTO && VPL_MD5 + help + This option enables support of hashing using MD5 algorithm + with MbedTLS crypto library in VPL. + +config VPL_HKDF_MBEDTLS + bool "Enable HKDF support with MbedTLS crypto library (VPL)" + depends on VPL_MBEDTLS_LIB_CRYPTO + help + This option enables support of key derivation using HKDF algorithm + with MbedTLS crypto library in VPL. + +endif # VPL_MBEDTLS_LIB_CRYPTO + +endif # VPL_MBEDTLS_LIB + +endif # VPL diff --git a/lib/mbedtls/Makefile b/lib/mbedtls/Makefile index e66c2018d97..4bbe7ceec45 100644 --- a/lib/mbedtls/Makefile +++ b/lib/mbedtls/Makefile @@ -6,60 +6,60 @@ MBEDTLS_LIB_DIR = external/mbedtls/library # shim layer for hash -obj-$(CONFIG_$(SPL_)MD5_MBEDTLS) += md5.o -obj-$(CONFIG_$(SPL_)SHA1_MBEDTLS) += sha1.o -obj-$(CONFIG_$(SPL_)SHA256_MBEDTLS) += sha256.o -obj-$(CONFIG_$(SPL_)SHA512_MBEDTLS) += sha512.o +obj-$(CONFIG_$(XPL_)MD5_MBEDTLS) += md5.o +obj-$(CONFIG_$(XPL_)SHA1_MBEDTLS) += sha1.o +obj-$(CONFIG_$(XPL_)SHA256_MBEDTLS) += sha256.o +obj-$(CONFIG_$(XPL_)SHA512_MBEDTLS) += sha512.o # x509 libraries -obj-$(CONFIG_$(SPL_)ASYMMETRIC_PUBLIC_KEY_MBEDTLS) += \ +obj-$(CONFIG_$(XPL_)ASYMMETRIC_PUBLIC_KEY_MBEDTLS) += \ public_key.o -obj-$(CONFIG_$(SPL_)X509_CERTIFICATE_PARSER_MBEDTLS) += \ +obj-$(CONFIG_$(XPL_)X509_CERTIFICATE_PARSER_MBEDTLS) += \ x509_cert_parser.o -obj-$(CONFIG_$(SPL_)PKCS7_MESSAGE_PARSER_MBEDTLS) += pkcs7_parser.o -obj-$(CONFIG_$(SPL_)MSCODE_PARSER_MBEDTLS) += mscode_parser.o -obj-$(CONFIG_$(SPL_)RSA_PUBLIC_KEY_PARSER_MBEDTLS) += rsa_helper.o +obj-$(CONFIG_$(XPL_)PKCS7_MESSAGE_PARSER_MBEDTLS) += pkcs7_parser.o +obj-$(CONFIG_$(XPL_)MSCODE_PARSER_MBEDTLS) += mscode_parser.o +obj-$(CONFIG_$(XPL_)RSA_PUBLIC_KEY_PARSER_MBEDTLS) += rsa_helper.o # MbedTLS crypto library -obj-$(CONFIG_MBEDTLS_LIB) += mbedtls_lib_crypto.o +obj-$(CONFIG_$(XPL_)MBEDTLS_LIB) += mbedtls_lib_crypto.o mbedtls_lib_crypto-y := \ $(MBEDTLS_LIB_DIR)/platform_util.o \ $(MBEDTLS_LIB_DIR)/constant_time.o \ $(MBEDTLS_LIB_DIR)/md.o -mbedtls_lib_crypto-$(CONFIG_$(SPL_)MD5_MBEDTLS) += $(MBEDTLS_LIB_DIR)/md5.o -mbedtls_lib_crypto-$(CONFIG_$(SPL_)SHA1_MBEDTLS) += $(MBEDTLS_LIB_DIR)/sha1.o -mbedtls_lib_crypto-$(CONFIG_$(SPL_)SHA256_MBEDTLS) += \ +mbedtls_lib_crypto-$(CONFIG_$(XPL_)MD5_MBEDTLS) += $(MBEDTLS_LIB_DIR)/md5.o +mbedtls_lib_crypto-$(CONFIG_$(XPL_)SHA1_MBEDTLS) += $(MBEDTLS_LIB_DIR)/sha1.o +mbedtls_lib_crypto-$(CONFIG_$(XPL_)SHA256_MBEDTLS) += \ $(MBEDTLS_LIB_DIR)/sha256.o -mbedtls_lib_crypto-$(CONFIG_$(SPL_)SHA512_MBEDTLS) += \ +mbedtls_lib_crypto-$(CONFIG_$(XPL_)SHA512_MBEDTLS) += \ $(MBEDTLS_LIB_DIR)/sha512.o -mbedtls_lib_crypto-$(CONFIG_$(SPL_)HKDF_MBEDTLS) += \ +mbedtls_lib_crypto-$(CONFIG_$(XPL_)HKDF_MBEDTLS) += \ $(MBEDTLS_LIB_DIR)/hkdf.o # MbedTLS X509 library -obj-$(CONFIG_MBEDTLS_LIB_X509) += mbedtls_lib_x509.o +obj-$(CONFIG_$(XPL_)MBEDTLS_LIB_X509) += mbedtls_lib_x509.o mbedtls_lib_x509-y := $(MBEDTLS_LIB_DIR)/x509.o -mbedtls_lib_x509-$(CONFIG_$(SPL_)ASN1_DECODER_MBEDTLS) += \ +mbedtls_lib_x509-$(CONFIG_$(XPL_)ASN1_DECODER_MBEDTLS) += \ $(MBEDTLS_LIB_DIR)/asn1parse.o \ $(MBEDTLS_LIB_DIR)/asn1write.o \ $(MBEDTLS_LIB_DIR)/oid.o -mbedtls_lib_x509-$(CONFIG_$(SPL_)RSA_PUBLIC_KEY_PARSER_MBEDTLS) += \ +mbedtls_lib_x509-$(CONFIG_$(XPL_)RSA_PUBLIC_KEY_PARSER_MBEDTLS) += \ $(MBEDTLS_LIB_DIR)/bignum.o \ $(MBEDTLS_LIB_DIR)/bignum_core.o \ $(MBEDTLS_LIB_DIR)/rsa.o \ $(MBEDTLS_LIB_DIR)/rsa_alt_helpers.o -mbedtls_lib_x509-$(CONFIG_$(SPL_)ASYMMETRIC_PUBLIC_KEY_MBEDTLS) += \ +mbedtls_lib_x509-$(CONFIG_$(XPL_)ASYMMETRIC_PUBLIC_KEY_MBEDTLS) += \ $(MBEDTLS_LIB_DIR)/pk.o \ $(MBEDTLS_LIB_DIR)/pk_wrap.o \ $(MBEDTLS_LIB_DIR)/pkparse.o -mbedtls_lib_x509-$(CONFIG_$(SPL_)X509_CERTIFICATE_PARSER_MBEDTLS) += \ +mbedtls_lib_x509-$(CONFIG_$(XPL_)X509_CERTIFICATE_PARSER_MBEDTLS) += \ $(MBEDTLS_LIB_DIR)/x509_crl.o \ $(MBEDTLS_LIB_DIR)/x509_crt.o -mbedtls_lib_x509-$(CONFIG_$(SPL_)PKCS7_MESSAGE_PARSER_MBEDTLS) += \ +mbedtls_lib_x509-$(CONFIG_$(XPL_)PKCS7_MESSAGE_PARSER_MBEDTLS) += \ $(MBEDTLS_LIB_DIR)/pkcs7.o #mbedTLS TLS support -obj-$(CONFIG_MBEDTLS_LIB_TLS) += mbedtls_lib_tls.o +obj-$(CONFIG_$(XPL_)MBEDTLS_LIB_TLS) += mbedtls_lib_tls.o mbedtls_lib_tls-y := \ $(MBEDTLS_LIB_DIR)/mps_reader.o \ $(MBEDTLS_LIB_DIR)/mps_trace.o \ diff --git a/lib/mbedtls/mbedtls_def_config.h b/lib/mbedtls/mbedtls_def_config.h index fd440c392f9..dda3f4dd6e4 100644 --- a/lib/mbedtls/mbedtls_def_config.h +++ b/lib/mbedtls/mbedtls_def_config.h @@ -11,12 +11,12 @@ * Author: Raymond Mao */ -#if defined CONFIG_MBEDTLS_LIB +#if CONFIG_IS_ENABLED(MBEDTLS_LIB) #if CONFIG_IS_ENABLED(MD5) #define MBEDTLS_MD_C #define MBEDTLS_MD5_C -#if defined CONFIG_MBEDTLS_LIB_CRYPTO_ALT +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_HASHING_ALT) #define MBEDTLS_MD5_ALT #endif #endif @@ -24,7 +24,7 @@ #if CONFIG_IS_ENABLED(SHA1) #define MBEDTLS_MD_C #define MBEDTLS_SHA1_C -#if defined CONFIG_MBEDTLS_LIB_CRYPTO_ALT +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_HASHING_ALT) #define MBEDTLS_SHA1_ALT #endif #endif @@ -32,7 +32,7 @@ #if CONFIG_IS_ENABLED(SHA256) #define MBEDTLS_MD_C #define MBEDTLS_SHA256_C -#if defined CONFIG_MBEDTLS_LIB_CRYPTO_ALT +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_HASHING_ALT) #define MBEDTLS_SHA256_ALT #endif #if CONFIG_IS_ENABLED(SHA256_SMALLER) @@ -48,7 +48,7 @@ #if CONFIG_IS_ENABLED(SHA512) #define MBEDTLS_MD_C #define MBEDTLS_SHA512_C -#if defined CONFIG_MBEDTLS_LIB_CRYPTO_ALT +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_HASHING_ALT) #define MBEDTLS_SHA512_ALT #endif #if CONFIG_IS_ENABLED(SHA512_SMALLER) @@ -60,7 +60,7 @@ #define MBEDTLS_HKDF_C #endif -#if defined CONFIG_MBEDTLS_LIB_X509 +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509) #if CONFIG_IS_ENABLED(X509_CERTIFICATE_PARSER) #define MBEDTLS_X509_USE_C @@ -89,9 +89,9 @@ #define MBEDTLS_ASN1_WRITE_C #endif -#endif /* #if defined CONFIG_MBEDTLS_LIB_X509 */ +#endif /* #if CONFIG_IS_ENABLED(MBEDTLS_LIB_X509) */ -#if IS_ENABLED(CONFIG_MBEDTLS_LIB_TLS) +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_TLS) #include "rtc.h" /* Generic options */ @@ -106,25 +106,36 @@ #define MBEDTLS_ENTROPY_C #define MBEDTLS_NO_PLATFORM_ENTROPY #define MBEDTLS_SSL_PROTO_TLS1_2 +#if CONFIG_IS_ENABLED(X509_CERTIFICATE_PARSER) #define MBEDTLS_SSL_SERVER_NAME_INDICATION +#endif #define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED /* RSA */ +#if CONFIG_IS_ENABLED(X509_CERTIFICATE_PARSER) && \ + CONFIG_IS_ENABLED(RSA_PUBLIC_KEY_PARSER) #define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED #define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED #define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED +#endif #define MBEDTLS_GCM_C /* ECDSA */ +#if CONFIG_IS_ENABLED(ASN1_DECODER) #define MBEDTLS_ECDSA_C +#define MBEDTLS_ECP_C #define MBEDTLS_ECDH_C +#endif #define MBEDTLS_ECDSA_DETERMINISTIC #define MBEDTLS_HMAC_DRBG_C -#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED -#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED + #define MBEDTLS_CAN_ECDH #define MBEDTLS_PK_CAN_ECDSA_SIGN -#define MBEDTLS_ECP_C +#if CONFIG_IS_ENABLED(X509_CERTIFICATE_PARSER) +#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED +#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED +#endif + #define MBEDTLS_ECP_DP_SECP256K1_ENABLED #define MBEDTLS_ECP_DP_SECP192R1_ENABLED #define MBEDTLS_ECP_DP_SECP224R1_ENABLED @@ -138,6 +149,6 @@ #define MBEDTLS_ECP_DP_BP384R1_ENABLED #define MBEDTLS_ECP_DP_BP512R1_ENABLED -#endif /* #if defined CONFIG_MBEDTLS_LIB_TLS */ +#endif /* #if CONFIG_IS_ENABLED(MBEDTLS_LIB_TLS) */ -#endif /* #if defined CONFIG_MBEDTLS_LIB */ +#endif /* #if CONFIG_IS_ENABLED(MBEDTLS_LIB) */ From 4871db60824e45d70136c0879054f4a732da67b1 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Thu, 20 Feb 2025 18:31:28 +0000 Subject: [PATCH 16/47] rockchip: rk3308-rock-s0: Fix SD-card boot on v1.1 hw revision BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MMC driver set PWREN high in dwmci_init(). However, HW revision prior to v1.2 must pull GPIO4_D6 low to access sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact. Upstream Linux commit 26c100232b09 "arm64: dts: rockchip: Fix sdmmc access on rk3308-rock-s0 v1.1 boards" fixed this issue by adding a vcc_sd regulator. Include the new vcc_sd regulator in SPL and enable required Kconfig options to set GPIO4_D6 low to fix reading sdmmc on v1.1 hw revision. Fixes: 25438c40a007 ("board: rockchip: Add Radxa ROCK S0") Signed-off-by: Jonas Karlman Reviewed-by: Quentin Schulz Reviewed-by: Kever Yang --- arch/arm/dts/rk3308-rock-s0-u-boot.dtsi | 12 ++++++++++++ configs/rock-s0-rk3308_defconfig | 2 ++ 2 files changed, 14 insertions(+) diff --git a/arch/arm/dts/rk3308-rock-s0-u-boot.dtsi b/arch/arm/dts/rk3308-rock-s0-u-boot.dtsi index 84ca2ee0d5f..c8c56b17a15 100644 --- a/arch/arm/dts/rk3308-rock-s0-u-boot.dtsi +++ b/arch/arm/dts/rk3308-rock-s0-u-boot.dtsi @@ -7,6 +7,14 @@ bootph-some-ram; }; +&gpio4 { + bootph-pre-ram; +}; + +&sdmmc_2030 { + bootph-pre-ram; +}; + &uart0 { bootph-all; clock-frequency = <24000000>; @@ -16,6 +24,10 @@ bootph-all; }; +&vcc_sd { + bootph-pre-ram; +}; + &vdd_core { regulator-init-microvolt = <1015000>; }; diff --git a/configs/rock-s0-rk3308_defconfig b/configs/rock-s0-rk3308_defconfig index 0a46e7bb187..063e0b921d7 100644 --- a/configs/rock-s0-rk3308_defconfig +++ b/configs/rock-s0-rk3308_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3308-rock-s0" CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3308=y @@ -53,6 +54,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PINCTRL=y CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_BAUDRATE=1500000 From 126262b2bebe29bec9b0800844f4acc0ffc29626 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 26 Feb 2025 14:31:23 -0600 Subject: [PATCH 17/47] clk: rockchip: Correct usage of IS_ENABLED() macro These two files were using IS_ENABLED() to test for CONFIG flags but omitted the CONFIG_ prefix and so did not work as expected. Signed-off-by: Tom Rini Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3568.c | 4 ++-- drivers/clk/rockchip/clk_rk3588.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 977699d509d..533031caead 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -2680,7 +2680,7 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate) return ret; }; -#if (IS_ENABLED(OF_CONTROL)) || (!IS_ENABLED(OF_PLATDATA)) +#if (CONFIG_IS_ENABLED(OF_CONTROL)) || (!CONFIG_IS_ENABLED(OF_PLATDATA)) static int rk3568_gmac0_src_set_parent(struct clk *clk, struct clk *parent) { struct rk3568_clk_priv *priv = dev_get_priv(clk->dev); @@ -2859,7 +2859,7 @@ static int rk3568_clk_set_parent(struct clk *clk, struct clk *parent) static struct clk_ops rk3568_clk_ops = { .get_rate = rk3568_clk_get_rate, .set_rate = rk3568_clk_set_rate, -#if (IS_ENABLED(OF_CONTROL)) || (!IS_ENABLED(OF_PLATDATA)) +#if (CONFIG_IS_ENABLED(OF_CONTROL)) || (!CONFIG_IS_ENABLED(OF_PLATDATA)) .set_parent = rk3568_clk_set_parent, #endif }; diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c index 6042fc10cdb..8c3a113526f 100644 --- a/drivers/clk/rockchip/clk_rk3588.c +++ b/drivers/clk/rockchip/clk_rk3588.c @@ -1822,7 +1822,7 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate) */ #define ROCKCHIP_MMC_DELAY_ELEMENT_PSEC 60 -#if (IS_ENABLED(OF_CONTROL)) || (!IS_ENABLED(OF_PLATDATA)) +#if (CONFIG_IS_ENABLED(OF_CONTROL)) || (!CONFIG_IS_ENABLED(OF_PLATDATA)) static int __maybe_unused rk3588_dclk_vop_set_parent(struct clk *clk, struct clk *parent) { @@ -1915,7 +1915,7 @@ static int rk3588_clk_set_parent(struct clk *clk, struct clk *parent) static struct clk_ops rk3588_clk_ops = { .get_rate = rk3588_clk_get_rate, .set_rate = rk3588_clk_set_rate, -#if (IS_ENABLED(OF_CONTROL)) || (!IS_ENABLED(OF_PLATDATA)) +#if (CONFIG_IS_ENABLED(OF_CONTROL)) || (!CONFIG_IS_ENABLED(OF_PLATDATA)) .set_parent = rk3588_clk_set_parent, #endif }; From ed073246e80a494fd4323da51dc70110c0b8b422 Mon Sep 17 00:00:00 2001 From: Justin Klaassen Date: Fri, 31 Jan 2025 17:06:13 +0000 Subject: [PATCH 18/47] rockchip: nanopi-r4s: Enable second usb port and fix crash The patch enables the second USB3.0 Type-A USB port on the NanoPi R4S board, which prevents a crash when initializing the usb system in U-Boot and allows both Type-A USB ports to be used for booting. => usb start starting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: "Synchronous Abort" handler, esr 0x96000010, far 0x0 Signed-off-by: Justin Klaassen Reviewed-by: Kever Yang --- arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi index 69800cc368d..931499b084c 100644 --- a/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi +++ b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi @@ -36,3 +36,8 @@ }; }; }; + +&u2phy1_host { + phy-supply = <&vdd_5v>; + status = "okay"; +}; From a390c485756cf2b352ee781a94e47dafc7b9b2c8 Mon Sep 17 00:00:00 2001 From: Tianling Shen Date: Wed, 15 Jan 2025 13:37:05 +0800 Subject: [PATCH 19/47] rockchip: nanopi-r3s-rk3566: disable unneeded CONFIG_NVME_PCI This board does not have any NVMe slot, so disable unneeded CONFIG_NVME_PCI option. Fixes: bf4a33e725ae ("board: rockchip: add FriendlyElec NanoPi R3S") Signed-off-by: Tianling Shen Reviewed-by: Quentin Schulz Reviewed-by: Kever Yang --- configs/nanopi-r3s-rk3566_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/nanopi-r3s-rk3566_defconfig b/configs/nanopi-r3s-rk3566_defconfig index 870613f690a..16e09753a72 100644 --- a/configs/nanopi-r3s-rk3566_defconfig +++ b/configs/nanopi-r3s-rk3566_defconfig @@ -54,7 +54,6 @@ CONFIG_PHY_REALTEK=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_RTL8169=y -CONFIG_NVME_PCI=y CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y From 2c2d2f3d12cd64d98cb10c21434b981145c4c8b5 Mon Sep 17 00:00:00 2001 From: Adriano Cordova Date: Mon, 27 Jan 2025 09:34:45 -0300 Subject: [PATCH 20/47] efi_loader: efi_net: let efi_net_set_dp properly update the device path This commit fixes an use after free introduced in Commit e55a4acb54 (" efi_loader: net: set EFI bootdevice device path to HTTP when loaded from wget"). The logic in efi_net_set_dp is reworked so that when the function is invoked it not only changes the value of the static variable net_dp (this is how the function was implemented in e55a4acb54) but also updates the protocol interface of the device path protocol in case efi has started. Fixes: e55a4acb54e8 ("efi_loader: net: set EFI bootdevice device path to HTTP when loaded from wget") Signed-off-by: Adriano Cordova --- lib/efi_loader/efi_net.c | 61 ++++++++++++++++++++++++++++++++++------ 1 file changed, 52 insertions(+), 9 deletions(-) diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c index ce9272fa240..60aa076feaa 100644 --- a/lib/efi_loader/efi_net.c +++ b/lib/efi_loader/efi_net.c @@ -927,12 +927,15 @@ efi_status_t efi_net_register(void) &netobj->net); if (r != EFI_SUCCESS) goto failure_to_add_protocol; - if (!net_dp) - efi_net_set_dp("Net", NULL); - r = efi_add_protocol(&netobj->header, &efi_guid_device_path, - net_dp); + + if (net_dp) + r = efi_add_protocol(&netobj->header, &efi_guid_device_path, + net_dp); + else + r = efi_net_set_dp("Net", NULL); if (r != EFI_SUCCESS) goto failure_to_add_protocol; + r = efi_add_protocol(&netobj->header, &efi_pxe_base_code_protocol_guid, &netobj->pxe); if (r != EFI_SUCCESS) @@ -1057,18 +1060,58 @@ out_of_resources: */ efi_status_t efi_net_set_dp(const char *dev, const char *server) { - efi_free_pool(net_dp); + efi_status_t ret = EFI_SUCCESS; + struct efi_handler *phandler; + struct efi_device_path *old_net_dp, *new_net_dp; - net_dp = NULL; + old_net_dp = net_dp; + new_net_dp = NULL; if (!strcmp(dev, "Net")) - net_dp = efi_dp_from_eth(); + new_net_dp = efi_dp_from_eth(); else if (!strcmp(dev, "Http")) - net_dp = efi_dp_from_http(server); + new_net_dp = efi_dp_from_http(server); - if (!net_dp) + if (!new_net_dp) { return EFI_OUT_OF_RESOURCES; + } + + // If netobj is not started yet, end here. + if (!netobj) { + goto exit; + } + + phandler = NULL; + efi_search_protocol(&netobj->header, &efi_guid_device_path, &phandler); + + // If the device path protocol is not yet installed, install it + if (!phandler) + goto add; + + // If it is already installed, try to update it + ret = efi_reinstall_protocol_interface(&netobj->header, &efi_guid_device_path, + old_net_dp, new_net_dp); + if (ret != EFI_SUCCESS) + goto error; + + net_dp = new_net_dp; + efi_free_pool(old_net_dp); return EFI_SUCCESS; +add: + ret = efi_add_protocol(&netobj->header, &efi_guid_device_path, + new_net_dp); + if (ret != EFI_SUCCESS) + goto error; +exit: + net_dp = new_net_dp; + efi_free_pool(old_net_dp); + + return ret; +error: + // Failed, restore + efi_free_pool(new_net_dp); + + return ret; } /** From 32a6c5eac0004bcfbb75d7ff9e9d627aca0e2852 Mon Sep 17 00:00:00 2001 From: Adriano Cordova Date: Thu, 6 Feb 2025 14:40:11 -0300 Subject: [PATCH 21/47] legacy-net: wget: fix wget_info handling after new tcp legacy stack Check wget_info->buffer_size for overflow and do not clean the wget_info struct on failure, let the owner of the struct handle the error. The latter is necesary , e.g., for when a request fails because the provided buffer was too small. Signed-off-by: Adriano Cordova --- net/wget.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/net/wget.c b/net/wget.c index 0b082c61947..c73836cbc9d 100644 --- a/net/wget.c +++ b/net/wget.c @@ -53,6 +53,9 @@ static inline int store_block(uchar *src, unsigned int offset, unsigned int len) ulong store_addr = image_load_addr + offset; uchar *ptr; + // Avoid overflow + if (wget_info->buffer_size && wget_info->buffer_size < offset + len) + return -1; if (CONFIG_IS_ENABLED(LMB) && wget_info->set_bootdev) { if (store_addr < image_load_addr || lmb_read_check(store_addr, len)) { @@ -98,12 +101,6 @@ static void tcp_stream_on_closed(struct tcp_stream *tcp) net_set_state(wget_loop_state); if (wget_loop_state != NETLOOP_SUCCESS) { net_boot_file_size = 0; - if (wget_info->status_code == HTTP_STATUS_OK) { - wget_info->status_code = HTTP_STATUS_BAD; - wget_info->hdr_cont_len = 0; - if (wget_info->headers) - wget_info->headers[0] = 0; - } printf("\nwget: Transfer Fail, TCP status - %d\n", tcp->status); return; } @@ -212,6 +209,11 @@ static void tcp_stream_on_rcv_nxt_update(struct tcp_stream *tcp, u32 rx_bytes) "wget: Connected Len %lu\n", content_length); wget_info->hdr_cont_len = content_length; + if (wget_info->buffer_size && wget_info->buffer_size < wget_info->hdr_cont_len){ + tcp_stream_reset(tcp); + goto end; + } + } net_boot_file_size = rx_bytes - http_hdr_size; @@ -227,7 +229,9 @@ static int tcp_stream_rx(struct tcp_stream *tcp, u32 rx_offs, void *buf, int len if ((max_rx_pos == (u32)(-1)) || (max_rx_pos < rx_offs + len - 1)) max_rx_pos = rx_offs + len - 1; - store_block(buf, rx_offs - http_hdr_size, len); + // Avoid overflow + if (store_block(buf, rx_offs - http_hdr_size, len) < 0) + return -1; return len; } From a149456d6a5457abe0187eb38a8ccb5d1da1bf0f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=2E=20Neusch=C3=A4fer?= Date: Sun, 16 Feb 2025 22:18:12 +0100 Subject: [PATCH 22/47] net: tsec: Reorder tsec_recv and tsec_free_pkt MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is necessary for the following patch. No functional change. Signed-off-by: J. Neuschäfer Signed-off-by: Peng Fan --- drivers/net/tsec.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 6481ee24a60..b27fc322db5 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -278,6 +278,24 @@ static int tsec_send(struct udevice *dev, void *packet, int length) return result; } +static int tsec_free_pkt(struct udevice *dev, uchar *packet, int length) +{ + struct tsec_private *priv = (struct tsec_private *)dev_get_priv(dev); + u16 status; + + out_be16(&priv->rxbd[priv->rx_idx].length, 0); + + status = RXBD_EMPTY; + /* Set the wrap bit if this is the last element in the list */ + if ((priv->rx_idx + 1) == PKTBUFSRX) + status |= RXBD_WRAP; + out_be16(&priv->rxbd[priv->rx_idx].status, status); + + priv->rx_idx = (priv->rx_idx + 1) % PKTBUFSRX; + + return 0; +} + static int tsec_recv(struct udevice *dev, int flags, uchar **packetp) { struct tsec_private *priv = (struct tsec_private *)dev_get_priv(dev); @@ -307,24 +325,6 @@ static int tsec_recv(struct udevice *dev, int flags, uchar **packetp) return ret; } -static int tsec_free_pkt(struct udevice *dev, uchar *packet, int length) -{ - struct tsec_private *priv = (struct tsec_private *)dev_get_priv(dev); - u16 status; - - out_be16(&priv->rxbd[priv->rx_idx].length, 0); - - status = RXBD_EMPTY; - /* Set the wrap bit if this is the last element in the list */ - if ((priv->rx_idx + 1) == PKTBUFSRX) - status |= RXBD_WRAP; - out_be16(&priv->rxbd[priv->rx_idx].status, status); - - priv->rx_idx = (priv->rx_idx + 1) % PKTBUFSRX; - - return 0; -} - static void tsec_halt(struct udevice *dev) { struct tsec_private *priv; From 63a23cb4656703661f1f8f271ca29e2334d42520 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=2E=20Neusch=C3=A4fer?= Date: Sun, 16 Feb 2025 22:18:13 +0100 Subject: [PATCH 23/47] net: tsec: Re-arm packet buffer in error case MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When an error is detected in the TSEC receive path, the driver currently prints an error message, but leaves the corresponding packet descriptor in its old state (i.e. owned by the CPU side). As a result, the packet queue can be starved of available buffers if enough errors happen. To recover from errors, re-arm the packet buffer descriptor after an error has been detected. Errors can be provoked by changing a PHY with phy-mode = "rgmii-id" to phy-mode = "rgmii". Signed-off-by: J. Neuschäfer Signed-off-by: Peng Fan --- drivers/net/tsec.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index b27fc322db5..bd4ebdd745a 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -314,6 +314,9 @@ static int tsec_recv(struct udevice *dev, int flags, uchar **packetp) ret = length - 4; } else { printf("Got error %x\n", (status & RXBD_STATS)); + + /* Rearm the packet buffer */ + tsec_free_pkt(dev, NULL, 0); } } From 9f258e4820026790ba0dfc27030a5c66d7169973 Mon Sep 17 00:00:00 2001 From: Benjamin Lemouzy Date: Mon, 17 Feb 2025 16:36:03 +0100 Subject: [PATCH 24/47] board: freescale: fix LS1021a build Fix build error "undefined reference to `is_warm_boot'" when ls1021atsn and ls1021atwr boards are built with CONFIG_SPL=y and CONFIG_DEEP_SLEEP=n. Signed-off-by: Benjamin Lemouzy Signed-off-by: Peng Fan --- board/freescale/ls1021atsn/ls1021atsn.c | 15 ++++++++------- board/freescale/ls1021atwr/ls1021atwr.c | 15 ++++++++------- 2 files changed, 16 insertions(+), 14 deletions(-) diff --git a/board/freescale/ls1021atsn/ls1021atsn.c b/board/freescale/ls1021atsn/ls1021atsn.c index d1acccec110..c92430c0896 100644 --- a/board/freescale/ls1021atsn/ls1021atsn.c +++ b/board/freescale/ls1021atsn/ls1021atsn.c @@ -166,10 +166,9 @@ void board_init_f(ulong dummy) get_clocks(); -#if defined(CONFIG_DEEP_SLEEP) - if (is_warm_boot()) - fsl_dp_disable_console(); -#endif + if (CONFIG_IS_ENABLED(DEEP_SLEEP)) + if (is_warm_boot()) + fsl_dp_disable_console(); preloader_console_init(); @@ -187,9 +186,11 @@ void board_init_f(ulong dummy) * it from SD since it has already been reserved in memory * in last boot. */ - if (is_warm_boot()) { - second_uboot = (void (*)(void))CONFIG_TEXT_BASE; - second_uboot(); + if (CONFIG_IS_ENABLED(DEEP_SLEEP)) { + if (is_warm_boot()) { + second_uboot = (void (*)(void))CONFIG_TEXT_BASE; + second_uboot(); + } } board_init_r(NULL, 0); diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index cc9665c0410..0758e5eae25 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -417,10 +417,9 @@ void board_init_f(ulong dummy) get_clocks(); -#if defined(CONFIG_DEEP_SLEEP) - if (is_warm_boot()) - fsl_dp_disable_console(); -#endif + if (CONFIG_IS_ENABLED(DEEP_SLEEP)) + if (is_warm_boot()) + fsl_dp_disable_console(); preloader_console_init(); @@ -438,9 +437,11 @@ void board_init_f(ulong dummy) * it from SD since it has already been reserved in memeory * in last boot. */ - if (is_warm_boot()) { - second_uboot = (void (*)(void))CONFIG_TEXT_BASE; - second_uboot(); + if (CONFIG_IS_ENABLED(DEEP_SLEEP)) { + if (is_warm_boot()) { + second_uboot = (void (*)(void))CONFIG_TEXT_BASE; + second_uboot(); + } } board_init_r(NULL, 0); From ef0e979e14332e37421eb3ebe5b88c2409a8803a Mon Sep 17 00:00:00 2001 From: Benjamin Lemouzy Date: Fri, 21 Feb 2025 08:05:01 +0100 Subject: [PATCH 25/47] crypto: fsl_hash: fix flush dcache alignment in caam_hash() Loading a FIT kernel image with hash hardware acceleration enabled (CONFIG_SHA_HW_ACCEL=y) displays the following CACHE warning: [...] Trying 'kernel-1' kernel subimage [...] Verifying Hash Integrity ... sha256CACHE: Misaligned operation at range [16000128, 1673fae8] [...] Trying 'ramdisk-1' ramdisk subimage [...] Verifying Hash Integrity ... sha256CACHE: Misaligned operation at range [1676d6d4, 1737a5d4] [...] Trying 'fdt-imx6q-xxx.dtb' fdt subimage [...] Verifying Hash Integrity ... sha256CACHE: Misaligned operation at range [1673fbdc, 1674b0dc] [...] This patch fixes it. Tested on: - i.MX 6 custom board - LS1021A custom board Signed-off-by: Benjamin Lemouzy Signed-off-by: Peng Fan --- drivers/crypto/fsl/fsl_hash.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c index 79b32e2627c..b721c866095 100644 --- a/drivers/crypto/fsl/fsl_hash.c +++ b/drivers/crypto/fsl/fsl_hash.c @@ -183,6 +183,7 @@ int caam_hash(const unsigned char *pbuf, unsigned int buf_len, { int ret = 0; uint32_t *desc; + unsigned long pbuf_aligned; unsigned int size; desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE); @@ -191,8 +192,9 @@ int caam_hash(const unsigned char *pbuf, unsigned int buf_len, return -ENOMEM; } - size = ALIGN(buf_len, ARCH_DMA_MINALIGN); - flush_dcache_range((unsigned long)pbuf, (unsigned long)pbuf + size); + pbuf_aligned = ALIGN_DOWN((unsigned long)pbuf, ARCH_DMA_MINALIGN); + size = ALIGN(buf_len + ((unsigned long)pbuf - pbuf_aligned), ARCH_DMA_MINALIGN); + flush_dcache_range(pbuf_aligned, pbuf_aligned + size); inline_cnstr_jobdesc_hash(desc, pbuf, buf_len, pout, driver_hash[algo].alg_type, From a7670e6c5b0e90039ec71e2377f37ef5a5ad5ded Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Thu, 6 Feb 2025 14:45:33 +0530 Subject: [PATCH 26/47] clk: versal: Update the reference clocks as per bindings As per the bindings the reference clocks naming has changed from "pl_alt_ref_clk" to "pl_alt_ref" and "ref_clk" to "ref". Update the same in the clock driver. Also add the fallback option for older DT bindings. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20250206091533.1447234-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- drivers/clk/clk_versal.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c index 35ee56d0693..3e471670a87 100644 --- a/drivers/clk/clk_versal.c +++ b/drivers/clk/clk_versal.c @@ -679,12 +679,21 @@ static int versal_clk_probe(struct udevice *dev) debug("%s\n", __func__); - ret = versal_clock_get_freq_by_name("pl_alt_ref_clk", + ret = versal_clock_get_freq_by_name("pl_alt_ref", dev, &pl_alt_ref_clk); + if (ret == -ENODATA) { + /* Fallback to old DT binding clk name "pl_alt_ref_clk" */ + ret = versal_clock_get_freq_by_name("pl_alt_ref_clk", + dev, &pl_alt_ref_clk); + } if (ret < 0) return -EINVAL; - ret = versal_clock_get_freq_by_name("ref_clk", dev, &ref_clk); + ret = versal_clock_get_freq_by_name("ref", dev, &ref_clk); + if (ret == -ENODATA) { + /* Fallback to old DT binding clk name "ref_clk" */ + ret = versal_clock_get_freq_by_name("ref_clk", dev, &ref_clk); + } if (ret < 0) return -EINVAL; From e2ef5ff765c9603ba4232c9f85f898ad34162069 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 7 Feb 2025 07:43:23 +0100 Subject: [PATCH 27/47] xilinx: zynq: Guard code around SPL_FS_LOAD_PAYLOAD_NAME Guard code around CONFIG_SPL_FS_LOAD_PAYLOAD_NAME usage to avoid compilation failure. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/f15a9762494945814b06a71db90ee4db59dd17ed.1738910601.git.michal.simek@amd.com --- board/xilinx/zynq/board.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index a852d5b8ed5..8dbfa560423 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -179,6 +179,7 @@ void set_dfu_alt_info(char *interface, char *devstr) memset(buf, 0, sizeof(buf)); switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) { +#if defined(CONFIG_SPL_FS_LOAD_PAYLOAD_NAME) case ZYNQ_BM_SD: snprintf(buf, DFU_ALT_BUF_LEN, "mmc 0=boot.bin fat 0 1;" @@ -192,6 +193,7 @@ void set_dfu_alt_info(char *interface, char *devstr) CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, CONFIG_SYS_SPI_U_BOOT_OFFS); break; +#endif #endif default: return; From 96f47ae89a4ce16a59c14d229ff707bdeb1064f4 Mon Sep 17 00:00:00 2001 From: Padmarao Begari Date: Tue, 18 Feb 2025 10:54:19 +0530 Subject: [PATCH 28/47] clk: versal: Store driver data in data section Line 171 in README is describing that before relocation no code should use global variable because global variables are placed to BSS section which is initialized to 0 after relocation. On Versal platforms clock driver is initialized before relocation (via using dm,bootph-all flag in DT) and global variables are initialized which works if this is used only before relocation. But the variables are used after relocation too but values are zeroed which is ending up incorrect behavior. That's why place variables to data section to ensure that values are not cleared which is for now the quickest temporary solution. The correct way to do it is to move all global variables to private data to avoid it. Signed-off-by: Padmarao Begari Link: https://lore.kernel.org/r/20250218052419.1141139-1-padmarao.begari@amd.com Signed-off-by: Michal Simek --- drivers/clk/clk_versal.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c index 3e471670a87..cb98f34b5ec 100644 --- a/drivers/clk/clk_versal.c +++ b/drivers/clk/clk_versal.c @@ -106,8 +106,8 @@ struct versal_clk_priv { struct versal_clock *clk; }; -static ulong pl_alt_ref_clk; -static ulong ref_clk; +static ulong pl_alt_ref_clk __section(".data"); +static ulong ref_clk __section(".data"); struct versal_pm_query_data { u32 qid; @@ -116,8 +116,8 @@ struct versal_pm_query_data { u32 arg3; }; -static struct versal_clock *clock; -static unsigned int clock_max_idx; +static struct versal_clock *clock __section(".data"); +static unsigned int clock_max_idx __section(".data"); #define PM_QUERY_DATA 35 From f92623704e58e80814c087a10d0ee385221df20b Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 18 Feb 2025 13:43:07 +0100 Subject: [PATCH 29/47] arm64: versal2: Show major and minor silicon version ES1 silicon is 0x10 (16) and production is 0x20 (32) but correct number to see are v1.0 or v2.0 instead of v16 or v32. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/20095339334fe07f373ffae3bdbfec51f5a00dc7.1739882585.git.michal.simek@amd.com --- arch/arm/mach-versal2/include/mach/hardware.h | 3 ++- drivers/soc/soc_amd_versal2.c | 4 +++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-versal2/include/mach/hardware.h b/arch/arm/mach-versal2/include/mach/hardware.h index 42e3061a0ae..15085f941e0 100644 --- a/arch/arm/mach-versal2/include/mach/hardware.h +++ b/arch/arm/mach-versal2/include/mach/hardware.h @@ -51,7 +51,8 @@ struct crp_regs { #define PMC_TAP_VERSION (PMC_TAP + 0x4) # define PMC_VERSION_MASK GENMASK(7, 0) # define PS_VERSION_MASK GENMASK(15, 8) -# define PS_VERSION_PRODUCTION 0x20 +# define PS_VERSION_MAJOR GENMASK(7, 4) +# define PS_VERSION_MINOR GENMASK(3, 0) # define RTL_VERSION_MASK GENMASK(23, 16) # define PLATFORM_MASK GENMASK(27, 24) # define PLATFORM_VERSION_MASK GENMASK(31, 28) diff --git a/drivers/soc/soc_amd_versal2.c b/drivers/soc/soc_amd_versal2.c index 66bcb22b4fa..8507da0bd22 100644 --- a/drivers/soc/soc_amd_versal2.c +++ b/drivers/soc/soc_amd_versal2.c @@ -35,7 +35,9 @@ static int soc_amd_versal2_get_revision(struct udevice *dev, char *buf, int size { struct soc_amd_versal2_priv *priv = dev_get_priv(dev); - return snprintf(buf, size, "v%d", priv->revision); + return snprintf(buf, size, "v%d.%d", + (u32)FIELD_GET(PS_VERSION_MAJOR, priv->revision), + (u32)FIELD_GET(PS_VERSION_MINOR, priv->revision)); } static const struct soc_ops soc_amd_versal2_ops = { From e34aa2975abccf135c569e295ef5faf92327268b Mon Sep 17 00:00:00 2001 From: Greg Malysa Date: Fri, 28 Feb 2025 14:28:27 -0500 Subject: [PATCH 30/47] MAINTAINERS: Update contact information for Greg Malysa My previous address is no longer accessible, but I will continue to be involved in maintaining the ADI sc5xx platforms. This updates my contact information and hopefully avoids bouncing emails from other developers. Signed-off-by: Greg Malysa --- .mailmap | 1 + MAINTAINERS | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/.mailmap b/.mailmap index dc11775d4e7..b2c98757a71 100644 --- a/.mailmap +++ b/.mailmap @@ -42,6 +42,7 @@ Durga Challa Eugen Hristev Eugen Hristev Fabio Estevam +Greg Malysa Harini Katakam Harsha Heiko Stuebner diff --git a/MAINTAINERS b/MAINTAINERS index c1851280e6e..4e90a888b94 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -615,7 +615,7 @@ F: arch/arm/dts/am335x-sancloud* ARM SC5XX M: Nathan Barrett-Morrison -M: Greg Malysa +M: Greg Malysa M: Ian Roberts M: Vasileios Bimpikas M: Utsav Agarwal From 7e0370f37d242f45d2fcfa3ab727d48f88ccace9 Mon Sep 17 00:00:00 2001 From: Weijie Gao Date: Sat, 25 Jan 2025 23:26:32 +0800 Subject: [PATCH 31/47] miiphy: define mii_devs with LIST_HEAD() When enabling net console and console multiplexing, a boot crash was observed using mtk_eth driver with stdin/stdout set to "serial,nc" in persistent environment: > CPU: MediaTek MT7981 > Model: OpenWrt One > DRAM: 1 GiB > Core: 35 devices, 15 uclasses, devicetree: separate > spi-nand: spi_nand spi_nand@0: Winbond SPI NAND was found. > spi-nand: spi_nand spi_nand@0: 128 MiB, block size: 128 KiB, page size: 2048, OOB size: 64 > Loading Environment from UBI... SF: Detected w25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB > mtd: partition "ubi" extends beyond the end of device "spi-nand0" -- size truncated to 0x7f00000 > Read 126976 bytes from volume ubootenv to 000000007f7bf0c0 > Read 126976 bytes from volume ubootenv2 to 000000007f7de100 > OK > "Synchronous Abort" handler, esr 0x96000004, far 0xeafffffeea000018 > elr: 0000000041e63cd4 lr : 0000000041e1b844 (reloc) > elr: 000000007ff9ecd4 lr : 000000007ff56844 > x0 : eafffffeea000018 x1 : 000000007fb552e0 > x2 : 00000000000000fe x3 : 0000000000000000 The cause is that "serial,nc" forced the console subsystem to initialize the ethernet driver before ethernet subsystem initialization (console_init_r() is called before initr_net()). During the mtk_eth driver initialization, mdio_register() will be called, and miiphy_get_dev_by_name() will then be called. The miiphy_get_dev_by_name() will check the list "mii_devs" to see if the passed device name exists. However the mii_devs is defined without initialization: > static struct list_head mii_devs; and the actual initialization is done in the following chain: initr_net -> eth_initialize -> eth_common_init -> miiphy_init Since initr_net() hasn't be called, iterating over the mii_devs will access to physical address 0 (mii_devs.next == NULL) and will cause the crash. The fix is to define mii_devs using: > static LIST_HEAD(mii_devs); As the "current_mii" is defined as a static variable, it will always be NULL in board_r stage and initializing it will NULL is unnecessary. So the entire miiphy_init() can be remove. Signed-off-by: Weijie Gao --- common/miiphyutil.c | 12 +----------- include/miiphy.h | 2 -- net/eth_common.c | 5 ----- 3 files changed, 1 insertion(+), 18 deletions(-) diff --git a/common/miiphyutil.c b/common/miiphyutil.c index 9b8744e5d8b..6169ea884ae 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -30,7 +30,7 @@ #define debug(fmt, args...) #endif /* MII_DEBUG */ -static struct list_head mii_devs; +static LIST_HEAD(mii_devs); static struct mii_dev *current_mii; /* @@ -55,16 +55,6 @@ struct mii_dev *miiphy_get_dev_by_name(const char *devname) return NULL; } -/***************************************************************************** - * - * Initialize global data. Need to be called before any other miiphy routine. - */ -void miiphy_init(void) -{ - INIT_LIST_HEAD(&mii_devs); - current_mii = NULL; -} - struct mii_dev *mdio_alloc(void) { struct mii_dev *bus; diff --git a/include/miiphy.h b/include/miiphy.h index 1e6c7041fdc..63ec3bcc76b 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -33,8 +33,6 @@ int miiphy_is_1000base_x(const char *devname, unsigned char addr); int miiphy_link(const char *devname, unsigned char addr); #endif -void miiphy_init(void); - int miiphy_set_current_dev(const char *devname); const char *miiphy_get_current_dev(void); struct mii_dev *mdio_get_current_dev(void); diff --git a/net/eth_common.c b/net/eth_common.c index 89b5bb37189..ba57d836b0b 100644 --- a/net/eth_common.c +++ b/net/eth_common.c @@ -31,11 +31,6 @@ int eth_env_set_enetaddr_by_index(const char *base_name, int index, void eth_common_init(void) { bootstage_mark(BOOTSTAGE_ID_NET_ETH_START); -#if CONFIG_IS_ENABLED(ETH) -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB) - miiphy_init(); -#endif -#endif } int eth_mac_skip(int index) From 4164289db882ea50c694a456af623b0ab16495ef Mon Sep 17 00:00:00 2001 From: Stefan Eichenberger Date: Mon, 3 Mar 2025 19:16:03 +0100 Subject: [PATCH 32/47] board: verdin-am62: fix missing memory fixup call The commit bc07851897bd ("board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled") broke DRAM support for the Verdin AM62. This was partially fixed with commit 3f866c47b582 ("board: verdin-am62: add dram_init_banksize"). However, because fixup_memory_node was not called, the Linux kernel was started with the wrong memory size on modules with less memory available. This resulted in boot failures. Fix this issue by calling fixup_memory_node in the board file. spl_perform_fixups will be called in the SPL and now sets the correct memory size in the device tree of U-Boot by calling fixup_memory_node. U-Boot will then adjust the memory sizes of Linux during bootm/booti in fdt_fixup_memory_banks. This chain ensures that U-Boot and Linux only use RAM that is actually available. Fixes: 3f866c47b582 ("board: verdin-am62: add dram_init_banksize") Fixes: bc07851897bd ("board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled") Signed-off-by: Stefan Eichenberger Acked-by: Francesco Dolcini --- board/toradex/verdin-am62/verdin-am62.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/board/toradex/verdin-am62/verdin-am62.c b/board/toradex/verdin-am62/verdin-am62.c index b80b39b6767..a1c471111a0 100644 --- a/board/toradex/verdin-am62/verdin-am62.c +++ b/board/toradex/verdin-am62/verdin-am62.c @@ -15,6 +15,7 @@ #include #include #include +#include #include "../common/tdx-cfg-block.h" @@ -43,6 +44,9 @@ int dram_init_banksize(void) if (ret) printf("Error setting up memory banksize. %d\n", ret); + /* Use the detected RAM size, we only support 1 bank right now. */ + gd->bd->bi_dram[0].size = gd->ram_size; + return ret; } @@ -108,6 +112,13 @@ int board_late_init(void) #define CORE_VOLTAGE 0x80000000 #define MCU_CTRL_LFXOSC_32K_BYPASS_VAL BIT(4) +#if IS_ENABLED(CONFIG_XPL_BUILD) +void spl_perform_fixups(struct spl_image_info *spl_image) +{ + fixup_memory_node(spl_image); +} +#endif + #ifdef CONFIG_SPL_BOARD_INIT void spl_board_init(void) { From cd48a21dbde69053894bfaefa3870f2054c91801 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 26 Feb 2025 09:26:14 -0700 Subject: [PATCH 33/47] Revert "dm: core: Simplify dm_probe_devices()" Unfortunately this change was not safe as some devices are bound before relocation, but we don't want to probe them. It causes 'raise: Signal # 8 caught' on jerry. Move the bootstage timer to after autoprobe in initf_dm() since the trace test does not tolerate any variance. This reverts commit 21dd873572a01d74bfdfceb7a30b056f8ccba187. Signed-off-by: Simon Glass --- common/board_f.c | 2 +- drivers/core/root.c | 17 ++++++++++++----- 2 files changed, 13 insertions(+), 6 deletions(-) diff --git a/common/board_f.c b/common/board_f.c index 6c5c3bfab48..99616fdac80 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -822,13 +822,13 @@ static int initf_dm(void) bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f"); ret = dm_init_and_scan(true); - bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F); if (ret) return ret; ret = dm_autoprobe(); if (ret) return ret; + bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F); if (IS_ENABLED(CONFIG_TIMER_EARLY)) { ret = dm_timer_init(); diff --git a/drivers/core/root.c b/drivers/core/root.c index 15b8c83fee9..e53381e3b32 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -295,22 +295,29 @@ void *dm_priv_to_rw(void *priv) * all its children recursively to do the same. * * @dev: Device to (maybe) probe + * @pre_reloc_only: Probe only devices marked with the DM_FLAG_PRE_RELOC flag * Return 0 if OK, -ve on error */ -static int dm_probe_devices(struct udevice *dev) +static int dm_probe_devices(struct udevice *dev, bool pre_reloc_only) { + ofnode node = dev_ofnode(dev); struct udevice *child; + int ret; + + if (pre_reloc_only && + (!ofnode_valid(node) || !ofnode_pre_reloc(node)) && + !(dev->driver->flags & DM_FLAG_PRE_RELOC)) + goto probe_children; if (dev_get_flags(dev) & DM_FLAG_PROBE_AFTER_BIND) { - int ret; - ret = device_probe(dev); if (ret) return ret; } +probe_children: list_for_each_entry(child, &dev->child_head, sibling_node) - dm_probe_devices(child); + dm_probe_devices(child, pre_reloc_only); return 0; } @@ -319,7 +326,7 @@ int dm_autoprobe(void) { int ret; - ret = dm_probe_devices(gd->dm_root); + ret = dm_probe_devices(gd->dm_root, !(gd->flags & GD_FLG_RELOC)); if (ret) return log_msg_ret("pro", ret); From 3ff97659ae9ff97aa3de0739b2d32a2d9b689528 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 26 Feb 2025 09:26:15 -0700 Subject: [PATCH 34/47] samsung: snow: Use BLOBLIST_FIXED Snow requires a fixed bloblist to operate, so re-enable this option. Signed-off-by: Simon Glass Fixes: 864106f3c47 ("bloblist: Make BLOBLIST_ALLOC the default") --- configs/snow_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 7a1dc80b1cc..f9fd76daa67 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -33,7 +33,9 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_PBSIZE=1024 CONFIG_SILENT_CONSOLE=y CONFIG_BLOBLIST=y +CONFIG_BLOBLIST_FIXED=y # CONFIG_SPL_BLOBLIST is not set +CONFIG_BLOBLIST_ADDR=0x43d00000 # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3800 From 91fa9d9ed2e10d6f96a80b9655c105fe99592519 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 26 Feb 2025 09:26:16 -0700 Subject: [PATCH 35/47] binman: Rename Entry.end_4gb The property is named end_at_4gb so name the variable the same, to avoid confusion. Signed-off-by: Simon Glass --- tools/binman/entry.py | 2 +- tools/binman/etype/section.py | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/tools/binman/entry.py b/tools/binman/entry.py index 68f8d62bba9..e506b552a8d 100644 --- a/tools/binman/entry.py +++ b/tools/binman/entry.py @@ -722,7 +722,7 @@ class Entry(object): is_elf = self.GetDefaultFilename() == self.elf_fname symbols_base = self.symbols_base - if symbols_base is None and self.GetImage()._end_4gb: + if symbols_base is None and self.GetImage()._end_at_4gb: symbols_base = 0 elf.LookupAndWriteSymbols(self.elf_fname, self, section.GetImage(), diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py index f4f48c00e87..020fd57d704 100644 --- a/tools/binman/etype/section.py +++ b/tools/binman/etype/section.py @@ -165,7 +165,7 @@ class Entry_section(Entry): self._pad_byte = 0 self._sort = False self._skip_at_start = None - self._end_4gb = False + self._end_at_4gb = False self._ignore_missing = False self._filename = None self.align_default = 0 @@ -187,9 +187,9 @@ class Entry_section(Entry): super().ReadNode() self._pad_byte = fdt_util.GetInt(self._node, 'pad-byte', 0) self._sort = fdt_util.GetBool(self._node, 'sort-by-offset') - self._end_4gb = fdt_util.GetBool(self._node, 'end-at-4gb') + self._end_at_4gb = fdt_util.GetBool(self._node, 'end-at-4gb') self._skip_at_start = fdt_util.GetInt(self._node, 'skip-at-start') - if self._end_4gb: + if self._end_at_4gb: if not self.size: self.Raise("Section size must be provided when using end-at-4gb") if self._skip_at_start is not None: From 2c252d36b8da37e5601af5421bc672474b849e97 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 26 Feb 2025 09:26:17 -0700 Subject: [PATCH 36/47] binman: Honour the skip-at-start property more faithfully A discussion on the mailing list about dealing with block offsets and binman symbols made me think that something is wrong with how Binman deals with the skip-at-start property. The feature was originally designed to handle x86 ROMs, which are mapped at the top of the address space. That seemed too specific, whereas skipping some space at the start seemed more generally useful. It has proved useful. For example, rockchip images start at block 64, so a skip-at-start of 0x8000 deals with this. But it doesn't actually work correctly, since the image_pos value does not give the actual position on the media. Fix this and update the documentation, moving it into the 'section' section. Signed-off-by: Simon Glass --- tools/binman/binman.rst | 47 +++++++++++++++++++++-------------- tools/binman/entry.py | 3 +-- tools/binman/etype/fmap.py | 4 +-- tools/binman/etype/section.py | 2 +- tools/binman/ftest.py | 26 ++++++++++--------- 5 files changed, 46 insertions(+), 36 deletions(-) diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst index 990fc295770..84b1331df5c 100644 --- a/tools/binman/binman.rst +++ b/tools/binman/binman.rst @@ -823,24 +823,6 @@ multiple-images: }; }; -end-at-4gb: - For x86 machines the ROM offsets start just before 4GB and extend - up so that the image finished at the 4GB boundary. This boolean - option can be enabled to support this. The image size must be - provided so that binman knows when the image should start. For an - 8MB ROM, the offset of the first entry would be 0xfff80000 with - this option, instead of 0 without this option. - -skip-at-start: - This property specifies the entry offset of the first entry. - - For PowerPC mpc85xx based CPU, CONFIG_TEXT_BASE is the entry - offset of the first entry. It can be 0xeff40000 or 0xfff40000 for - nor flash boot, 0x201000 for sd boot etc. - - 'end-at-4gb' property is not applicable where CONFIG_TEXT_BASE + - Image size != 4gb. - align-default: Specifies the default alignment for entries in this section if they do not specify an alignment. Note that this only applies to top-level entries @@ -957,6 +939,35 @@ filename: section in different image, since there is currently no way to share data between images other than through files. +end-at-4gb: + For x86 machines the ROM offsets start just before 4GB and extend + up so that the image finished at the 4GB boundary. This boolean + option can be enabled to support this. The image size must be + provided so that binman knows when the image should start. For an + 8MB ROM, the offset of the first entry would be 0xfff80000 with + this option, instead of 0 without this option. + +skip-at-start: + This property specifies the entry offset of the first entry in the section. + It is useful when the Binman image is written to a particular offset in the + media. It allows the offset of the first entry to be the media offset, even + though it is at the start of the image. It effectively creates a hole at the + start of the image, an implied, empty area. + + For example, if the image is written to offset 4K on the media, set + skip-at-start to 0x1000. At runtime, the Binman image will assume that it + has be written at offset 4K and all symbols and offsets will take account of + that. The image-pos values will also be adjusted. The effect is similar to + adding an empty 4K region at the start, except that Binman does not actually + output it. + + For PowerPC mpc85xx based CPU, CONFIG_TEXT_BASE is the entry + offset of the first entry. It can be 0xeff40000 or 0xfff40000 for + nor flash boot, 0x201000 for sd boot etc. + + 'end-at-4gb' property is not applicable where CONFIG_TEXT_BASE + + Image size != 4gb. + Image Properties ---------------- diff --git a/tools/binman/entry.py b/tools/binman/entry.py index e506b552a8d..bdc60e47fca 100644 --- a/tools/binman/entry.py +++ b/tools/binman/entry.py @@ -392,9 +392,8 @@ class Entry(object): """Set the value of device-tree properties calculated by binman""" state.SetInt(self._node, 'offset', self.offset) state.SetInt(self._node, 'size', self.size) - base = self.section.GetRootSkipAtStart() if self.section else 0 if self.image_pos is not None: - state.SetInt(self._node, 'image-pos', self.image_pos - base) + state.SetInt(self._node, 'image-pos', self.image_pos) if self.GetImage().allow_repack: if self.orig_offset is not None: state.SetInt(self._node, 'orig-offset', self.orig_offset, True) diff --git a/tools/binman/etype/fmap.py b/tools/binman/etype/fmap.py index 3669d91a0bc..35ca8490f79 100644 --- a/tools/binman/etype/fmap.py +++ b/tools/binman/etype/fmap.py @@ -65,7 +65,7 @@ class Entry_fmap(Entry): if entry.image_pos is None: pos = 0 else: - pos = entry.image_pos - entry.GetRootSkipAtStart() + pos = entry.image_pos # Drop @ symbols in name name = entry.name.replace('@', '') @@ -75,8 +75,6 @@ class Entry_fmap(Entry): _AddEntries(areas, subentry) else: pos = entry.image_pos - if pos is not None: - pos -= entry.section.GetRootSkipAtStart() areas.append(fmap_util.FmapArea(pos or 0, entry.size or 0, entry.name, flags)) diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py index 020fd57d704..5e11cf58d28 100644 --- a/tools/binman/etype/section.py +++ b/tools/binman/etype/section.py @@ -801,7 +801,7 @@ class Entry_section(Entry): if not entry: self._Raise("Unable to set offset/size for unknown entry '%s'" % name) - entry.SetOffsetSize(self._skip_at_start + offset if offset is not None + entry.SetOffsetSize(offset + self._skip_at_start if offset is not None else None, size) def GetEntryOffsets(self): diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index a553ca9e564..733169b99f6 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -2297,16 +2297,17 @@ class TestFunctional(unittest.TestCase): fhdr, fentries = fmap_util.DecodeFmap(data[32:]) self.assertEqual(0x100, fhdr.image_size) + base = (1 << 32) - 0x100 - self.assertEqual(0, fentries[0].offset) + self.assertEqual(base, fentries[0].offset) self.assertEqual(4, fentries[0].size) self.assertEqual(b'U_BOOT', fentries[0].name) - self.assertEqual(4, fentries[1].offset) + self.assertEqual(base + 4, fentries[1].offset) self.assertEqual(3, fentries[1].size) self.assertEqual(b'INTEL_MRC', fentries[1].name) - self.assertEqual(32, fentries[2].offset) + self.assertEqual(base + 32, fentries[2].offset) self.assertEqual(fmap_util.FMAP_HEADER_LEN + fmap_util.FMAP_AREA_LEN * 3, fentries[2].size) self.assertEqual(b'FMAP', fentries[2].name) @@ -2319,27 +2320,28 @@ class TestFunctional(unittest.TestCase): fhdr, fentries = fmap_util.DecodeFmap(data[36:]) self.assertEqual(0x180, fhdr.image_size) + base = (1 << 32) - 0x180 expect_size = fmap_util.FMAP_HEADER_LEN + fmap_util.FMAP_AREA_LEN * 4 fiter = iter(fentries) fentry = next(fiter) self.assertEqual(b'U_BOOT', fentry.name) - self.assertEqual(0, fentry.offset) + self.assertEqual(base, fentry.offset) self.assertEqual(4, fentry.size) fentry = next(fiter) self.assertEqual(b'SECTION', fentry.name) - self.assertEqual(4, fentry.offset) + self.assertEqual(base + 4, fentry.offset) self.assertEqual(0x20 + expect_size, fentry.size) fentry = next(fiter) self.assertEqual(b'INTEL_MRC', fentry.name) - self.assertEqual(4, fentry.offset) + self.assertEqual(base + 4, fentry.offset) self.assertEqual(3, fentry.size) fentry = next(fiter) self.assertEqual(b'FMAP', fentry.name) - self.assertEqual(36, fentry.offset) + self.assertEqual(base + 36, fentry.offset) self.assertEqual(expect_size, fentry.size) def testElf(self): @@ -3535,8 +3537,8 @@ class TestFunctional(unittest.TestCase): image = control.images['image'] entries = image.GetEntries() desc = entries['intel-descriptor'] - self.assertEqual(0xff800000, desc.offset); - self.assertEqual(0xff800000, desc.image_pos); + self.assertEqual(0xff800000, desc.offset) + self.assertEqual(0xff800000, desc.image_pos) def testReplaceCbfs(self): """Test replacing a single file in CBFS without changing the size""" @@ -3778,8 +3780,8 @@ class TestFunctional(unittest.TestCase): image = control.images['image'] entries = image.GetEntries() - expected_ptr = entries['intel-fit'].image_pos - (1 << 32) - self.assertEqual(expected_ptr, ptr) + expected_ptr = entries['intel-fit'].image_pos #- (1 << 32) + self.assertEqual(expected_ptr, ptr + (1 << 32)) def testPackIntelFitMissing(self): """Test detection of a FIT pointer with not FIT region""" @@ -4773,7 +4775,7 @@ class TestFunctional(unittest.TestCase): entry = image.GetEntries()['fdtmap'] self.assertEqual(orig_entry.offset, entry.offset) self.assertEqual(orig_entry.size, entry.size) - self.assertEqual(16, entry.image_pos) + self.assertEqual((1 << 32) - 0x400 + 16, entry.image_pos) u_boot = image.GetEntries()['section'].GetEntries()['u-boot'] From ebe3c3c4a8f490b3ca373001adcb9c055f70f6d0 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 26 Feb 2025 09:26:18 -0700 Subject: [PATCH 37/47] x86: Stop working around skip-at-start With a recent Binman change, the skip-at-start property is now honoured, meaning that all image-pos values in the affected section start from the skip-at-start value. The x86 code works around the old behaviour at present, so update it. Signed-off-by: Simon Glass --- arch/x86/cpu/intel_common/intel_opregion.c | 1 + arch/x86/lib/fsp2/fsp_init.c | 3 +-- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/cpu/intel_common/intel_opregion.c b/arch/x86/cpu/intel_common/intel_opregion.c index 78caff0dc12..4a2717b3584 100644 --- a/arch/x86/cpu/intel_common/intel_opregion.c +++ b/arch/x86/cpu/intel_common/intel_opregion.c @@ -31,6 +31,7 @@ static int locate_vbt(char **vbtp, int *sizep) size = vbt.size; if (size > sizeof(vbt_data)) return log_msg_ret("vbt", -E2BIG); + vbt.image_pos += CONFIG_ROM_SIZE; ret = spi_flash_read_dm(dev, vbt.image_pos, size, vbt_data); if (ret) return log_msg_ret("read", ret); diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c index 1a2bf46c5c5..0be892b14dc 100644 --- a/arch/x86/lib/fsp2/fsp_init.c +++ b/arch/x86/lib/fsp2/fsp_init.c @@ -107,7 +107,6 @@ int fsp_locate_fsp(enum fsp_type_t type, struct binman_entry *entry, bool use_spi_flash, struct udevice **devp, struct fsp_header **hdrp, ulong *rom_offsetp) { - ulong mask = CONFIG_ROM_SIZE - 1; struct udevice *dev; ulong rom_offset = 0; uint map_size; @@ -141,7 +140,7 @@ int fsp_locate_fsp(enum fsp_type_t type, struct binman_entry *entry, if (ret) return log_msg_ret("binman entry", ret); if (!use_spi_flash) - rom_offset = (map_base & mask) - CONFIG_ROM_SIZE; + rom_offset = map_base + CONFIG_ROM_SIZE; } else { ret = -ENOENT; if (false) From b6f8da1c2e1a91fbf3059bbd68e3355d76c88b42 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=2E=20Neusch=C3=A4fer?= Date: Mon, 17 Feb 2025 12:18:03 +0100 Subject: [PATCH 38/47] gpio: 74x146: depend on DM_SPI MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently, Kconfig allows building CONFIG_DM_74X164 without CONFIG_DM_SPI, which results in linker errors because this driver actually uses dm_spi_* functions: drivers/gpio/74x164_gpio.o: in function `gen_74x164_write_conf': undefined reference to `dm_spi_claim_bus' undefined reference to `dm_spi_xfer' undefined reference to `dm_spi_release_bus' Signed-off-by: J. Neuschäfer --- drivers/gpio/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index f4a453e1cdd..21361f56e69 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -516,7 +516,7 @@ config ZYNQ_GPIO config DM_74X164 bool "74x164 serial-in/parallel-out 8-bits shift register" - depends on DM_GPIO + depends on DM_GPIO && DM_SPI help Driver for 74x164 compatible serial-in/parallel-out 8-outputs shift registers, such as 74lv165, 74hc595. From 409d37e869e91453d94319792e17d1d882259b49 Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Wed, 26 Feb 2025 10:18:58 +0100 Subject: [PATCH 39/47] led: Fix next Coverity scan error The following was reported by Coverity scan: *** CID 542488: Control flow issues (NO_EFFECT) /drivers/led/led-uclass.c: 277 in led_get_function_name() 271 return uc_plat->label; 272 273 /* Now try to detect function label name */ 274 func = dev_read_string(dev, "function"); 275 cp = dev_read_u32(dev, "color", &color); 276 // prevent coverity scan error CID 541279: (TAINTED_SCALAR) >>> CID 542488: Control flow issues (NO_EFFECT) >>> This less-than-zero comparison of an unsigned value is never true. "color < 0U". 277 if (color < LED_COLOR_ID_WHITE || color >= LED_COLOR_ID_MAX) 278 cp = -EINVAL; 279 Fix it. Addresses-Coverity-ID: 542488 Link: https://lists.denx.de/pipermail/u-boot/2025-February/581567.html Signed-off-by: Heiko Schocher Reviewed-by: Quentin Schulz --- drivers/led/led-uclass.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c index 22f61d12d38..edcdeee1e9a 100644 --- a/drivers/led/led-uclass.c +++ b/drivers/led/led-uclass.c @@ -273,8 +273,12 @@ static const char *led_get_function_name(struct udevice *dev) /* Now try to detect function label name */ func = dev_read_string(dev, "function"); cp = dev_read_u32(dev, "color", &color); - // prevent coverity scan error CID 541279: (TAINTED_SCALAR) - if (color < LED_COLOR_ID_WHITE || color >= LED_COLOR_ID_MAX) + /* + * prevent coverity scan error CID 541279: (TAINTED_SCALAR) + * only check the upper bound. No need to check the lower bound + * as color is from type u32 and never can be lower than 0. + */ + if (color >= LED_COLOR_ID_MAX) cp = -EINVAL; if (cp == 0 || func) { From 8d2d615f14435c8d2d4e80509310691443b3a3d5 Mon Sep 17 00:00:00 2001 From: Padmarao Begari Date: Tue, 4 Mar 2025 10:00:30 +0530 Subject: [PATCH 40/47] xilinx: Remove tftp block size 4096 The zynqmp gem driver support max MTU size 1536, so remove tftp block size 4096 from defconfig and use default tftp block size. Fixes: a33b4b96b3cf ("xilinx: Enable MBEDTLS/LWIP/WGET and WGET_HTTPS") Signed-off-by: Padmarao Begari Link: https://lore.kernel.org/r/20250304043030.2344536-1-padmarao.begari@amd.com Signed-off-by: Michal Simek --- configs/amd_versal2_virt_defconfig | 1 - configs/xilinx_versal_net_virt_defconfig | 1 - configs/xilinx_versal_virt_defconfig | 1 - 3 files changed, 3 deletions(-) diff --git a/configs/amd_versal2_virt_defconfig b/configs/amd_versal2_virt_defconfig index 8bee002777a..9911caa0e46 100644 --- a/configs/amd_versal2_virt_defconfig +++ b/configs/amd_versal2_virt_defconfig @@ -70,7 +70,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_LWIP=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_SIMPLE_PM_BUS=y CONFIG_CLK_CCF=y CONFIG_CLK_SCMI=y diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index 5ef5fd44fd3..1604b5915db 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -70,7 +70,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_LWIP=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_SIMPLE_PM_BUS=y CONFIG_CLK_VERSAL=y CONFIG_DFU_RAM=y diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index f228eef7c95..baa4b8e412e 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -74,7 +74,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_LWIP=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_SIMPLE_PM_BUS=y CONFIG_CLK_VERSAL=y CONFIG_DFU_TIMEOUT=y From 19715a7f031a998f8641949fbbf29a2fd1a58f0f Mon Sep 17 00:00:00 2001 From: Sumit Garg Date: Thu, 27 Feb 2025 17:39:04 +0530 Subject: [PATCH 41/47] MAINTAINERS: .mailmap: Update Sumit Garg's email address Update Sumit Garg's email address to @kernel.org. Signed-off-by: Sumit Garg --- .mailmap | 1 + MAINTAINERS | 7 ++++--- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/.mailmap b/.mailmap index b2c98757a71..ff85151702f 100644 --- a/.mailmap +++ b/.mailmap @@ -124,6 +124,7 @@ Srinivas Neeli Stefan Roese Stefano Babic Stefano Stabellini +Sumit Garg Tom Rini Tomas Thoresen TsiChung Liew diff --git a/MAINTAINERS b/MAINTAINERS index 4e90a888b94..0315c606744 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -639,7 +639,7 @@ F: include/env/adi/ ARM SNAPDRAGON M: Caleb Connolly M: Neil Armstrong -R: Sumit Garg +R: Sumit Garg L: u-boot-qcom@groups.io S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-snapdragon.git @@ -1043,9 +1043,10 @@ F: common/cyclic.c F: include/cyclic.h DEVICETREE REBASING SUBTREE -M: Sumit Garg +M: Sumit Garg S: Maintained F: dts/upstream/ +N: OF_UPSTREAM DFU M: Lukasz Majewski @@ -1451,7 +1452,7 @@ S: Maintained F: tools/patman/ PCIe DWC IMX -M: Sumit Garg +M: Sumit Garg S: Maintained F: drivers/pci/pcie_dw_imx.c F: drivers/phy/phy-imx8m-pcie.c From 31378bd6fc909afabee69f425bf663002277eecf Mon Sep 17 00:00:00 2001 From: Diederik de Haas Date: Sat, 1 Mar 2025 11:14:12 +0100 Subject: [PATCH 42/47] mcheck: Fix SPDX License Identifier to LGPL-2.1-or-later The GPL-2.1+ SPDX License Identifier doesn't exist, but luckily the full license text was available which shows that GPL-2.1+ was a typo and it should have been LGPL-2.1-or-later. As the '+' in LGPL-2.1+ is deprecated in SPDX 3.0, use the preferred identifier, which is '-or-later'. Normally the full license header is removed when switching to SPDX License Identifiers, so do that now. Signed-off-by: Diederik de Haas --- include/mcheck.h | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/include/mcheck.h b/include/mcheck.h index bd506ae6291..4b11751ebcc 100644 --- a/include/mcheck.h +++ b/include/mcheck.h @@ -1,18 +1,7 @@ -/* SPDX-License-Identifier: GPL-2.1+ */ +/* SPDX-License-Identifier: LGPL-2.1-or-later */ /* * Copyright (C) 1996-2024 Free Software Foundation, Inc. * This file is part of the GNU C Library. - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * . */ #ifndef _MCHECK_H #define _MCHECK_H 1 From e22b2d778106256b44e8ed32e6ad7a5d8fff3ebd Mon Sep 17 00:00:00 2001 From: Andrea della Porta Date: Sun, 2 Mar 2025 19:29:31 +0100 Subject: [PATCH 43/47] fs/squashfs: Fix memory leak in sqfs_size_nest() In case MAX_SYMLINK_NEST is reached while determining the size on a symlink node, the function returns immediately. This would not free the resources after the free_strings: label causing a memory leak. Set the ret value and just break out of the switch to fix this. Signed-off-by: Andrea della Porta Reviewed-by: Miquel Raynal --- fs/squashfs/sqfs.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index 8fac6c6c5a9..7c364686f14 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -1712,7 +1712,8 @@ static int sqfs_size_nest(const char *filename, loff_t *size) case SQFS_LSYMLINK_TYPE: if (++symlinknest == MAX_SYMLINK_NEST) { *size = 0; - return -ELOOP; + ret = -ELOOP; + break; } symlink = (struct squashfs_symlink_inode *)ipos; From 0fd7ee0306a88bd99d3820167fa45a7ee6fbc1e1 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 26 Feb 2025 09:33:45 -0600 Subject: [PATCH 44/47] scripts/checkpatch.pl: Upgrade IS_ENABLED_CONFIG to error for U-Boot A problem we have today is that some instances of IS_ENABLED(FOO) have crept in to the code. This is in turn because with checkpatch.pl this is only a warning and not an error, so they were overlooked. And looking deeper, in the Linux kernel this pattern is allowed because IS_ENABLED(DEFINED_FLAG) is allowed if discouraged and a quick skim of the instances I saw in the current kernel follow this pattern. In U-Boot however, this is not allowed, so bump to an error. Signed-off-by: Tom Rini --- scripts/checkpatch.pl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index b8eb57f38c7..f9f8891c0c4 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -7205,8 +7205,8 @@ sub process { # check for IS_ENABLED() without CONFIG_ ($rawline for comments too) if ($rawline =~ /\bIS_ENABLED\s*\(\s*(\w+)\s*\)/ && $1 !~ /^${CONFIG_}/) { - WARN("IS_ENABLED_CONFIG", - "IS_ENABLED($1) is normally used as IS_ENABLED(${CONFIG_}$1)\n" . $herecurr); + ERROR("IS_ENABLED_CONFIG", + "IS_ENABLED($1) must be used as IS_ENABLED(${CONFIG_}$1)\n" . $herecurr); } # check for #if defined CONFIG_ || defined CONFIG__MODULE From f5ee0f2bf7b008dc92315c10239e8d537877c0de Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 9 Mar 2025 03:05:54 +0100 Subject: [PATCH 45/47] ARM: stm32mp: Fix dram_bank_mmu_setup() for ram_top=0 On STM32MP15xx with 1 GiB of DRAM, the gd->ram_top becomes 0, because DRAM base 0xc0000000 + DRAM size 0x40000000 leads to gd->ram_top overflow which resets it to 0. Handle this special case simply by checking for gd->ram_top being zero, and if it is, assume there is no addr >= gd->ram_top . This fixes boot hang on STM32MP15xx with 1 GiB of DRAM. Fixes: 25fb58e88aba ("ARM: stm32mp: Fix dram_bank_mmu_setup() for LMB located above ram_top") Signed-off-by: Marek Vasut Reviewed-by: Patrice Chotard --- arch/arm/mach-stm32mp/stm32mp1/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c index cb1b84c9af9..d5eaf6711b6 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c +++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c @@ -82,7 +82,7 @@ void dram_bank_mmu_setup(int bank) option = DCACHE_DEFAULT_OPTION; if (use_lmb && (lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP) || - addr >= gd->ram_top) + (gd->ram_top && addr >= gd->ram_top)) ) option = 0; /* INVALID ENTRY in TLB */ set_section_dcache(i, option); From bdf41fb7b386bdf60303b7a92431467c12779c86 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 10 Mar 2025 17:30:32 -0600 Subject: [PATCH 46/47] configs: Resync with savedefconfig Resync all defconfig files using qconfig.py Signed-off-by: Tom Rini --- configs/qcom_defconfig | 2 +- configs/sandbox_defconfig | 1 - configs/sandbox_vpl_defconfig | 2 -- configs/snow_defconfig | 2 +- 4 files changed, 2 insertions(+), 5 deletions(-) diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index 9f5518a9fe9..661a484f7bf 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -45,6 +45,7 @@ CONFIG_USE_DEFAULT_ENV_FILE=y CONFIG_DEFAULT_ENV_FILE="board/qualcomm/default.env" CONFIG_BUTTON_QCOM_PMIC=y CONFIG_CLK=y +CONFIG_CLK_STUB=y CONFIG_CLK_QCOM_APQ8016=y CONFIG_CLK_QCOM_APQ8096=y CONFIG_CLK_QCOM_QCM2290=y @@ -58,7 +59,6 @@ CONFIG_CLK_QCOM_SM8550=y CONFIG_CLK_QCOM_SM8650=y CONFIG_CLK_QCOM_SC7280=y CONFIG_CLK_QCOM_X1E80100=y -CONFIG_CLK_STUB=y CONFIG_DFU_MMC=y CONFIG_DFU_SCSI=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x200000 diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 7b35ad8a88f..861a1f4cd90 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -354,7 +354,6 @@ CONFIG_ADDR_MAP=y CONFIG_PANIC_HANG=y CONFIG_CMD_DHRYSTONE=y CONFIG_MBEDTLS_LIB=y -CONFIG_MBEDTLS_LIB_CRYPTO=y CONFIG_HKDF_MBEDTLS=y CONFIG_ECDSA=y CONFIG_ECDSA_VERIFY=y diff --git a/configs/sandbox_vpl_defconfig b/configs/sandbox_vpl_defconfig index f0315f6ab33..46329395ba5 100644 --- a/configs/sandbox_vpl_defconfig +++ b/configs/sandbox_vpl_defconfig @@ -252,8 +252,6 @@ CONFIG_FS_CBFS=y CONFIG_FS_CRAMFS=y # CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_CMD_DHRYSTONE=y -CONFIG_VPL_SHA1_LEGACY=y -CONFIG_VPL_SHA256_LEGACY=y CONFIG_RSA_VERIFY_WITH_PKEY=y CONFIG_TPM=y CONFIG_ZSTD=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index f9fd76daa67..27698f5ef36 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -33,8 +33,8 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_PBSIZE=1024 CONFIG_SILENT_CONSOLE=y CONFIG_BLOBLIST=y -CONFIG_BLOBLIST_FIXED=y # CONFIG_SPL_BLOBLIST is not set +CONFIG_BLOBLIST_FIXED=y CONFIG_BLOBLIST_ADDR=0x43d00000 # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_FOOTPRINT_LIMIT=y From a383b9bd4d7e430fe7c254297540bae596649dba Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 10 Mar 2025 17:31:52 -0600 Subject: [PATCH 47/47] Prepare v2025.04-rc4 Signed-off-by: Tom Rini --- Makefile | 2 +- doc/develop/release_cycle.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index 4fca315ecff..0694c425438 100644 --- a/Makefile +++ b/Makefile @@ -3,7 +3,7 @@ VERSION = 2025 PATCHLEVEL = 04 SUBLEVEL = -EXTRAVERSION = -rc3 +EXTRAVERSION = -rc4 NAME = # *DOCUMENTATION* diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index b6ad7218614..dc5bb340ff2 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -74,7 +74,7 @@ For the next scheduled release, release candidates were made on:: * U-Boot v2025.04-rc3 was released on Mon 24 February 2025. -.. * U-Boot v2025.04-rc4 was released on Mon 10 March 2025. +* U-Boot v2025.04-rc4 was released on Mon 10 March 2025. .. * U-Boot v2025.04-rc5 was released on Mon 24 March 2025.