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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

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* 'master' of git://git.denx.de/u-boot-mpc85xx:
  powerpc/p3060: Add SoC related support for P3060 platform
  powerpc/85xx: Add support for setting up RAID engine liodns on P5020
  powerpc/85xx: Refactor some defines out of corenet_ds.h
  fm-eth: Add ability for board code to disable a port
  powerpc/mpc8548: Add workaround for erratum NMG_LBC103
  powerpc/mpc8548: Add workaround for erratum NMG_DDR120
  powerpc/mpc85xxcds: Fix PCI speed
  powerpc/mpc8548cds: Fix booting message
  powerpc/p4080: Add support for secure boot flow
  powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH
  powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards
  powerpc/p2041rdb: remove watch dog related codes
  powerpc/p2041rdb: updated description of cpld command
  powerpc/p2041rdb: add more ddr frequencies support
  powerpc/p2041rdb: set sysclk according to status of physical switch SW1
  powerpc/p2041rdb: update cpld reset command according to CPLD 2.0
  powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver
  powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver
  powerpc/mpc8xxx: Add DDR2 to unified DDR driver
  powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps()
  powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots
  powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en
  powerpc/85xx: Refactor P2041RDB to use common p_corenet files
  powerpc/85xx: refactor common P-Series CoreNet files for FSL boards
  powerpc/85xx: Enable CMD_REGINFO on corenet boards
  powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries
  powerpc/85xx: Fix USB protocol definitions for P1020RDB
  powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM
  powerpc/mpc8xxx: Move DDR RCW overriding to common code
  powerpc/mpc8xxx: Extend CWL table
  powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536
  powerpc/85xx: Cleanup extern in corenet_ds board code
  powerpc/p2041rdb: Add ethernet support on P2041RDB board
  powerpc/85xx: Add networking support to P1023RDS
  powerpc/hydra: Add ethernet support on P5020/P3041 DS boards
  powerpc/85xx: Add FMan ethernet support to P4080DS
  powerpc/85xx: Add support for FMan ethernet in Independent mode
  powerpc/mpc8548cds: Cleanup mpc8548cds.c
  powerpc/mp: add support for discontiguous cores
  powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries
  fdt: Add new fdt_create_phandle helper
  fdt: Rename fdt_create_phandle to fdt_set_phandle
  powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set
  fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
  powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC)
  fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010)
  powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M
  powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB
  nand: Freescale Integrated Flash Controller NAND support
  powerpc/85xx: Add basic support for P1010RDB
  powerpc/85xx: Add support for new P102x/P2020 RDB style boards
  powerpc/85xx: relocate CCSR before creating the initial RAM area
  powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros
  powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0
  powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
This commit is contained in:
Wolfgang Denk
2011-10-04 22:08:13 +02:00
parent c52575350f 6d7b061af1
commit 1fed668b3f
147 changed files with 12055 additions and 737 deletions
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52
doc/README.fsl-ddr
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@@ -170,3 +170,55 @@ Single slot system
Reference http://www.xrosstalkmag.com/mag_issues/xrosstalk_oct08_final.pdf
http://download.micron.com/pdf/technotes/ddr3/tn4108_ddr3_design_guide.pdf
Table for ODT for DDR2
======================
Two slots system
+-----------------------+----------+---------------+-----------------------------+-----------------------------+
| Configuration | |DRAM controller| Slot 1 | Slot 2 |
+-----------+-----------+----------+-------+-------+--------------+--------------+--------------+--------------+
| | | | | | Rank 1 | Rank 2 | Rank 1 | Rank 2 |
+ Slot 1 | Slot 2 |Write/Read| Write | Read |-------+------+-------+------+-------+------+-------+------+
| | | | | | Write | Read | Write | Read | Write | Read | Write | Read |
+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
| | | Slot 1 | off | 150 | off | off | off | off | 75 | 75 | off | off |
| Dual Rank | Dual Rank |----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
| | | Slot 2 | off | 150 | 75 | 75 | off | off | off | off | off | off |
+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
| | | Slot 1 | off | 150 | off | off | off | off | 75 | 75 | | |
| Dual Rank |Single Rank|----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
| | | Slot 2 | off | 150 | 75 | 75 | off | off | off | off | | |
+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
| | | Slot 1 | off | 150 | off | off | | | 75 | 75 | off | off |
|Single Rank| Dual Rank |----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
| | | Slot 2 | off | 150 | 75 | 75 | | | off | off | off | off |
+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
| | | Slot 1 | off | 150 | off | off | | | 75 | 75 | | |
|Single Rank|Single Rank|----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
| | | Slot 2 | off | 150 | 75 | 75 | | | off | off | | |
+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
| Dual Rank | Empty | Slot 1 | off | 75 | 150 | off | off | off | | | | |
+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
| Empty | Dual Rank | Slot 2 | off | 75 | | | | | 150 | off | off | off |
+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
|Single Rank| Empty | Slot 1 | off | 75 | 150 | off | | | | | | |
+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
| Empty |Single Rank| Slot 2 | off | 75 | | | | | 150 | off | | |
+-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
Single slot system
+-------------+------------+---------------+-----------------------------+
| | |DRAM controller| Rank 1 | Rank 2 |
|Configuration| Write/Read |-------+-------+-------+------+-------+------+
| | | Write | Read | Write | Read | Write | Read |
+-------------+------------+-------+-------+-------+------+-------+------+
| | R1 | off | 75 | 150 | off | off | off |
| Dual Rank |------------+-------+-------+-------+------+-------+------+
| | R2 | off | 75 | 150 | off | off | off |
+-------------+------------+-------+-------+-------+------+-------+------+
| Single Rank | R1 | off | 75 | 150 | off |
+-------------+------------+-------+-------+-------+------+
Reference http://www.samsung.com/global/business/semiconductor/products/dram/downloads/applicationnote/ddr2_odt_control_200603.pdf

46
doc/README.p1_p2_rdb_pc Normal file
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@@ -0,0 +1,46 @@
Overview
--------
P1_P2_RDB_PC represents a set of boards including
P1020MSBG-PC
P1020RDB-PC
P1020UTM-PC
P1021RDB-PC
P1024RDB
P1025RDB
P2020RDB-PC
They have similar design of P1020RDB but have DDR3 instead of DDR2. P2020RDB-PC
has 64-bit DDR. All others have 32-bit DDR.
Key features on these boards include:
* DDR3
* NOR flash
* NAND flash (on RDB's only)
* SPI flash (on RDB's only)
* SDHC/MMC card slot
* VSC7385 Ethernet switch (on P1020MBG, P1020RDB, & P1021RDB)
* PCIE slot and mini-PCIE slots
As these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM
is used to store SPD data. In case of absent or corrupted SPD, falling back
to timing data embedded in the source code will be used. Raw timing data is
extracted from DDR chip datasheet. Different speeds of DDR are supported with
this approach. ODT option is forced to fit this set of boards, again because
they don't have regular DIMMs.
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS is defined as 5ms to meet specification
for writing timing.
VSC firmware Address is defined by default in config file for eTSEC1.
SD width is based off DIP switch. DIP switch is detected on the
board by reading i2c bus and setting the appropriate mux values.
Some boards have QE module in the silicon (P1021 and P1025). QE and eLBC have
pins multiplexing. QE function needs to be disabled to access Nor Flash and
CPLD. QE-UEC and QE-UART can be enabled for linux kernel by setting "qe"
in hwconfig. In addition, QE-UEC and QE-TDM also have pins multiplexing, to
enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below
'setenv hwconfig qe' to enable QE UEC/UART and disable Nor-Flash/CPLD.
'setenv hwconfig 'qe;tdm'' to enalbe QE TDM and disable Nor-Flash/CPLD.