arm: mediatek: add support for MediaTek MT8195 SoC

This adds basic support for MediaTek MT8195 SoC.

Add watchdog support by adding upstream compatible string.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
This commit is contained in:
Julien Stephan
2026-02-02 13:08:11 +01:00
committed by Tom Rini
parent eed514b11d
commit 2517e2b524
5 changed files with 106 additions and 1 deletions

View File

@@ -93,6 +93,15 @@ config TARGET_MT8188
USB3.0 dual role, SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and
several LPDDR3 and LPDDR4 options.
config TARGET_MT8195
bool "MediaTek MT8195 SoC"
select ARM64
help
The MediaTek MT8195 is a ARM64-based SoC with a quad-core Cortex-A73 and
a quad-core Cortex-A53. It is including UART, SPI, USB3.0 dual role,
SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and several LPDDR3
and LPDDR4 options.
config TARGET_MT8365
bool "MediaTek MT8365 SoC"
select ARM64
@@ -165,7 +174,7 @@ config SYS_CONFIG_NAME
config MTK_BROM_HEADER_INFO
string
default "media=nor" if TARGET_MT8518 || TARGET_MT8512 || TARGET_MT7629
default "media=emmc" if TARGET_MT8516 || TARGET_MT8365 || TARGET_MT8183 || TARGET_MT8188
default "media=emmc" if TARGET_MT8516 || TARGET_MT8365 || TARGET_MT8183 || TARGET_MT8188 || TARGET_MT8195
default "lk=1" if TARGET_MT7623
config MTK_TZ_MOVABLE

View File

@@ -13,6 +13,7 @@ obj-$(CONFIG_TARGET_MT7987) += mt7987/
obj-$(CONFIG_TARGET_MT7988) += mt7988/
obj-$(CONFIG_TARGET_MT8183) += mt8183/
obj-$(CONFIG_TARGET_MT8188) += mt8188/
obj-$(CONFIG_TARGET_MT8195) += mt8195/
obj-$(CONFIG_TARGET_MT8365) += mt8365/
obj-$(CONFIG_TARGET_MT8512) += mt8512/
obj-$(CONFIG_TARGET_MT8516) += mt8516/

View File

@@ -0,0 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
obj-y += init.o

View File

@@ -0,0 +1,91 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2026 MediaTek Inc.
* Copyright (C) 2026 BayLibre, SAS
* Author: Julien Stephan <jstephan@baylibre.com>
* Chris-QJ Chen <chris-qj.chen@mediatek.com>
*/
#include <asm/armv8/mmu.h>
#include <asm/system.h>
#include <dm/uclass.h>
#include <linux/sizes.h>
#include <wdt.h>
DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
int ret;
ret = fdtdec_setup_memory_banksize();
if (ret)
return ret;
fdtdec_setup_mem_size_base();
/*
* Limit gd->ram_top not exceeding SZ_4G. Some periphals like mmc
* requires DMA buffer allocated below SZ_4G.
*
* Note: SZ_1M is for adjusting gd->relocaddr, the reserved memory for
* u-boot itself.
*/
if (gd->ram_base + gd->ram_size >= SZ_4G)
gd->mon_len = (gd->ram_base + gd->ram_size + SZ_1M) - SZ_4G;
return 0;
}
int dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = gd->ram_base;
gd->bd->bi_dram[0].size = gd->ram_size;
return 0;
}
int mtk_soc_early_init(void)
{
return 0;
}
void reset_cpu(void)
{
struct udevice *wdt;
if (IS_ENABLED(CONFIG_PSCI_RESET)) {
psci_system_reset();
} else {
uclass_first_device(UCLASS_WDT, &wdt);
if (wdt)
wdt_expire_now(wdt, 0);
}
}
int print_cpuinfo(void)
{
printf("CPU: MediaTek MT8195\n");
return 0;
}
static struct mm_region mt8195_mem_map[] = {
{
/* DDR */
.virt = 0x40000000UL,
.phys = 0x40000000UL,
.size = 0x200000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
}, {
.virt = 0x00000000UL,
.phys = 0x00000000UL,
.size = 0x20000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
0,
}
};
struct mm_region *mem_map = mt8195_mem_map;

View File

@@ -146,6 +146,7 @@ static const struct udevice_id mtk_wdt_ids[] = {
{ .compatible = "mediatek,mt6589-wdt"},
{ .compatible = "mediatek,mt7986-wdt" },
{ .compatible = "mediatek,mt8188-wdt" },
{ .compatible = "mediatek,mt8195-wdt" },
{}
};