From 37e6b640ef6177b79021190e3dfab13b465bebe4 Mon Sep 17 00:00:00 2001 From: Anshul Dalal Date: Wed, 20 May 2026 08:21:50 +0530 Subject: [PATCH] mach-k3: enable mmu after reserved memory is unmapped Currently the sequence to enable caches for the A53/A72 core on K3 devices looks as follows: 1. Map entire DDR banks 2. Setup page tables (done by mmu_setup) 3. Enable MMU 4. Unmap reserved-memory regions 5. Enable caches However there is a brief period of execution between #3 and #4 where the core can issue speculative accesses to the entire DDR space (including the reserved-memory regions) despite the caches being disabled. A firewall exception is triggered whenever such speculative access is made to secure DDR region of TFA or OP-TEE. This patch fixes the issue by re-ordering the sequence as follows: 1. Map entire DDR banks 2. Setup page tables 3. Unmap reserved-memory regions 4. Enable MMU 5. Enable caches Fixes: f1c694b8fdde ("mach-k3: map all banks using mem_map_from_dram_banks") Reported-by: Suhaas Joshi Signed-off-by: Anshul Dalal Reviewed-by: Ilias Apalodimas --- arch/arm/mach-k3/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index 396018b7a7a..19a6e24f38b 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -279,7 +279,6 @@ void enable_caches(void) __func__, fdt_strerror(ret)); mmu_setup(); - mmu_enable(); if (CONFIG_K3_ATF_LOAD_ADDR >= CFG_SYS_SDRAM_BASE) { ret = mmu_unmap_reserved_mem("tfa", true); @@ -295,6 +294,7 @@ void enable_caches(void) __func__, ret); } + mmu_enable(); icache_enable(); dcache_enable(); }