From 298c26c5c7f4105f4e421d227009baeba5c59678 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Fri, 27 Oct 2023 16:40:13 -0400 Subject: [PATCH 1/3] arm: Fix software interrupt handler When we take a software interrupt, we are already in supervisor mode. get_bad_stack assumes we are not in supervisor mode so it can clobber the stack pointer. This causes us to have an invalid stack once that macro finishes. Revert back to the get_bad_stack_swi macro which was previously removed. Fixes: 41623c91b09 ("arm: move exception handling out of start.S files") Signed-off-by: Sean Anderson --- arch/arm/lib/vectors.S | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S index 7cf7d1636f5..fe8ca403ac9 100644 --- a/arch/arm/lib/vectors.S +++ b/arch/arm/lib/vectors.S @@ -240,6 +240,18 @@ IRQ_STACK_START_IN: movs pc, lr @ jump to next instruction & switch modes. .endm + .macro get_bad_stack_swi + sub r13, r13, #4 @ space on current stack for scratch reg. + str r0, [r13] @ save R0's value. + ldr r0, IRQ_STACK_START_IN @ get data regions start + str lr, [r0] @ save caller lr in position 0 of saved stack + mrs lr, spsr @ get the spsr + str lr, [r0, #4] @ save spsr in position 1 of saved stack + ldr lr, [r0] @ restore lr + ldr r0, [r13] @ restore r0 + add r13, r13, #4 @ pop stack entry + .endm + .macro get_irq_stack @ setup IRQ stack ldr sp, IRQ_STACK_START .endm @@ -260,7 +272,7 @@ undefined_instruction: .align 5 software_interrupt: - get_bad_stack + get_bad_stack_swi bad_save_user_regs bl do_software_interrupt From 6ef83ab6be8978ab85a7d8967e9585ddf5f2bbbd Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Fri, 27 Oct 2023 16:40:14 -0400 Subject: [PATCH 2/3] arm: semihosting: Fix returning from traps on ARMv6 and lower U-Boot runs in supervisor mode. On ARMv6 and lower, software interrupts are taken in supervisor mode. When entering an interrupt, the link register is set to the address of the next instruction. However, if we are already in supervisor mode, this clobbers the link register. The debugger can't help us, since by the time it notices we've taken a software interrupt, the link register is already gone. Work around this by moving the return address to another register. Signed-off-by: Sean Anderson --- arch/arm/lib/semihosting.S | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/lib/semihosting.S b/arch/arm/lib/semihosting.S index 393aade94a5..6e1691a832c 100644 --- a/arch/arm/lib/semihosting.S +++ b/arch/arm/lib/semihosting.S @@ -18,11 +18,17 @@ ENTRY(smh_trap) #elif defined(CONFIG_SYS_THUMB_BUILD) svc #0xab #else +#if CONFIG_SYS_ARM_ARCH < 7 + /* Before the ARMv7 exception model, svc (swi) clobbers lr */ + mov r2, lr +#endif svc #0x123456 #endif #if defined(CONFIG_ARM64) ret +#elif CONFIG_SYS_ARM_ARCH < 7 + bx r2 #else bx lr #endif From 47cfdb2192b1f8cb5061bde53fcce562afaeadf2 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Fri, 27 Oct 2023 16:40:15 -0400 Subject: [PATCH 3/3] arm: semihosting: Support semihosting fallback on 32-bit ARM Add support for a semihosting fallback on 32-bit ARM. The assembly is lightly adapted from the irq return code, except there is no offset since lr already points to the correct instruction. The C side is mostly like ARM64, except we have fewer cases to deal with. Signed-off-by: Sean Anderson --- arch/arm/lib/interrupts.c | 31 +++++++++++++++++++++++++++++++ arch/arm/lib/vectors.S | 7 +++++++ lib/Kconfig | 4 ++-- 3 files changed, 40 insertions(+), 2 deletions(-) diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c index 6dc27d1d589..9961472f69f 100644 --- a/arch/arm/lib/interrupts.c +++ b/arch/arm/lib/interrupts.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -135,6 +136,32 @@ static inline void fixup_pc(struct pt_regs *regs, int offset) regs->ARM_pc = pc | (regs->ARM_pc & PCMASK); } +/* + * Try to "emulate" a semihosting call in the event that we don't have a + * debugger attached. + */ +static bool smh_emulate_trap(struct pt_regs *regs) +{ + if (regs->ARM_cpsr & T_BIT) { + u16 *insn = (u16 *)(regs->ARM_pc - 2); + + if (*insn != SMH_T32_SVC) + return false; + } else { + u32 *insn = (u32 *)(regs->ARM_pc - 4); + + if (*insn != SMH_A32_SVC) + return false; + } + + /* Avoid future semihosting calls */ + disable_semihosting(); + + /* Just pretend the call failed */ + regs->ARM_r0 = -1; + return true; +} + void do_undefined_instruction (struct pt_regs *pt_regs) { efi_restore_gd(); @@ -147,6 +174,10 @@ void do_undefined_instruction (struct pt_regs *pt_regs) void do_software_interrupt (struct pt_regs *pt_regs) { + if (CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK) && + smh_emulate_trap(pt_regs)) + return; + efi_restore_gd(); printf ("software interrupt\n"); fixup_pc(pt_regs, -4); diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S index fe8ca403ac9..843f9b9c281 100644 --- a/arch/arm/lib/vectors.S +++ b/arch/arm/lib/vectors.S @@ -275,6 +275,13 @@ software_interrupt: get_bad_stack_swi bad_save_user_regs bl do_software_interrupt +#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK) + ldmia sp, {r0 - lr}^ @ Calling r0 - lr + mov r0, r0 + ldr lr, [sp, #S_PC] @ Get PC + add sp, sp, #S_FRAME_SIZE + movs pc, lr @ return & move spsr_svc into cpsr +#endif .align 5 prefetch_abort: diff --git a/lib/Kconfig b/lib/Kconfig index 0c3afae8f52..9ae846ea5f7 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -100,7 +100,7 @@ config SEMIHOSTING config SEMIHOSTING_FALLBACK bool "Recover gracefully when semihosting fails" - depends on SEMIHOSTING && (ARM64 || RISCV) + depends on SEMIHOSTING default y help Normally, if U-Boot makes a semihosting call and no debugger is @@ -123,7 +123,7 @@ config SPL_SEMIHOSTING config SPL_SEMIHOSTING_FALLBACK bool "Recover gracefully when semihosting fails in SPL" - depends on SPL_SEMIHOSTING && (ARM64 || RISCV) + depends on SPL_SEMIHOSTING select ARMV8_SPL_EXCEPTION_VECTORS if ARM64 default y help