mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2026-06-13 15:03:58 +03:00
* Patch by Ladislav Michl, 05 Apr 2005:
Add support for VoiceBlue board. * Patch by Ladislav Michl, 05 Apr 2005: Fix netboot_common() prototypes. * Cleanup.
This commit is contained in:
@@ -190,9 +190,11 @@ ulong get_tbclk (void)
|
||||
*/
|
||||
void reset_cpu (ulong ignored)
|
||||
{
|
||||
S3C24X0_WATCHDOG * const watchdog;
|
||||
volatile S3C24X0_WATCHDOG * watchdog;
|
||||
|
||||
#ifdef CONFIG_TRAB
|
||||
extern void disable_vfd (void);
|
||||
|
||||
disable_vfd();
|
||||
#endif
|
||||
|
||||
|
||||
@@ -74,7 +74,7 @@ int get_clocks (void)
|
||||
gd->inp_clk = CFG_MPC8220_CLKIN;
|
||||
|
||||
/* Read XLB to PCI(INP) clock multiplier */
|
||||
pci2bus = (*((volatile u32 *)PCI_REG_PCIGSCR) &
|
||||
pci2bus = (*((volatile u32 *)PCI_REG_PCIGSCR) &
|
||||
PCI_REG_PCIGSCR_PCI2XLB_CLK_MASK)>>PCI_REG_PCIGSCR_PCI2XLB_CLK_BIT;
|
||||
|
||||
/* XLB bus clock */
|
||||
|
||||
@@ -111,7 +111,7 @@ boot_warm:
|
||||
|
||||
/* MBAR is mirrored into the MBAR SPR */
|
||||
mtspr MBAR,r3
|
||||
mtspr SPRN_SPRG7W,r3
|
||||
mtspr SPRN_SPRG7W,r3
|
||||
lis r4, CFG_DEFAULT_MBAR@h
|
||||
stw r3, 0(r4)
|
||||
#endif /* CFG_DEFAULT_MBAR */
|
||||
|
||||
@@ -47,7 +47,7 @@ int psc_serial_init (void)
|
||||
/* write to CSR: RX/TX baud rate from timers */
|
||||
psc->sr_csr = 0xdd000000;
|
||||
|
||||
psc->mr1_2 = PSC_MR1_BITS_CHAR_8 | PSC_MR1_NO_PARITY | PSC_MR2_STOP_BITS_1;
|
||||
psc->mr1_2 = PSC_MR1_BITS_CHAR_8 | PSC_MR1_NO_PARITY | PSC_MR2_STOP_BITS_1;
|
||||
|
||||
/* Setting up BaudRate */
|
||||
counter = ((gd->bus_clk / gd->baudrate)) >> 5;
|
||||
|
||||
@@ -277,7 +277,7 @@ static int init_phy(struct eth_device *dev)
|
||||
struct phy_info *curphy;
|
||||
|
||||
/* Assign a Physical address to the TBI */
|
||||
|
||||
|
||||
{
|
||||
volatile tsec_t *regs = (volatile tsec_t *)(TSEC_BASE_ADDR);
|
||||
regs->tbipa = TBIPA_VALUE;
|
||||
@@ -809,33 +809,33 @@ struct phy_info phy_info_dm9161 = {
|
||||
|
||||
uint mii_parse_lxt971_sr2(uint mii_reg, struct tsec_private *priv)
|
||||
{
|
||||
unsigned int speed;
|
||||
if (priv->link) {
|
||||
speed = mii_reg & MIIM_LXT971_SR2_SPEED_MASK;
|
||||
unsigned int speed;
|
||||
if (priv->link) {
|
||||
speed = mii_reg & MIIM_LXT971_SR2_SPEED_MASK;
|
||||
|
||||
switch (speed) {
|
||||
case MIIM_LXT971_SR2_10HDX:
|
||||
priv->speed = 10;
|
||||
priv->duplexity = 0;
|
||||
break;
|
||||
case MIIM_LXT971_SR2_10FDX:
|
||||
priv->speed = 10;
|
||||
priv->duplexity = 1;
|
||||
break;
|
||||
case MIIM_LXT971_SR2_100HDX:
|
||||
priv->speed = 100;
|
||||
priv->duplexity = 0;
|
||||
default:
|
||||
priv->speed = 100;
|
||||
priv->duplexity = 1;
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
priv->speed = 0;
|
||||
priv->duplexity = 0;
|
||||
}
|
||||
switch (speed) {
|
||||
case MIIM_LXT971_SR2_10HDX:
|
||||
priv->speed = 10;
|
||||
priv->duplexity = 0;
|
||||
break;
|
||||
case MIIM_LXT971_SR2_10FDX:
|
||||
priv->speed = 10;
|
||||
priv->duplexity = 1;
|
||||
break;
|
||||
case MIIM_LXT971_SR2_100HDX:
|
||||
priv->speed = 100;
|
||||
priv->duplexity = 0;
|
||||
default:
|
||||
priv->speed = 100;
|
||||
priv->duplexity = 1;
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
priv->speed = 0;
|
||||
priv->duplexity = 0;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct phy_info phy_info_lxt971 = {
|
||||
|
||||
Reference in New Issue
Block a user