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powerpc: p1_p2_rdb_pc: Enable p1_p2_rdb_pc to boot from SD Card with SPL
Enable p1_p2_rdb_pc to start from eSDHC with SPL. Signed-off-by: Ying Zhang <b40530@freescale.com>
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@@ -144,19 +144,33 @@
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#define CONFIG_SYS_L2_SIZE (512 << 10)
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#endif
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#if CONFIG_SYS_L2_SIZE >= (512 << 10)
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/* must be 32-bit */
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#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
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#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
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#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
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#endif
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#ifdef CONFIG_SDCARD
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#define CONFIG_RAMBOOT_SDCARD
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#define CONFIG_SYS_RAMBOOT
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#define CONFIG_SYS_EXTRA_ENV_RELOC
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#define CONFIG_SYS_TEXT_BASE 0x11000000
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#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc
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#define CONFIG_SPL
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#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
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#define CONFIG_SPL_ENV_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SPL_MMC_MINIMAL
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#define CONFIG_SPL_FLUSH_IMAGE
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#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_I2C_SUPPORT
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#define CONFIG_FSL_LAW /* Use common FSL init code */
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#define CONFIG_SYS_TEXT_BASE 0x11001000
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#define CONFIG_SPL_TEXT_BASE 0xf8f81000
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#define CONFIG_SPL_PAD_TO 0x18000
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#define CONFIG_SPL_MAX_SIZE (96 * 1024)
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#define CONFIG_SYS_MMC_U_BOOT_SIZE (512 << 10)
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#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000)
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#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000)
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#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10)
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#define CONFIG_SYS_MPC85XX_NO_RESETVEC
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#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
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#define CONFIG_SPL_MMC_BOOT
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SPL_COMMON_INIT_DDR
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#endif
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#endif
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#ifdef CONFIG_SPIFLASH
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@@ -526,6 +540,23 @@
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#define CONFIG_VSC7385_IMAGE_SIZE 8192
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#endif
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/*
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* Config the L2 Cache as L2 SRAM
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*/
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#if defined(CONFIG_SPL_BUILD)
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#if defined(CONFIG_SDCARD)
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#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
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#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
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#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
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#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000
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#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
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#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10)
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#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
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#define CONFIG_SPL_RELOC_MALLOC_SIZE (96 << 10)
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#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
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#endif
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#endif
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/* Serial Port - controlled on board with jumper J8
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* open - index 2
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* shorted - index 1
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@@ -536,7 +567,7 @@
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE 1
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#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
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#ifdef CONFIG_SPL_BUILD
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#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
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#define CONFIG_NS16550_MIN_FUNCTIONS
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#endif
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@@ -742,7 +773,7 @@
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#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
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#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
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#define CONFIG_ENV_SECT_SIZE 0x10000
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#elif defined(CONFIG_RAMBOOT_SDCARD)
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#elif defined(CONFIG_SDCARD)
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_FSL_FIXED_MMC_LOCATION
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#define CONFIG_ENV_SIZE 0x2000
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