From 472ea8b621e18d7912db3f4141d52014628f1605 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 30 Apr 2026 14:03:45 +0200 Subject: [PATCH] xilinx: mbv: Allow compiler to optimize inlining in SPL Enable CONFIG_SPL_OPTIMIZE_INLINING to let the compiler decide which functions marked 'inline' to actually inline, rather than forcing all of them. This reduces SPL code size by allowing the compiler to eliminate unnecessary code duplication. spl/u-boot-spl: all -872 text -872 Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/09f2a62099abf561b91b0d3692714f0f29057d31.1777550623.git.michal.simek@amd.com --- configs/xilinx_mbv32_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_mbv32_defconfig b/configs/xilinx_mbv32_defconfig index 4a61c9eb5e3..9d0111fe8e5 100644 --- a/configs/xilinx_mbv32_defconfig +++ b/configs/xilinx_mbv32_defconfig @@ -19,6 +19,7 @@ CONFIG_TARGET_XILINX_MBV=y # CONFIG_RISCV_ISA_F is not set # CONFIG_SPL_SMP is not set # CONFIG_AVAILABLE_HARTS is not set +CONFIG_SPL_OPTIMIZE_INLINING=y CONFIG_REMAKE_ELF=y # CONFIG_EFI_LOADER is not set CONFIG_FIT=y