diff --git a/arch/arm/dts/r8a78000.dtsi b/arch/arm/dts/r8a78000.dtsi
index 0d0c24503e2..89c2881fa94 100644
--- a/arch/arm/dts/r8a78000.dtsi
+++ b/arch/arm/dts/r8a78000.dtsi
@@ -763,7 +763,7 @@
 			interrupts = <GIC_SPI 4075 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&dummy_clk_sgasyncd16>, <&dummy_clk_sgasyncd16>, <&scif_clk>;
 			clock-names = "fck", "brg_int", "scif_clk";
-			status = "okay";
+			status = "disabled";
 		};
 
 		scif3: serial@c0708000 {
diff --git a/drivers/net/rswitch.c b/drivers/net/rswitch.c
index 801c22bbdc7..c51908ed8f3 100644
--- a/drivers/net/rswitch.c
+++ b/drivers/net/rswitch.c
@@ -482,7 +482,7 @@ static int rswitch_mii_read_c45(struct mii_dev *miidev, int phyad, int devad, in
 	/* Access PHY register */
 	if (devad != MDIO_DEVAD_NONE)	/* Definitelly C45 */
 		val = rswitch_mii_access_c45(etha_mii, true, phyad, devad, regad, 0);
-	else if (etha->phydev->is_c45)	/* C22 access to C45 PHY */
+	else if (etha->phydev && etha->phydev->is_c45)	/* C22 access to C45 PHY */
 		val = rswitch_mii_access_c45(etha_mii, true, phyad, 1, regad, 0);
 	else
 		val = rswitch_mii_access_c22(etha_mii, true, phyad, regad, 0);
@@ -516,7 +516,7 @@ int rswitch_mii_write_c45(struct mii_dev *miidev, int phyad, int devad, int rega
 	/* Access PHY register */
 	if (devad != MDIO_DEVAD_NONE)	/* Definitelly C45 */
 		rswitch_mii_access_c45(etha_mii, false, phyad, devad, regad, data);
-	else if (etha->phydev->is_c45)	/* C22 access to C45 PHY */
+	else if (etha->phydev && etha->phydev->is_c45)	/* C22 access to C45 PHY */
 		rswitch_mii_access_c45(etha_mii, false, phyad, 1, regad, data);
 	else
 		rswitch_mii_access_c22(etha_mii, false, phyad, regad, data);