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Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next

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- More Tegra video improvements
This commit is contained in:
Tom Rini
2025-03-26 14:07:37 -06:00
parent df11ac859d 03f61b1539
commit 4adbf64ff8
56 changed files with 4721 additions and 491 deletions
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46
arch/arm/include/asm/arch-tegra/dc.h
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@@ -448,6 +448,11 @@ enum win_color_depth_id {
#define LVS_OUTPUT_POLARITY_LOW BIT(28)
#define LSC0_OUTPUT_POLARITY_LOW BIT(24)
/* DC_DISP_DISP_SIGNAL_OPTIONS0 0x400 */
#define H_PULSE0_ENABLE BIT(8)
#define H_PULSE1_ENABLE BIT(10)
#define H_PULSE2_ENABLE BIT(12)
/* DC_DISP_DISP_WIN_OPTIONS 0x402 */
#define CURSOR_ENABLE BIT(16)
#define SOR_ENABLE BIT(25)
@@ -504,6 +509,22 @@ enum {
DATA_ORDER_BLUE_RED,
};
/* DC_DISP_DISP_COLOR_CONTROL 0x430 */
#define DITHER_CONTROL_DISABLE (0 << 8)
#define DITHER_CONTROL_ORDERED (2 << 8)
#define DITHER_CONTROL_ERRDIFF (3 << 8)
enum {
BASE_COLOR_SIZE_666,
BASE_COLOR_SIZE_111,
BASE_COLOR_SIZE_222,
BASE_COLOR_SIZE_333,
BASE_COLOR_SIZE_444,
BASE_COLOR_SIZE_555,
BASE_COLOR_SIZE_565,
BASE_COLOR_SIZE_332,
BASE_COLOR_SIZE_888,
};
/* DC_DISP_DATA_ENABLE_OPTIONS 0x432 */
#define DE_SELECT_SHIFT 0
#define DE_SELECT_MASK (0x3 << DE_SELECT_SHIFT)
@@ -570,8 +591,27 @@ enum {
#define V_DDA_INC_SHIFT 16
#define V_DDA_INC_MASK (0xFFFF << V_DDA_INC_SHIFT)
#define DC_POLL_TIMEOUT_MS 50
#define DC_N_WINDOWS 5
#define DC_REG_SAVE_SPACE (DC_N_WINDOWS + 5)
#define DC_POLL_TIMEOUT_MS 50
#define DC_N_WINDOWS 5
#define DC_REG_SAVE_SPACE (DC_N_WINDOWS + 5)
#define PULSE_MODE_NORMAL (0 << 3)
#define PULSE_MODE_ONE_CLOCK (1 << 3)
#define PULSE_POLARITY_HIGH (0 << 4)
#define PULSE_POLARITY_LOW (1 << 4)
#define PULSE_QUAL_ALWAYS (0 << 6)
#define PULSE_QUAL_VACTIVE (2 << 6)
#define PULSE_QUAL_VACTIVE1 (3 << 6)
#define PULSE_LAST_START_A (0 << 8)
#define PULSE_LAST_END_A (1 << 8)
#define PULSE_LAST_START_B (2 << 8)
#define PULSE_LAST_END_B (3 << 8)
#define PULSE_LAST_START_C (4 << 8)
#define PULSE_LAST_END_C (5 << 8)
#define PULSE_LAST_START_D (6 << 8)
#define PULSE_LAST_END_D (7 << 8)
#define PULSE_START(x) (((x) & 0xfff) << 0)
#define PULSE_END(x) (((x) & 0xfff) << 16)
#endif /* __ASM_ARCH_TEGRA_DC_H */

20
arch/arm/include/asm/arch-tegra/pinmux.h
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@@ -34,41 +34,41 @@ enum pmux_pin_io {
#ifdef TEGRA_PMX_PINS_HAVE_LOCK
enum pmux_pin_lock {
PMUX_PIN_LOCK_DEFAULT = 0,
PMUX_PIN_LOCK_DISABLE,
PMUX_PIN_LOCK_DISABLE = 0,
PMUX_PIN_LOCK_ENABLE,
PMUX_PIN_LOCK_DEFAULT,
};
#endif
#ifdef TEGRA_PMX_PINS_HAVE_OD
enum pmux_pin_od {
PMUX_PIN_OD_DEFAULT = 0,
PMUX_PIN_OD_DISABLE,
PMUX_PIN_OD_DISABLE = 0,
PMUX_PIN_OD_ENABLE,
PMUX_PIN_OD_DEFAULT,
};
#endif
#ifdef TEGRA_PMX_PINS_HAVE_IO_RESET
enum pmux_pin_ioreset {
PMUX_PIN_IO_RESET_DEFAULT = 0,
PMUX_PIN_IO_RESET_DISABLE,
PMUX_PIN_IO_RESET_DISABLE = 0,
PMUX_PIN_IO_RESET_ENABLE,
PMUX_PIN_IO_RESET_DEFAULT,
};
#endif
#ifdef TEGRA_PMX_PINS_HAVE_RCV_SEL
enum pmux_pin_rcv_sel {
PMUX_PIN_RCV_SEL_DEFAULT = 0,
PMUX_PIN_RCV_SEL_NORMAL,
PMUX_PIN_RCV_SEL_NORMAL = 0,
PMUX_PIN_RCV_SEL_HIGH,
PMUX_PIN_RCV_SEL_DEFAULT,
};
#endif
#ifdef TEGRA_PMX_PINS_HAVE_E_IO_HV
enum pmux_pin_e_io_hv {
PMUX_PIN_E_IO_HV_DEFAULT = 0,
PMUX_PIN_E_IO_HV_NORMAL,
PMUX_PIN_E_IO_HV_NORMAL = 0,
PMUX_PIN_E_IO_HV_HIGH,
PMUX_PIN_E_IO_HV_DEFAULT,
};
#endif

6
arch/arm/include/asm/arch-tegra20/pinmux.h
View File

@@ -467,14 +467,14 @@ static const char * const tegra_pinctrl_to_func[] = {
[PMUX_FUNC_DAP3] = "dap3",
[PMUX_FUNC_DAP4] = "dap4",
[PMUX_FUNC_DAP5] = "dap5",
[PMUX_FUNC_DISPA] = "dispa",
[PMUX_FUNC_DISPB] = "dispb",
[PMUX_FUNC_DISPA] = "displaya",
[PMUX_FUNC_DISPB] = "displayb",
[PMUX_FUNC_EMC_TEST0_DLL] = "emc_test0_dll",
[PMUX_FUNC_EMC_TEST1_DLL] = "emc_test1_dll",
[PMUX_FUNC_GMI] = "gmi",
[PMUX_FUNC_GMI_INT] = "gmi_int",
[PMUX_FUNC_HDMI] = "hdmi",
[PMUX_FUNC_I2C] = "i2c",
[PMUX_FUNC_I2C] = "i2c1",
[PMUX_FUNC_I2C2] = "i2c2",
[PMUX_FUNC_I2C3] = "i2c3",
[PMUX_FUNC_IDE] = "ide",