board: gateworks: venice: determine dram size at runtime

The SPL does not update the memory node with the dram size from EEPROM
but instead we can use get_ram_size which does a simple memory test
to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that
is the max used on the Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
This commit is contained in:
Tim Harvey
2022-03-30 13:39:02 -07:00
committed by Tom Rini
parent ce1cbf1ae0
commit 52ae8d6cc8
3 changed files with 4 additions and 13 deletions

View File

@@ -83,7 +83,7 @@
/* SDRAM configuration */
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */
#define PHYS_SDRAM_SIZE SZ_4G
#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* UART */

View File

@@ -80,7 +80,7 @@
/* SDRAM configuration */
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE SZ_1G
#define PHYS_SDRAM_SIZE SZ_4G
#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* UART */