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board: gateworks: venice: determine dram size at runtime
The SPL does not update the memory node with the dram size from EEPROM but instead we can use get_ram_size which does a simple memory test to determine the available RAM. Update PHYS_SDRAM_SIZE to 4GiB as that is the max used on the Venice boards. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
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@@ -83,7 +83,7 @@
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/* SDRAM configuration */
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */
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#define PHYS_SDRAM_SIZE SZ_4G
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#define CONFIG_SYS_BOOTM_LEN SZ_256M
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/* UART */
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@@ -80,7 +80,7 @@
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/* SDRAM configuration */
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE SZ_1G
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#define PHYS_SDRAM_SIZE SZ_4G
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#define CONFIG_SYS_BOOTM_LEN SZ_256M
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/* UART */
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