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video: dw_hdmi: add support for color conversion
Some IPs like the meson VPU can only feed a particular pixel format to dw_hdmi. As of now, the driver is hardcoded to use RGB888 as input. This commit enables different pixel format inputs, with the appropriate CSC configuration. Signed-off-by: Jorge Ramire-Ortiz <jramirez@baylibre.com> Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
This commit is contained in:
Jorge Ramirez-Ortiz
committed by
Neil Armstrong
Neil Armstrong
parent
fd99841808
commit
56dd8d87e5
@@ -174,6 +174,34 @@
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#define HDMI_MC_LOCKONCLOCK 0x4006
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#define HDMI_MC_HEACPHY_RST 0x4007
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/* Color Space Converter Registers */
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#define HDMI_CSC_CFG 0x4100
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#define HDMI_CSC_SCALE 0x4101
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#define HDMI_CSC_COEF_A1_MSB 0x4102
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#define HDMI_CSC_COEF_A1_LSB 0x4103
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#define HDMI_CSC_COEF_A2_MSB 0x4104
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#define HDMI_CSC_COEF_A2_LSB 0x4105
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#define HDMI_CSC_COEF_A3_MSB 0x4106
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#define HDMI_CSC_COEF_A3_LSB 0x4107
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#define HDMI_CSC_COEF_A4_MSB 0x4108
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#define HDMI_CSC_COEF_A4_LSB 0x4109
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#define HDMI_CSC_COEF_B1_MSB 0x410A
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#define HDMI_CSC_COEF_B1_LSB 0x410B
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#define HDMI_CSC_COEF_B2_MSB 0x410C
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#define HDMI_CSC_COEF_B2_LSB 0x410D
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#define HDMI_CSC_COEF_B3_MSB 0x410E
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#define HDMI_CSC_COEF_B3_LSB 0x410F
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#define HDMI_CSC_COEF_B4_MSB 0x4110
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#define HDMI_CSC_COEF_B4_LSB 0x4111
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#define HDMI_CSC_COEF_C1_MSB 0x4112
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#define HDMI_CSC_COEF_C1_LSB 0x4113
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#define HDMI_CSC_COEF_C2_MSB 0x4114
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#define HDMI_CSC_COEF_C2_LSB 0x4115
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#define HDMI_CSC_COEF_C3_MSB 0x4116
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#define HDMI_CSC_COEF_C3_LSB 0x4117
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#define HDMI_CSC_COEF_C4_MSB 0x4118
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#define HDMI_CSC_COEF_C4_LSB 0x4119
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/* I2C Master Registers (E-DDC) */
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#define HDMI_I2CM_SLAVE 0x7E00
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#define HDMI_I2CM_ADDRESS 0x7E01
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@@ -416,7 +444,11 @@ enum {
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HDMI_AUD_INPUTCLKFS_128 = 0x0,
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/* mc_clkdis field values */
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HDMI_MC_CLKDIS_HDCPCLK_DISABLE = 0x40,
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HDMI_MC_CLKDIS_CECCLK_DISABLE = 0x20,
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HDMI_MC_CLKDIS_CSCCLK_DISABLE = 0x10,
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HDMI_MC_CLKDIS_AUDCLK_DISABLE = 0x8,
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HDMI_MC_CLKDIS_PREPCLK_DISABLE = 0x4,
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HDMI_MC_CLKDIS_TMDSCLK_DISABLE = 0x2,
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HDMI_MC_CLKDIS_PIXELCLK_DISABLE = 0x1,
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@@ -444,6 +476,27 @@ enum {
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HDMI_I2CM_DIV_FAST_MODE = 0x8,
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HDMI_I2CM_DIV_STD_MODE = 0x0,
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HDMI_I2CM_SOFTRSTZ_MASK = 0x1,
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/* CSC_CFG field values */
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HDMI_CSC_CFG_INTMODE_MASK = 0x30,
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HDMI_CSC_CFG_INTMODE_OFFSET = 4,
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HDMI_CSC_CFG_INTMODE_DISABLE = 0x00,
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HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1 = 0x10,
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HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA2 = 0x20,
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HDMI_CSC_CFG_DECMODE_MASK = 0x3,
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HDMI_CSC_CFG_DECMODE_OFFSET = 0,
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HDMI_CSC_CFG_DECMODE_DISABLE = 0x0,
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HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA1 = 0x1,
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HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA2 = 0x2,
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HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3 = 0x3,
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/* CSC_SCALE field values */
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HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK = 0xF0,
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HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP = 0x00,
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HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP = 0x50,
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HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP = 0x60,
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HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP = 0x70,
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HDMI_CSC_SCALE_CSCSCALE_MASK = 0x03,
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};
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struct hdmi_mpll_config {
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@@ -463,6 +516,24 @@ struct hdmi_phy_config {
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u32 vlev_ctr; /* voltage level control */
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};
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struct hdmi_vmode {
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bool mdataenablepolarity;
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unsigned int mpixelclock;
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unsigned int mpixelrepetitioninput;
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unsigned int mpixelrepetitionoutput;
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};
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struct hdmi_data_info {
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unsigned int enc_in_bus_format;
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unsigned int enc_out_bus_format;
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unsigned int enc_in_encoding;
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unsigned int enc_out_encoding;
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unsigned int pix_repet_factor;
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unsigned int hdcp_enable;
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struct hdmi_vmode video_mode;
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};
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struct dw_hdmi {
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ulong ioaddr;
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const struct hdmi_mpll_config *mpll_cfg;
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@@ -470,6 +541,7 @@ struct dw_hdmi {
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u8 i2c_clk_high;
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u8 i2c_clk_low;
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u8 reg_io_width;
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struct hdmi_data_info hdmi_data;
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int (*phy_set)(struct dw_hdmi *hdmi, uint mpixelclock);
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void (*write_reg)(struct dw_hdmi *hdmi, u8 val, int offset);
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156
include/media_bus_format.h
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156
include/media_bus_format.h
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@@ -0,0 +1,156 @@
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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* Media Bus API header
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*
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* Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __LINUX_MEDIA_BUS_FORMAT_H
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#define __LINUX_MEDIA_BUS_FORMAT_H
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/*
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* These bus formats uniquely identify data formats on the data bus. Format 0
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* is reserved, MEDIA_BUS_FMT_FIXED shall be used by host-client pairs, where
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* the data format is fixed. Additionally, "2X8" means that one pixel is
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* transferred in two 8-bit samples, "BE" or "LE" specify in which order those
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* samples are transferred over the bus: "LE" means that the least significant
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* bits are transferred first, "BE" means that the most significant bits are
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* transferred first, and "PADHI" and "PADLO" define which bits - low or high,
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* in the incomplete high byte, are filled with padding bits.
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*
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* The bus formats are grouped by type, bus_width, bits per component, samples
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* per pixel and order of subsamples. Numerical values are sorted using generic
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* numerical sort order (8 thus comes before 10).
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*
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* As their value can't change when a new bus format is inserted in the
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* enumeration, the bus formats are explicitly given a numerical value. The next
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* free values for each category are listed below, update them when inserting
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* new pixel codes.
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*/
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#define MEDIA_BUS_FMT_FIXED 0x0001
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/* RGB - next is 0x101b */
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#define MEDIA_BUS_FMT_RGB444_1X12 0x1016
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#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
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#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
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#define MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE 0x1003
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#define MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE 0x1004
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#define MEDIA_BUS_FMT_RGB565_1X16 0x1017
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#define MEDIA_BUS_FMT_BGR565_2X8_BE 0x1005
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#define MEDIA_BUS_FMT_BGR565_2X8_LE 0x1006
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#define MEDIA_BUS_FMT_RGB565_2X8_BE 0x1007
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#define MEDIA_BUS_FMT_RGB565_2X8_LE 0x1008
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#define MEDIA_BUS_FMT_RGB666_1X18 0x1009
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#define MEDIA_BUS_FMT_RBG888_1X24 0x100e
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#define MEDIA_BUS_FMT_RGB666_1X24_CPADHI 0x1015
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#define MEDIA_BUS_FMT_RGB666_1X7X3_SPWG 0x1010
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#define MEDIA_BUS_FMT_BGR888_1X24 0x1013
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#define MEDIA_BUS_FMT_GBR888_1X24 0x1014
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#define MEDIA_BUS_FMT_RGB888_1X24 0x100a
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#define MEDIA_BUS_FMT_RGB888_2X12_BE 0x100b
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#define MEDIA_BUS_FMT_RGB888_2X12_LE 0x100c
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#define MEDIA_BUS_FMT_RGB888_1X7X4_SPWG 0x1011
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#define MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA 0x1012
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#define MEDIA_BUS_FMT_ARGB8888_1X32 0x100d
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#define MEDIA_BUS_FMT_RGB888_1X32_PADHI 0x100f
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#define MEDIA_BUS_FMT_RGB101010_1X30 0x1018
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#define MEDIA_BUS_FMT_RGB121212_1X36 0x1019
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#define MEDIA_BUS_FMT_RGB161616_1X48 0x101a
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/* YUV (including grey) - next is 0x202d */
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#define MEDIA_BUS_FMT_Y8_1X8 0x2001
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#define MEDIA_BUS_FMT_UV8_1X8 0x2015
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#define MEDIA_BUS_FMT_UYVY8_1_5X8 0x2002
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#define MEDIA_BUS_FMT_VYUY8_1_5X8 0x2003
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#define MEDIA_BUS_FMT_YUYV8_1_5X8 0x2004
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#define MEDIA_BUS_FMT_YVYU8_1_5X8 0x2005
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#define MEDIA_BUS_FMT_UYVY8_2X8 0x2006
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#define MEDIA_BUS_FMT_VYUY8_2X8 0x2007
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#define MEDIA_BUS_FMT_YUYV8_2X8 0x2008
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#define MEDIA_BUS_FMT_YVYU8_2X8 0x2009
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#define MEDIA_BUS_FMT_Y10_1X10 0x200a
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#define MEDIA_BUS_FMT_Y10_2X8_PADHI_LE 0x202c
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#define MEDIA_BUS_FMT_UYVY10_2X10 0x2018
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#define MEDIA_BUS_FMT_VYUY10_2X10 0x2019
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#define MEDIA_BUS_FMT_YUYV10_2X10 0x200b
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#define MEDIA_BUS_FMT_YVYU10_2X10 0x200c
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#define MEDIA_BUS_FMT_Y12_1X12 0x2013
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#define MEDIA_BUS_FMT_UYVY12_2X12 0x201c
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#define MEDIA_BUS_FMT_VYUY12_2X12 0x201d
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#define MEDIA_BUS_FMT_YUYV12_2X12 0x201e
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#define MEDIA_BUS_FMT_YVYU12_2X12 0x201f
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#define MEDIA_BUS_FMT_UYVY8_1X16 0x200f
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#define MEDIA_BUS_FMT_VYUY8_1X16 0x2010
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#define MEDIA_BUS_FMT_YUYV8_1X16 0x2011
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#define MEDIA_BUS_FMT_YVYU8_1X16 0x2012
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#define MEDIA_BUS_FMT_YDYUYDYV8_1X16 0x2014
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#define MEDIA_BUS_FMT_UYVY10_1X20 0x201a
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#define MEDIA_BUS_FMT_VYUY10_1X20 0x201b
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#define MEDIA_BUS_FMT_YUYV10_1X20 0x200d
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#define MEDIA_BUS_FMT_YVYU10_1X20 0x200e
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#define MEDIA_BUS_FMT_VUY8_1X24 0x2024
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#define MEDIA_BUS_FMT_YUV8_1X24 0x2025
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#define MEDIA_BUS_FMT_UYYVYY8_0_5X24 0x2026
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#define MEDIA_BUS_FMT_UYVY12_1X24 0x2020
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#define MEDIA_BUS_FMT_VYUY12_1X24 0x2021
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#define MEDIA_BUS_FMT_YUYV12_1X24 0x2022
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#define MEDIA_BUS_FMT_YVYU12_1X24 0x2023
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#define MEDIA_BUS_FMT_YUV10_1X30 0x2016
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#define MEDIA_BUS_FMT_UYYVYY10_0_5X30 0x2027
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#define MEDIA_BUS_FMT_AYUV8_1X32 0x2017
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#define MEDIA_BUS_FMT_UYYVYY12_0_5X36 0x2028
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#define MEDIA_BUS_FMT_YUV12_1X36 0x2029
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#define MEDIA_BUS_FMT_YUV16_1X48 0x202a
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#define MEDIA_BUS_FMT_UYYVYY16_0_5X48 0x202b
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/* Bayer - next is 0x3021 */
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#define MEDIA_BUS_FMT_SBGGR8_1X8 0x3001
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#define MEDIA_BUS_FMT_SGBRG8_1X8 0x3013
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#define MEDIA_BUS_FMT_SGRBG8_1X8 0x3002
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#define MEDIA_BUS_FMT_SRGGB8_1X8 0x3014
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#define MEDIA_BUS_FMT_SBGGR10_ALAW8_1X8 0x3015
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#define MEDIA_BUS_FMT_SGBRG10_ALAW8_1X8 0x3016
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#define MEDIA_BUS_FMT_SGRBG10_ALAW8_1X8 0x3017
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#define MEDIA_BUS_FMT_SRGGB10_ALAW8_1X8 0x3018
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#define MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8 0x300b
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#define MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8 0x300c
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#define MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8 0x3009
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#define MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8 0x300d
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#define MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE 0x3003
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#define MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE 0x3004
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#define MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE 0x3005
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#define MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE 0x3006
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#define MEDIA_BUS_FMT_SBGGR10_1X10 0x3007
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#define MEDIA_BUS_FMT_SGBRG10_1X10 0x300e
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#define MEDIA_BUS_FMT_SGRBG10_1X10 0x300a
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#define MEDIA_BUS_FMT_SRGGB10_1X10 0x300f
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#define MEDIA_BUS_FMT_SBGGR12_1X12 0x3008
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#define MEDIA_BUS_FMT_SGBRG12_1X12 0x3010
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#define MEDIA_BUS_FMT_SGRBG12_1X12 0x3011
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#define MEDIA_BUS_FMT_SRGGB12_1X12 0x3012
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#define MEDIA_BUS_FMT_SBGGR14_1X14 0x3019
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#define MEDIA_BUS_FMT_SGBRG14_1X14 0x301a
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#define MEDIA_BUS_FMT_SGRBG14_1X14 0x301b
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#define MEDIA_BUS_FMT_SRGGB14_1X14 0x301c
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#define MEDIA_BUS_FMT_SBGGR16_1X16 0x301d
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#define MEDIA_BUS_FMT_SGBRG16_1X16 0x301e
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#define MEDIA_BUS_FMT_SGRBG16_1X16 0x301f
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#define MEDIA_BUS_FMT_SRGGB16_1X16 0x3020
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/* JPEG compressed formats - next is 0x4002 */
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#define MEDIA_BUS_FMT_JPEG_1X8 0x4001
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/* Vendor specific formats - next is 0x5002 */
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/* S5C73M3 sensor specific interleaved UYVY and JPEG */
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#define MEDIA_BUS_FMT_S5C_UYVY_JPEG_1X8 0x5001
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/* HSV - next is 0x6002 */
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#define MEDIA_BUS_FMT_AHSV8888_1X32 0x6001
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#endif /* __LINUX_MEDIA_BUS_FORMAT_H */
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