From 7eace38d5418a6330f6d0918ed319ff605d3020b Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Mon, 9 Nov 2020 13:02:17 +0200 Subject: [PATCH 1/6] mmc: atmel-sdhci: fix the clk_enable call in case of no ops If the clock driver does not offer a clk_enable ops, then the system will return -ENOSYS. The clk_enable works with CCF (common clock framework). Some clocks in some cases (like the generic clock for some products: sama5d2) do not have the clk_enable primitive, and in this case probing of the driver will fail. This patch changes the behavior to return an error in case there is really an error, and not a missing primitive. If the clock driver does not have an enable primitive, most likely clocks are always enabled or enabled in the set_rate primitives. Fixes: 81f16438d4 ("mmc: atmel-sdhci: enable the required generic clock") Signed-off-by: Eugen Hristev Reviewed-by: Jaehoon Chung --- drivers/mmc/atmel_sdhci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c index f56ae63bc2c..ca7a98bf1de 100644 --- a/drivers/mmc/atmel_sdhci.c +++ b/drivers/mmc/atmel_sdhci.c @@ -86,7 +86,8 @@ static int atmel_sdhci_probe(struct udevice *dev) return -EINVAL; ret = clk_enable(&clk); - if (ret) + /* return error only if the clock really has a clock enable func */ + if (ret && ret != -ENOSYS) return ret; ret = mmc_of_parse(dev, &plat->cfg); From 1a5c5b716cf1d41cc1eb0f115a44a72387242f86 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Mon, 9 Nov 2020 17:35:01 +0200 Subject: [PATCH 2/6] ARM: dts: at91: sam9x60: enable slewrate/high drive for sdhci0 pinout Align the pin setup for sdhci0 with linux kernel. This means to have slew rate enable and high drive strength. Signed-off-by: Eugen Hristev --- arch/arm/dts/sam9x60.dtsi | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi index 7f3eae3f5d2..007646fcb43 100644 --- a/arch/arm/dts/sam9x60.dtsi +++ b/arch/arm/dts/sam9x60.dtsi @@ -153,12 +153,18 @@ sdhci0 { pinctrl_sdhci0: sdhci0 { atmel,pins = - ; /* PA20 DAT3 periph A with pullup */ + ; /* PA20 DAT3 periph A with pullup */ }; }; }; From 62495e2cdb2e26f74281a0f7f0195b55e6d92abe Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Wed, 11 Nov 2020 13:15:08 +0200 Subject: [PATCH 3/6] ARM: at91: armv7: sama7g5 uses CCF clock driver SAMA7G5 uses CCF driver under drivers/clk/at91/ and not the custom older at91 clock.c driver. Remove it from the compilation list and adapt cpu.c arch_cpu_init() to avoid calling at91_clock_init() which is wrong anyway. Signed-off-by: Nicolas Ferre Reviewed-by: Claudiu Beznea --- arch/arm/mach-at91/armv7/Makefile | 7 +++---- arch/arm/mach-at91/armv7/cpu.c | 4 ++++ 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-at91/armv7/Makefile b/arch/arm/mach-at91/armv7/Makefile index 55477560a86..b46b90b28e1 100644 --- a/arch/arm/mach-at91/armv7/Makefile +++ b/arch/arm/mach-at91/armv7/Makefile @@ -6,11 +6,10 @@ # (C) Copyright 2013 # Bo Shen -obj-$(CONFIG_SAMA5D2) += sama5d2_devices.o -obj-$(CONFIG_SAMA5D3) += sama5d3_devices.o -obj-$(CONFIG_SAMA5D4) += sama5d4_devices.o +obj-$(CONFIG_SAMA5D2) += sama5d2_devices.o clock.o +obj-$(CONFIG_SAMA5D3) += sama5d3_devices.o clock.o +obj-$(CONFIG_SAMA5D4) += sama5d4_devices.o clock.o obj-$(CONFIG_SAMA7G5) += sama7g5_devices.o -obj-y += clock.o obj-y += cpu.o obj-y += reset.o ifeq ($(CONFIG_ATMEL_PIT_TIMER),) diff --git a/arch/arm/mach-at91/armv7/cpu.c b/arch/arm/mach-at91/armv7/cpu.c index 8b7355042ba..9b3753491eb 100644 --- a/arch/arm/mach-at91/armv7/cpu.c +++ b/arch/arm/mach-at91/armv7/cpu.c @@ -24,7 +24,11 @@ int arch_cpu_init(void) { +#if defined(CONFIG_CLK_CCF) + return 0; +#else return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK); +#endif } void arch_preboot_os(void) From 6c5f79d0cec40b4637883d13c4312f08afeca5d3 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Wed, 11 Nov 2020 18:46:03 +0200 Subject: [PATCH 4/6] ARM: mach-at91: fix timer.o compile condition The AT91 architecture now has two possible timer blocks, the old PIT timer and the new PIT64B. The timer.c file has an old non DM driver that works for platforms that do not use the ATMEL_PIT_TIMER DM-based driver. Update the Makefile to select this old driver in case neither of the ATMEL_PIT_TIMER and the MCHP_PIT64B_TIMER are selected. Suggested-by: Claudiu Beznea Signed-off-by: Eugen Hristev --- arch/arm/mach-at91/armv7/Makefile | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/armv7/Makefile b/arch/arm/mach-at91/armv7/Makefile index b46b90b28e1..f5b26659578 100644 --- a/arch/arm/mach-at91/armv7/Makefile +++ b/arch/arm/mach-at91/armv7/Makefile @@ -12,6 +12,9 @@ obj-$(CONFIG_SAMA5D4) += sama5d4_devices.o clock.o obj-$(CONFIG_SAMA7G5) += sama7g5_devices.o obj-y += cpu.o obj-y += reset.o -ifeq ($(CONFIG_ATMEL_PIT_TIMER),) +ifneq ($(CONFIG_ATMEL_PIT_TIMER),y) +ifneq ($(CONFIG_MCHP_PIT64B_TIMER),y) +# old non-DM timer driver obj-y += timer.o endif +endif From 8454cf0d236639f36f465b5b5cf4ef8b572698b6 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Wed, 2 Dec 2020 13:39:33 +0200 Subject: [PATCH 5/6] clk: at91: sam9x60: remove the parsing of atmel, main-osc-bypass Remove the parsing of atmel,main-osc-bypass DT property as the SAM9X60 have no support for crystal oscillator bypass. Setting this bit might affect the device functionality. Fixes: a64862284f65 ("clk: at91: sam9x60: add support compatible with CCF") Signed-off-by: Claudiu Beznea --- drivers/clk/at91/sam9x60.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c index c3235f565d7..9e9a643d62d 100644 --- a/drivers/clk/at91/sam9x60.c +++ b/drivers/clk/at91/sam9x60.c @@ -382,7 +382,6 @@ static int sam9x60_clk_probe(struct udevice *dev) const char *p[10]; unsigned int cm[10], m[10], *tmpclkmux, *tmpmux; struct clk clk, *c; - bool main_osc_bypass; int ret, muxallocindex = 0, clkmuxallocindex = 0, i; static const struct clk_range r = { 0, 0 }; @@ -440,8 +439,6 @@ static int sam9x60_clk_probe(struct udevice *dev) if (ret) goto fail; - main_osc_bypass = dev_read_bool(dev, "atmel,main-osc-bypass"); - /* Register main rc oscillator. */ c = at91_clk_main_rc(base, clk_names[ID_MAIN_RC_OSC], clk_names[ID_MAIN_RC]); @@ -453,7 +450,7 @@ static int sam9x60_clk_probe(struct udevice *dev) /* Register main oscillator. */ c = at91_clk_main_osc(base, clk_names[ID_MAIN_OSC], - clk_names[ID_MAIN_XTAL], main_osc_bypass); + clk_names[ID_MAIN_XTAL], false); if (IS_ERR(c)) { ret = PTR_ERR(c); goto fail; From bb5eedbc7fbddc7849bb10a239facac29b615c1c Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Mon, 7 Dec 2020 09:30:59 +0200 Subject: [PATCH 6/6] ARM: dts: at91: sama5d2_icp: fix i2c eeprom compatible The correct compatible for this eeproms is microchip,24aa02e48 The previous compatible string was working up to U-boot 2020.04. Signed-off-by: Eugen Hristev Tested-by: Codrin Ciubotariu --- arch/arm/dts/at91-sama5d2_icp.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/at91-sama5d2_icp.dts b/arch/arm/dts/at91-sama5d2_icp.dts index cae8748268e..f81fa601714 100644 --- a/arch/arm/dts/at91-sama5d2_icp.dts +++ b/arch/arm/dts/at91-sama5d2_icp.dts @@ -53,19 +53,19 @@ status = "okay"; eeprom@50 { - compatible = "atmel,24c32"; + compatible = "microchip,24aa02e48"; reg = <0x50>; pagesize = <16>; }; eeprom@52 { - compatible = "atmel,24c32"; + compatible = "microchip,24aa02e48"; reg = <0x52>; pagesize = <16>; }; eeprom@53 { - compatible = "atmel,24c32"; + compatible = "microchip,24aa02e48"; reg = <0x53>; pagesize = <16>; };