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dts: move device tree sources to arch/$(ARCH)/dts/

Browse Source 
Unlike Linux Kernel, U-Boot historically had *.dts files under
board/$(VENDOR)/dts/ and *.dtsi files under arch/$(ARCH)/dts/.

I think arch/$(ARCH)/dts dicretory is a better location
to store both *.dts and *.dtsi files.

For example, before this commit, board/xilinx/dts directory
had both Microblaze dts (microblaze-generic.dts) and
ARM dts (zynq-*.dts), which are totally unrelated.

This commit moves *.dts to arch/$(ARCH)/dts/ directories,
allowing us to describe nicely mutiple DTBs generation in the next commit.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This commit is contained in:
Masahiro Yamada
2014-02-05 11:28:26 +09:00
committed by Tom Rini
parent 6ab6b2afa0
commit 5ab502cb89
32 changed files with 2 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

39
arch/arm/dts/exynos5250-arndale.dts Normal file
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/*
* SAMSUNG Arndale board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "exynos5250.dtsi"
/ {
model = "SAMSUNG Arndale board based on EXYNOS5250";
compatible = "samsung,arndale", "samsung,exynos5250";
aliases {
serial0 = "/serial@12C20000";
console = "/serial@12C20000";
};
mmc@12200000 {
samsung,bus-width = <8>;
samsung,timing = <1 3 3>;
};
mmc@12210000 {
status = "disabled";
};
mmc@12220000 {
samsung,bus-width = <4>;
samsung,timing = <1 2 3>;
};
mmc@12230000 {
status = "disabled";
};
};

151
arch/arm/dts/exynos5250-smdk5250.dts Normal file
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/*
* SAMSUNG SMDK5250 board device tree source
*
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
/include/ "exynos5250.dtsi"
/ {
model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
compatible = "samsung,smdk5250", "samsung,exynos5250";
aliases {
i2c0 = "/i2c@12c60000";
i2c1 = "/i2c@12c70000";
i2c2 = "/i2c@12c80000";
i2c3 = "/i2c@12c90000";
i2c4 = "/i2c@12ca0000";
i2c5 = "/i2c@12cb0000";
i2c6 = "/i2c@12cc0000";
i2c7 = "/i2c@12cd0000";
spi0 = "/spi@12d20000";
spi1 = "/spi@12d30000";
spi2 = "/spi@12d40000";
spi3 = "/spi@131a0000";
spi4 = "/spi@131b0000";
mmc0 = "/mmc@12200000";
mmc1 = "/mmc@12210000";
mmc2 = "/mmc@12220000";
mmc3 = "/mmc@12230000";
serial0 = "/serial@12C30000";
console = "/serial@12C30000";
i2s = "/sound@3830000";
};
sromc@12250000 {
bank = <1>;
srom-timing = <1 9 12 1 6 1 1>;
width = <2>;
lan@5000000 {
compatible = "smsc,lan9215", "smsc,lan";
reg = <0x5000000 0x100>;
phy-mode = "mii";
};
};
sound@3830000 {
samsung,codec-type = "wm8994";
};
sound@12d60000 {
status = "disabled";
};
i2c@12c70000 {
soundcodec@1a {
reg = <0x1a>;
compatible = "wolfson,wm8994-codec";
};
};
i2c@12c60000 {
pmic@9 {
reg = <0x9>;
compatible = "maxim,max77686_pmic";
};
};
tmu@10060000 {
samsung,min-temp = <25>;
samsung,max-temp = <125>;
samsung,start-warning = <95>;
samsung,start-tripping = <105>;
samsung,hw-tripping = <110>;
samsung,efuse-min-value = <40>;
samsung,efuse-value = <55>;
samsung,efuse-max-value = <100>;
samsung,slope = <274761730>;
samsung,dc-value = <25>;
};
fimd@14400000 {
samsung,vl-freq = <60>;
samsung,vl-col = <2560>;
samsung,vl-row = <1600>;
samsung,vl-width = <2560>;
samsung,vl-height = <1600>;
samsung,vl-clkp;
samsung,vl-dp;
samsung,vl-bpix = <4>;
samsung,vl-hspw = <32>;
samsung,vl-hbpd = <80>;
samsung,vl-hfpd = <48>;
samsung,vl-vspw = <6>;
samsung,vl-vbpd = <37>;
samsung,vl-vfpd = <3>;
samsung,vl-cmd-allow-len = <0xf>;
samsung,winid = <3>;
samsung,interface-mode = <1>;
samsung,dp-enabled = <1>;
samsung,dual-lcd-enabled = <0>;
};
dp@145b0000 {
samsung,lt-status = <0>;
samsung,master-mode = <0>;
samsung,bist-mode = <0>;
samsung,bist-pattern = <0>;
samsung,h-sync-polarity = <0>;
samsung,v-sync-polarity = <0>;
samsung,interlaced = <0>;
samsung,color-space = <0>;
samsung,dynamic-range = <0>;
samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
};
mmc@12200000 {
samsung,bus-width = <8>;
samsung,timing = <1 3 3>;
samsung,removable = <0>;
};
mmc@12210000 {
status = "disabled";
};
mmc@12220000 {
samsung,bus-width = <4>;
samsung,timing = <1 2 3>;
samsung,removable = <1>;
};
mmc@12230000 {
status = "disabled";
};
ehci@12110000 {
samsung,vbus-gpio = <&gpio 0x316 0>; /* X26 */
};
};

187
arch/arm/dts/exynos5250-snow.dts Normal file
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/*
* SAMSUNG Snow board device tree source
*
* Copyright (c) 2012 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
/include/ "exynos5250.dtsi"
/ {
model = "Google Snow";
compatible = "google,snow", "samsung,exynos5250";
aliases {
i2c0 = "/i2c@12c60000";
i2c1 = "/i2c@12c70000";
i2c2 = "/i2c@12c80000";
i2c3 = "/i2c@12c90000";
i2c4 = "/i2c@12ca0000";
i2c5 = "/i2c@12cb0000";
i2c6 = "/i2c@12cc0000";
i2c7 = "/i2c@12cd0000";
spi0 = "/spi@12d20000";
spi1 = "/spi@12d30000";
spi2 = "/spi@12d40000";
spi3 = "/spi@131a0000";
spi4 = "/spi@131b0000";
mmc0 = "/mmc@12200000";
mmc1 = "/mmc@12210000";
mmc2 = "/mmc@12220000";
mmc3 = "/mmc@12230000";
serial0 = "/serial@12C30000";
console = "/serial@12C30000";
i2s = "/sound@3830000";
};
i2c4: i2c@12ca0000 {
cros-ec@1e {
reg = <0x1e>;
compatible = "google,cros-ec";
i2c-max-frequency = <100000>;
ec-interrupt = <&gpio 782 1>;
};
power-regulator@48 {
compatible = "ti,tps65090";
reg = <0x48>;
};
};
spi@131b0000 {
spi-max-frequency = <1000000>;
spi-deactivate-delay = <100>;
cros-ec@0 {
reg = <0>;
compatible = "google,cros-ec";
spi-max-frequency = <5000000>;
ec-interrupt = <&gpio 782 1>;
optimise-flash-write;
status = "disabled";
};
};
sound@3830000 {
samsung,codec-type = "max98095";
codec-enable-gpio = <&gpio 0xb7 0>;
};
sound@12d60000 {
status = "disabled";
};
i2c@12cd0000 {
soundcodec@22 {
reg = <0x22>;
compatible = "maxim,max98095-codec";
};
};
i2c@12c60000 {
pmic@9 {
reg = <0x9>;
compatible = "maxim,max77686_pmic";
};
};
mmc@12200000 {
samsung,bus-width = <8>;
samsung,timing = <1 3 3>;
samsung,removable = <0>;
};
mmc@12210000 {
status = "disabled";
};
mmc@12220000 {
samsung,bus-width = <4>;
samsung,timing = <1 2 3>;
samsung,removable = <1>;
};
mmc@12230000 {
status = "disabled";
};
ehci@12110000 {
samsung,vbus-gpio = <&gpio 0x309 0>; /* X11 */
};
xhci@12000000 {
samsung,vbus-gpio = <&gpio 0x317 0>; /* X27 */
};
tmu@10060000 {
samsung,min-temp = <25>;
samsung,max-temp = <125>;
samsung,start-warning = <95>;
samsung,start-tripping = <105>;
samsung,hw-tripping = <110>;
samsung,efuse-min-value = <40>;
samsung,efuse-value = <55>;
samsung,efuse-max-value = <100>;
samsung,slope = <274761730>;
samsung,dc-value = <25>;
};
cros-ec-keyb {
compatible = "google,cros-ec-keyb";
google,key-rows = <8>;
google,key-columns = <13>;
google,repeat-delay-ms = <240>;
google,repeat-rate-ms = <30>;
google,ghost-filter;
/*
* Keymap entries take the form of 0xRRCCKKKK where
* RR=Row CC=Column KKKK=Key Code
* The values below are for a US keyboard layout and
* are taken from the Linux driver. Note that the
* 102ND key is not used for US keyboards.
*/
linux,keymap = <
/* CAPSLCK F1 B F10 */
0x0001003a 0x0002003b 0x00030030 0x00040044
/* N = R_ALT ESC */
0x00060031 0x0008000d 0x000a0064 0x01010001
/* F4 G F7 H */
0x0102003e 0x01030022 0x01040041 0x01060023
/* ' F9 BKSPACE L_CTRL */
0x01080028 0x01090043 0x010b000e 0x0200001d
/* TAB F3 T F6 */
0x0201000f 0x0202003d 0x02030014 0x02040040
/* ] Y 102ND [ */
0x0205001b 0x02060015 0x02070056 0x0208001a
/* F8 GRAVE F2 5 */
0x02090042 0x03010029 0x0302003c 0x03030006
/* F5 6 - \ */
0x0304003f 0x03060007 0x0308000c 0x030b002b
/* R_CTRL A D F */
0x04000061 0x0401001e 0x04020020 0x04030021
/* S K J ; */
0x0404001f 0x04050025 0x04060024 0x04080027
/* L ENTER Z C */
0x04090026 0x040b001c 0x0501002c 0x0502002e
/* V X , M */
0x0503002f 0x0504002d 0x05050033 0x05060032
/* L_SHIFT / . SPACE */
0x0507002a 0x05080035 0x05090034 0x050B0039
/* 1 3 4 2 */
0x06010002 0x06020004 0x06030005 0x06040003
/* 8 7 0 9 */
0x06050009 0x06060008 0x0608000b 0x0609000a
/* L_ALT DOWN RIGHT Q */
0x060a0038 0x060b006c 0x060c006a 0x07010010
/* E R W I */
0x07020012 0x07030013 0x07040011 0x07050017
/* U R_SHIFT P O */
0x07060016 0x07070036 0x07080019 0x07090018
/* UP LEFT */
0x070b0067 0x070c0069>;
};
};

169
arch/arm/dts/exynos5420-smdk5420.dts Normal file
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/*
* SAMSUNG SMDK5420 board device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
/include/ "exynos5420.dtsi"
/ {
model = "SAMSUNG SMDK5420 board based on EXYNOS5420";
compatible = "samsung,smdk5420", "samsung,exynos5";
config {
hwid = "smdk5420 TEST A-A 9382";
};
aliases {
i2c0 = "/i2c@12c60000";
i2c1 = "/i2c@12c70000";
i2c2 = "/i2c@12c80000";
i2c3 = "/i2c@12c90000";
i2c4 = "/i2c@12ca0000";
i2c5 = "/i2c@12cb0000";
i2c6 = "/i2c@12cc0000";
i2c7 = "/i2c@12cd0000";
i2c8 = "/i2c@12e00000";
i2c9 = "/i2c@12e10000";
i2c10 = "/i2c@12e20000";
spi0 = "/spi@12d20000";
spi1 = "/spi@12d30000";
spi2 = "/spi@12d40000";
spi3 = "/spi@131a0000";
spi4 = "/spi@131b0000";
mmc0 = "/mmc@12200000";
mmc1 = "/mmc@12210000";
mmc2 = "/mmc@12220000";
xhci0 = "/xhci@12000000";
xhci1 = "/xhci@12400000";
serial0 = "/serial@12C30000";
console = "/serial@12C30000";
};
tmu@10060000 {
samsung,min-temp = <25>;
samsung,max-temp = <125>;
samsung,start-warning = <95>;
samsung,start-tripping = <105>;
samsung,hw-tripping = <110>;
samsung,efuse-min-value = <40>;
samsung,efuse-value = <55>;
samsung,efuse-max-value = <100>;
samsung,slope = <274761730>;
samsung,dc-value = <25>;
};
/* s2mps11 is on i2c bus 4 */
i2c@12ca0000 {
#address-cells = <1>;
#size-cells = <0>;
pmic@66 {
reg = <0x66>;
compatible = "samsung,s2mps11-pmic";
};
};
spi@12d20000 { /* spi0 */
spi-max-frequency = <50000000>;
firmware_storage_spi: flash@0 {
reg = <0>;
};
};
fimd@14400000 {
samsung,vl-freq = <60>;
samsung,vl-col = <2560>;
samsung,vl-row = <1600>;
samsung,vl-width = <2560>;
samsung,vl-height = <1600>;
samsung,vl-clkp;
samsung,vl-dp;
samsung,vl-bpix = <4>;
samsung,vl-hspw = <32>;
samsung,vl-hbpd = <80>;
samsung,vl-hfpd = <48>;
samsung,vl-vspw = <6>;
samsung,vl-vbpd = <37>;
samsung,vl-vfpd = <3>;
samsung,vl-cmd-allow-len = <0xf>;
samsung,winid = <3>;
samsung,interface-mode = <1>;
samsung,dp-enabled = <1>;
samsung,dual-lcd-enabled = <0>;
};
sound@3830000 {
samsung,codec-type = "wm8994";
};
i2c@12c70000 {
soundcodec@1a {
reg = <0x1a>;
compatible = "wolfson,wm8994-codec";
};
};
mmc@12200000 {
samsung,bus-width = <8>;
samsung,timing = <1 3 3>;
samsung,removable = <0>;
samsung,pre-init;
};
mmc@12210000 {
status = "disabled";
};
mmc@12220000 {
samsung,bus-width = <4>;
samsung,timing = <1 2 3>;
samsung,removable = <1>;
};
mmc@12230000 {
status = "disabled";
};
fimd@14400000 {
/* sysmmu is not used in U-Boot */
samsung,disable-sysmmu;
};
dp@145b0000 {
samsung,lt-status = <0>;
samsung,master-mode = <0>;
samsung,bist-mode = <0>;
samsung,bist-pattern = <0>;
samsung,h-sync-polarity = <0>;
samsung,v-sync-polarity = <0>;
samsung,interlaced = <0>;
samsung,color-space = <0>;
samsung,dynamic-range = <0>;
samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
};
dmc {
mem-type = "ddr3";
};
xhci1: xhci@12400000 {
compatible = "samsung,exynos5250-xhci";
reg = <0x12400000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
phy {
compatible = "samsung,exynos5250-usb3-phy";
reg = <0x12500000 0x100>;
};
};
};

71
arch/arm/dts/tegra114-dalmore.dts Normal file
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/dts-v1/;
#include "tegra114.dtsi"
/ {
model = "NVIDIA Dalmore";
compatible = "nvidia,dalmore", "nvidia,tegra114";
aliases {
i2c0 = "/i2c@7000d000";
i2c1 = "/i2c@7000c000";
i2c2 = "/i2c@7000c400";
i2c3 = "/i2c@7000c500";
i2c4 = "/i2c@7000c700";
sdhci0 = "/sdhci@78000600";
sdhci1 = "/sdhci@78000400";
usb0 = "/usb@7d008000";
};
memory {
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c400 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c500 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c700 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000d000 {
status = "okay";
clock-frequency = <400000>;
};
spi@7000da00 {
status = "okay";
spi-max-frequency = <25000000>;
};
sdhci@78000400 {
cd-gpios = <&gpio 170 1>; /* gpio PV2 */
bus-width = <4>;
status = "okay";
};
sdhci@78000600 {
bus-width = <8>;
status = "okay";
};
usb@7d008000 {
/* SPDIF_IN: USB_VBUS_EN1 */
nvidia,vbus-gpio = <&gpio 86 0>;
status = "okay";
};
};

45
arch/arm/dts/tegra20-colibri_t20_iris.dts Normal file
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@@ -0,0 +1,45 @@
/dts-v1/;
#include "tegra20.dtsi"
/ {
model = "Toradex Colibri T20";
compatible = "toradex,t20", "nvidia,tegra20";
aliases {
usb0 = "/usb@c5008000";
usb1 = "/usb@c5000000";
usb2 = "/usb@c5004000";
sdhci0 = "/sdhci@c8000600";
};
usb@c5000000 {
dr_mode = "otg";
};
usb@c5004000 {
nvidia,phy-reset-gpio = <&gpio 169 0>; /* PV1 */
nvidia,vbus-gpio = <&gpio 217 0>; /* PBB1 */
};
usb@c5008000 {
nvidia,vbus-gpio = <&gpio 178 1>; /* PW2 low-active */
};
nand-controller@70008000 {
nvidia,wp-gpios = <&gpio 144 0>; /* PS0 */
nvidia,width = <8>;
nvidia,timing = <15 100 25 80 25 10 15 10 100>;
nand@0 {
reg = <0>;
compatible = "nand-flash";
};
};
sdhci@c8000600 {
status = "okay";
cd-gpios = <&gpio 23 1>; /* gpio PC7 */
bus-width = <4>;
};
};

105
arch/arm/dts/tegra20-harmony.dts Normal file
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/dts-v1/;
#include "tegra20.dtsi"
/ {
model = "NVIDIA Tegra20 Harmony evaluation board";
compatible = "nvidia,harmony", "nvidia,tegra20";
aliases {
usb0 = "/usb@c5008000";
usb1 = "/usb@c5004000";
sdhci0 = "/sdhci@c8000600";
sdhci1 = "/sdhci@c8000200";
};
memory {
reg = <0x00000000 0x40000000>;
};
host1x {
status = "okay";
dc@54200000 {
status = "okay";
rgb {
status = "okay";
nvidia,panel = <&lcd_panel>;
};
};
};
serial@70006300 {
clock-frequency = < 216000000 >;
};
nand-controller@70008000 {
nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
nvidia,width = <8>;
nvidia,timing = <26 100 20 80 20 10 12 10 70>;
nand@0 {
reg = <0>;
compatible = "hynix,hy27uf4g2b", "nand-flash";
};
};
i2c@7000c000 {
status = "disabled";
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
status = "disabled";
};
i2c@7000d000 {
status = "disabled";
};
usb@c5000000 {
status = "disabled";
};
usb@c5004000 {
nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
};
sdhci@c8000200 {
status = "okay";
cd-gpios = <&gpio 69 1>; /* gpio PI5 */
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
power-gpios = <&gpio 155 0>; /* gpio PT3 */
bus-width = <4>;
};
sdhci@c8000600 {
status = "okay";
cd-gpios = <&gpio 58 1>; /* gpio PH2 */
wp-gpios = <&gpio 59 0>; /* gpio PH3 */
power-gpios = <&gpio 70 0>; /* gpio PI6 */
bus-width = <8>;
};
lcd_panel: panel {
clock = <42430000>;
xres = <1024>;
yres = <600>;
left-margin = <138>;
right-margin = <34>;
hsync-len = <136>;
lower-margin = <4>;
upper-margin = <21>;
vsync-len = <4>;
hsync-active-high;
vsyncx-active-high;
nvidia,bits-per-pixel = <16>;
nvidia,pwm = <&pwm 0 0>;
nvidia,backlight-enable-gpios = <&gpio 13 0>; /* PB5 */
nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
nvidia,panel-timings = <0 0 200 0 0>;
};
};

77
arch/arm/dts/tegra20-medcom-wide.dts Normal file
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@@ -0,0 +1,77 @@
/dts-v1/;
#include "tegra20-tamonten.dtsi"
/ {
model = "Avionic Design Medcom-Wide";
compatible = "ad,medcom-wide", "nvidia,tegra20";
aliases {
usb0 = "/usb@c5008000";
sdhci0 = "/sdhci@c8000600";
};
memory {
reg = <0x00000000 0x20000000>;
};
host1x {
status = "okay";
dc@54200000 {
status = "okay";
rgb {
nvidia,panel = <&lcd_panel>;
status = "okay";
};
};
};
serial@70006300 {
clock-frequency = <216000000>;
};
i2c@7000c000 {
status = "disabled";
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
status = "disabled";
};
i2c@7000d000 {
status = "disabled";
};
usb@c5000000 {
status = "disabled";
};
usb@c5004000 {
status = "disabled";
};
lcd_panel: panel {
clock = <61715000>;
xres = <1366>;
yres = <768>;
left-margin = <2>;
right-margin = <47>;
hsync-len = <136>;
lower-margin = <21>;
upper-margin = <11>;
vsync-len = <4>;
nvidia,bits-per-pixel = <16>;
nvidia,pwm = <&pwm 0 500000>;
nvidia,backlight-enable-gpios = <&gpio 13 0>; /* PB5 */
nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
nvidia,panel-timings = <0 0 0 0>;
};
};

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arch/arm/dts/tegra20-paz00.dts Normal file
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/dts-v1/;
#include "tegra20.dtsi"
/ {
model = "Toshiba AC100 / Dynabook AZ";
compatible = "compal,paz00", "nvidia,tegra20";
aliases {
usb0 = "/usb@c5008000";
sdhci0 = "/sdhci@c8000600";
sdhci1 = "/sdhci@c8000000";
};
memory {
reg = <0x00000000 0x20000000>;
};
host1x {
status = "okay";
dc@54200000 {
status = "okay";
rgb {
status = "okay";
nvidia,panel = <&lcd_panel>;
};
};
};
serial@70006000 {
clock-frequency = < 216000000 >;
};
i2c@7000c000 {
status = "disabled";
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
status = "disabled";
};
i2c@7000d000 {
status = "disabled";
};
usb@c5000000 {
status = "disabled";
};
usb@c5004000 {
status = "disabled";
};
sdhci@c8000000 {
status = "okay";
cd-gpios = <&gpio 173 1>; /* gpio PV5 */
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
power-gpios = <&gpio 169 0>; /* gpio PV1 */
bus-width = <4>;
};
sdhci@c8000600 {
status = "okay";
bus-width = <8>;
};
lcd_panel: panel {
/* PAZ00 has 1024x600 */
clock = <54030000>;
xres = <1024>;
yres = <600>;
right-margin = <160>;
left-margin = <24>;
hsync-len = <136>;
upper-margin = <3>;
lower-margin = <61>;
vsync-len = <6>;
hsync-active-high;
nvidia,bits-per-pixel = <16>;
nvidia,pwm = <&pwm 0 0>;
nvidia,backlight-enable-gpios = <&gpio 164 0>; /* PU4 */
nvidia,lvds-shutdown-gpios = <&gpio 102 0>; /* PM6 */
nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
nvidia,panel-vdd-gpios = <&gpio 4 0>; /* PA4 */
nvidia,panel-timings = <400 4 203 17 15>;
};
};

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arch/arm/dts/tegra20-plutux.dts Normal file
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/dts-v1/;
#include "tegra20-tamonten.dtsi"
/ {
model = "Avionic Design Plutux";
compatible = "ad,plutux", "nvidia,tegra20";
aliases {
usb0 = "/usb@c5008000";
sdhci0 = "/sdhci@c8000600";
};
memory {
reg = <0x00000000 0x20000000>;
};
serial@70006300 {
clock-frequency = <216000000>;
};
i2c@7000c000 {
status = "disabled";
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
status = "disabled";
};
i2c@7000d000 {
status = "disabled";
};
usb@c5000000 {
status = "disabled";
};
usb@c5004000 {
status = "disabled";
};
};

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/dts-v1/;
#include "tegra20.dtsi"
/ {
model = "NVIDIA Seaboard";
compatible = "nvidia,seaboard", "nvidia,tegra20";
chosen {
bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait";
};
aliases {
/* This defines the order of our ports */
usb0 = "/usb@c5008000";
usb1 = "/usb@c5000000";
i2c0 = "/i2c@7000d000";
i2c1 = "/i2c@7000c000";
i2c2 = "/i2c@7000c400";
i2c3 = "/i2c@7000c500";
sdhci0 = "/sdhci@c8000600";
sdhci1 = "/sdhci@c8000400";
};
memory {
device_type = "memory";
reg = < 0x00000000 0x40000000 >;
};
host1x {
status = "okay";
dc@54200000 {
status = "okay";
rgb {
status = "okay";
nvidia,panel = <&lcd_panel>;
};
};
};
/* This is not used in U-Boot, but is expected to be in kernel .dts */
i2c@7000d000 {
clock-frequency = <100000>;
pmic@34 {
compatible = "ti,tps6586x";
reg = <0x34>;
clk_32k: clock {
compatible = "fixed-clock";
/*
* leave out for now due to CPP:
* #clock-cells = <0>;
*/
clock-frequency = <32768>;
};
};
};
serial@70006300 {
clock-frequency = < 216000000 >;
};
nand-controller@70008000 {
nvidia,wp-gpios = <&gpio 59 0>; /* PH3 */
nvidia,width = <8>;
nvidia,timing = <26 100 20 80 20 10 12 10 70>;
nand@0 {
reg = <0>;
compatible = "hynix,hy27uf4g2b", "nand-flash";
};
};
i2c@7000c000 {
clock-frequency = <100000>;
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
clock-frequency = <100000>;
};
kbc@7000e200 {
linux,keymap = <0x00020011 0x0003001f 0x0004001e 0x0005002c
0x000701d0 0x0107007d 0x02060064 0x02070038 0x03000006
0x03010005 0x03020013 0x03030012 0x03040021 0x03050020
0x0306002d 0x04000008 0x04010007 0x04020014 0x04030023
0x04040022 0x0405002f 0x0406002e 0x04070039 0x0500000a
0x05010009 0x05020016 0x05030015 0x05040024 0x05050031
0x05060030 0x0507002b 0x0600000c 0x0601000b 0x06020018
0x06030017 0x06040026 0x06050025 0x06060033 0x06070032
0x0701000d 0x0702001b 0x0703001c 0x0707008b 0x08040036
0x0805002a 0x09050061 0x0907001d 0x0b00001a 0x0b010019
0x0b020028 0x0b030027 0x0b040035 0x0b050034 0x0c000044
0x0c010043 0x0c02000e 0x0c030004 0x0c040003 0x0c050067
0x0c0600d2 0x0c070077 0x0d00006e 0x0d01006f 0x0d030068
0x0d04006d 0x0d05006a 0x0d06006c 0x0d070069 0x0e000057
0x0e010058 0x0e020042 0x0e030010 0x0e04003e 0x0e05003d
0x0e060002 0x0e070041 0x0f000001 0x0f010029 0x0f02003f
0x0f03000f 0x0f04003b 0x0f05003c 0x0f06003a 0x0f070040
0x14000047 0x15000049 0x15010048 0x1502004b 0x1504004f
0x16010062 0x1602004d 0x1603004c 0x16040051 0x16050050
0x16070052 0x1b010037 0x1b03004a 0x1b04004e 0x1b050053
0x1c050073 0x1d030066 0x1d04006b 0x1d0500e0 0x1d060072
0x1d0700e1 0x1e000045 0x1e010046 0x1e020071
0x1f04008a>;
linux,fn-keymap = <0x05040002>;
};
emc@7000f400 {
emc-table@190000 {
reg = < 190000 >;
compatible = "nvidia,tegra20-emc-table";
clock-frequency = < 190000 >;
nvidia,emc-registers = < 0x0000000c 0x00000026
0x00000009 0x00000003 0x00000004 0x00000004
0x00000002 0x0000000c 0x00000003 0x00000003
0x00000002 0x00000001 0x00000004 0x00000005
0x00000004 0x00000009 0x0000000d 0x0000059f
0x00000000 0x00000003 0x00000003 0x00000003
0x00000003 0x00000001 0x0000000b 0x000000c8
0x00000003 0x00000007 0x00000004 0x0000000f
0x00000002 0x00000000 0x00000000 0x00000002
0x00000000 0x00000000 0x00000083 0xa06204ae
0x007dc010 0x00000000 0x00000000 0x00000000
0x00000000 0x00000000 0x00000000 0x00000000 >;
};
emc-table@380000 {
reg = < 380000 >;
compatible = "nvidia,tegra20-emc-table";
clock-frequency = < 380000 >;
nvidia,emc-registers = < 0x00000017 0x0000004b
0x00000012 0x00000006 0x00000004 0x00000005
0x00000003 0x0000000c 0x00000006 0x00000006
0x00000003 0x00000001 0x00000004 0x00000005
0x00000004 0x00000009 0x0000000d 0x00000b5f
0x00000000 0x00000003 0x00000003 0x00000006
0x00000006 0x00000001 0x00000011 0x000000c8
0x00000003 0x0000000e 0x00000007 0x0000000f
0x00000002 0x00000000 0x00000000 0x00000002
0x00000000 0x00000000 0x00000083 0xe044048b
0x007d8010 0x00000000 0x00000000 0x00000000
0x00000000 0x00000000 0x00000000 0x00000000 >;
};
};
usb@c5000000 {
nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
dr_mode = "otg";
};
usb@c5004000 {
status = "disabled";
};
sdhci@c8000400 {
status = "okay";
cd-gpios = <&gpio 69 1>; /* gpio PI5 */
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
power-gpios = <&gpio 70 0>; /* gpio PI6 */
bus-width = <4>;
};
sdhci@c8000600 {
status = "okay";
bus-width = <8>;
};
lcd_panel: panel {
/* Seaboard has 1366x768 */
clock = <70600000>;
xres = <1366>;
yres = <768>;
left-margin = <58>;
right-margin = <58>;
hsync-len = <58>;
lower-margin = <4>;
upper-margin = <4>;
vsync-len = <4>;
hsync-active-high;
nvidia,bits-per-pixel = <16>;
nvidia,pwm = <&pwm 2 0>;
nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
nvidia,panel-timings = <400 4 203 17 15>;
};
};

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#include "tegra20.dtsi"
/ {
model = "Avionic Design Tamonten SOM";
compatible = "ad,tamonten", "nvidia,tegra20";
memory {
reg = <0x00000000 0x20000000>;
};
host1x {
hdmi {
vdd-supply = <&hdmi_vdd_reg>;
pll-supply = <&hdmi_pll_reg>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
};
};
pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
ata {
nvidia,pins = "ata";
nvidia,function = "ide";
};
atb {
nvidia,pins = "atb", "gma", "gme";
nvidia,function = "sdio4";
};
atc {
nvidia,pins = "atc";
nvidia,function = "nand";
};
atd {
nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
"spia", "spib", "spic";
nvidia,function = "gmi";
};
cdev1 {
nvidia,pins = "cdev1";
nvidia,function = "plla_out";
};
cdev2 {
nvidia,pins = "cdev2";
nvidia,function = "pllp_out4";
};
crtp {
nvidia,pins = "crtp";
nvidia,function = "crt";
};
csus {
nvidia,pins = "csus";
nvidia,function = "vi_sensor_clk";
};
dap1 {
nvidia,pins = "dap1";
nvidia,function = "dap1";
};
dap2 {
nvidia,pins = "dap2";
nvidia,function = "dap2";
};
dap3 {
nvidia,pins = "dap3";
nvidia,function = "dap3";
};
dap4 {
nvidia,pins = "dap4";
nvidia,function = "dap4";
};
dta {
nvidia,pins = "dta", "dtd";
nvidia,function = "sdio2";
};
dtb {
nvidia,pins = "dtb", "dtc", "dte";
nvidia,function = "rsvd1";
};
dtf {
nvidia,pins = "dtf";
nvidia,function = "i2c3";
};
gmc {
nvidia,pins = "gmc";
nvidia,function = "uartd";
};
gpu7 {
nvidia,pins = "gpu7";
nvidia,function = "rtck";
};
gpv {
nvidia,pins = "gpv", "slxa", "slxk";
nvidia,function = "pcie";
};
hdint {
nvidia,pins = "hdint";
nvidia,function = "hdmi";
};
i2cp {
nvidia,pins = "i2cp";
nvidia,function = "i2cp";
};
irrx {
nvidia,pins = "irrx", "irtx";
nvidia,function = "uarta";
};
kbca {
nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
"kbce", "kbcf";
nvidia,function = "kbc";
};
lcsn {
nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
"ld3", "ld4", "ld5", "ld6", "ld7",
"ld8", "ld9", "ld10", "ld11", "ld12",
"ld13", "ld14", "ld15", "ld16", "ld17",
"ldc", "ldi", "lhp0", "lhp1", "lhp2",
"lhs", "lm0", "lm1", "lpp", "lpw0",
"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
"lsda", "lsdi", "lspi", "lvp0", "lvp1",
"lvs";
nvidia,function = "displaya";
};
owc {
nvidia,pins = "owc", "spdi", "spdo", "uac";
nvidia,function = "rsvd2";
};
pmc {
nvidia,pins = "pmc";
nvidia,function = "pwr_on";
};
rm {
nvidia,pins = "rm";
nvidia,function = "i2c1";
};
sdb {
nvidia,pins = "sdb", "sdc", "sdd";
nvidia,function = "pwm";
};
sdio1 {
nvidia,pins = "sdio1";
nvidia,function = "sdio1";
};
slxc {
nvidia,pins = "slxc", "slxd";
nvidia,function = "spdif";
};
spid {
nvidia,pins = "spid", "spie", "spif";
nvidia,function = "spi1";
};
spig {
nvidia,pins = "spig", "spih";
nvidia,function = "spi2_alt";
};
uaa {
nvidia,pins = "uaa", "uab", "uda";
nvidia,function = "ulpi";
};
uad {
nvidia,pins = "uad";
nvidia,function = "irda";
};
uca {
nvidia,pins = "uca", "ucb";
nvidia,function = "uartc";
};
conf_ata {
nvidia,pins = "ata", "atb", "atc", "atd", "ate",
"cdev1", "cdev2", "dap1", "dtb", "gma",
"gmb", "gmc", "gmd", "gme", "gpu7",
"gpv", "i2cp", "pta", "rm", "slxa",
"slxk", "spia", "spib", "uac";
nvidia,pull = <0>;
nvidia,tristate = <0>;
};
conf_ck32 {
nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
nvidia,pull = <0>;
};
conf_csus {
nvidia,pins = "csus", "spid", "spif";
nvidia,pull = <1>;
nvidia,tristate = <1>;
};
conf_crtp {
nvidia,pins = "crtp", "dap2", "dap3", "dap4",
"dtc", "dte", "dtf", "gpu", "sdio1",
"slxc", "slxd", "spdi", "spdo", "spig",
"uda";
nvidia,pull = <0>;
nvidia,tristate = <1>;
};
conf_ddc {
nvidia,pins = "ddc", "dta", "dtd", "kbca",
"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
"sdc";
nvidia,pull = <2>;
nvidia,tristate = <0>;
};
conf_hdint {
nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
"lpw1", "lsc1", "lsck", "lsda", "lsdi",
"lvp0", "owc", "sdb";
nvidia,tristate = <1>;
};
conf_irrx {
nvidia,pins = "irrx", "irtx", "sdd", "spic",
"spie", "spih", "uaa", "uab", "uad",
"uca", "ucb";
nvidia,pull = <2>;
nvidia,tristate = <1>;
};
conf_lc {
nvidia,pins = "lc", "ls";
nvidia,pull = <2>;
};
conf_ld0 {
nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
"ld5", "ld6", "ld7", "ld8", "ld9",
"ld10", "ld11", "ld12", "ld13", "ld14",
"ld15", "ld16", "ld17", "ldi", "lhp0",
"lhp1", "lhp2", "lhs", "lm0", "lpp",
"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
"lvs", "pmc";
nvidia,tristate = <0>;
};
conf_ld17_0 {
nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
"ld23_22";
nvidia,pull = <1>;
};
};
state_i2cmux_ddc: pinmux_i2cmux_ddc {
ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
};
pta {
nvidia,pins = "pta";
nvidia,function = "rsvd4";
};
};
state_i2cmux_pta: pinmux_i2cmux_pta {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
};
pta {
nvidia,pins = "pta";
nvidia,function = "i2c2";
};
};
state_i2cmux_idle: pinmux_i2cmux_idle {
ddc {
nvidia,pins = "ddc";
nvidia,function = "rsvd4";
};
pta {
nvidia,pins = "pta";
nvidia,function = "rsvd4";
};
};
};
i2s@70002800 {
status = "okay";
};
serial@70006300 {
status = "okay";
};
nand-controller@70008000 {
nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
nvidia,width = <8>;
nvidia,timing = <26 100 20 80 20 10 12 10 70>;
nand@0 {
reg = <0>;
compatible = "hynix,hy27uf4g2b", "nand-flash";
};
};
i2c@7000c000 {
clock-frequency = <400000>;
status = "okay";
};
i2c@7000c400 {
clock-frequency = <100000>;
status = "okay";
};
i2cmux {
compatible = "i2c-mux-pinctrl";
#address-cells = <1>;
#size-cells = <0>;
i2c-parent = <&{/i2c@7000c400}>;
pinctrl-names = "ddc", "pta", "idle";
pinctrl-0 = <&state_i2cmux_ddc>;
pinctrl-1 = <&state_i2cmux_pta>;
pinctrl-2 = <&state_i2cmux_idle>;
hdmi_ddc: i2c@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
};
i2c@7000d000 {
clock-frequency = <400000>;
status = "okay";
pmic: tps6586x@34 {
compatible = "ti,tps6586x";
reg = <0x34>;
interrupts = <0 86 0x4>;
ti,system-power-controller;
#gpio-cells = <2>;
gpio-controller;
sys-supply = <&vdd_5v0_reg>;
vin-sm0-supply = <&sys_reg>;
vin-sm1-supply = <&sys_reg>;
vin-sm2-supply = <&sys_reg>;
vinldo01-supply = <&sm2_reg>;
vinldo23-supply = <&sm2_reg>;
vinldo4-supply = <&sm2_reg>;
vinldo678-supply = <&sm2_reg>;
vinldo9-supply = <&sm2_reg>;
regulators {
sys_reg: sys {
regulator-name = "vdd_sys";
regulator-always-on;
};
sm0 {
regulator-name = "vdd_sys_sm0,vdd_core";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
sm1 {
regulator-name = "vdd_sys_sm1,vdd_cpu";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
sm2_reg: sm2 {
regulator-name = "vdd_sys_sm2,vin_ldo*";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
regulator-always-on;
};
ldo0 {
regulator-name = "vdd_ldo0,vddio_pex_clk";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo1 {
regulator-name = "vdd_ldo1,avdd_pll*";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
};
ldo2 {
regulator-name = "vdd_ldo2,vdd_rtc";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ldo3 {
regulator-name = "vdd_ldo3,avdd_usb*";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo4 {
regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo5 {
regulator-name = "vdd_ldo5,vcore_mmc";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
ldo6 {
regulator-name = "vdd_ldo6,avdd_vdac";
/*
* According to the Tegra 2 Automotive
* DataSheet, a typical value for this
* would be 2.8V, but the PMIC only
* supports 2.85V.
*/
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
hdmi_vdd_reg: ldo7 {
regulator-name = "vdd_ldo7,avdd_hdmi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
hdmi_pll_reg: ldo8 {
regulator-name = "vdd_ldo8,avdd_hdmi_pll";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo9 {
regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam";
/*
* According to the Tegra 2 Automotive
* DataSheet, a typical value for this
* would be 2.8V, but the PMIC only
* supports 2.85V.
*/
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
};
ldo_rtc {
regulator-name = "vdd_rtc_out";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
temperature-sensor@4c {
compatible = "onnn,nct1008";
reg = <0x4c>;
};
};
pmc {
nvidia,invert-interrupt;
};
usb@c5008000 {
status = "okay";
};
sdhci@c8000600 {
cd-gpios = <&gpio 58 1>; /* gpio PH2 */
wp-gpios = <&gpio 59 0>; /* gpio PH3 */
bus-width = <4>;
status = "okay";
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_5v0_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vdd_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
};
};

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arch/arm/dts/tegra20-tec.dts Normal file
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/dts-v1/;
#include "tegra20-tamonten.dtsi"
/ {
model = "Avionic Design Tamonten Evaluation Carrier";
compatible = "ad,tec", "nvidia,tegra20";
aliases {
usb0 = "/usb@c5008000";
sdhci0 = "/sdhci@c8000600";
};
memory {
reg = <0x00000000 0x20000000>;
};
host1x {
status = "okay";
dc@54200000 {
status = "okay";
rgb {
nvidia,panel = <&lcd_panel>;
status = "okay";
};
};
};
serial@70006300 {
clock-frequency = <216000000>;
};
i2c@7000c000 {
status = "disabled";
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
status = "disabled";
};
i2c@7000d000 {
status = "disabled";
};
usb@c5000000 {
status = "disabled";
};
usb@c5004000 {
status = "disabled";
};
lcd_panel: panel {
clock = <33260000>;
xres = <800>;
yres = <480>;
left-margin = <120>;
right-margin = <120>;
hsync-len = <16>;
lower-margin = <15>;
upper-margin = <15>;
vsync-len = <15>;
nvidia,bits-per-pixel = <16>;
nvidia,pwm = <&pwm 0 500000>;
nvidia,backlight-enable-gpios = <&gpio 13 0>; /* PB5 */
nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
nvidia,panel-timings = <0 0 0 0>;
};
};

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arch/arm/dts/tegra20-trimslice.dts Normal file
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/dts-v1/;
#include "tegra20.dtsi"
/ {
model = "Compulab TrimSlice board";
compatible = "compulab,trimslice", "nvidia,tegra20";
aliases {
usb0 = "/usb@c5008000";
usb1 = "/usb@c5000000";
sdhci0 = "/sdhci@c8000600";
sdhci1 = "/sdhci@c8000000";
};
memory {
reg = <0x00000000 0x40000000>;
};
serial@70006000 {
clock-frequency = <216000000>;
};
i2c@7000c000 {
status = "disabled";
};
spi@7000c380 {
status = "okay";
spi-max-frequency = <25000000>;
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
status = "disabled";
};
i2c@7000d000 {
status = "disabled";
};
usb@c5000000 {
nvidia,vbus-gpio = <&gpio 170 0>; /* PV2 */
};
usb@c5004000 {
status = "disabled";
};
sdhci@c8000000 {
status = "okay";
bus-width = <4>;
};
sdhci@c8000600 {
status = "okay";
cd-gpios = <&gpio 121 1>; /* gpio PP1 */
wp-gpios = <&gpio 122 0>; /* gpio PP2 */
bus-width = <4>;
};
};

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arch/arm/dts/tegra20-ventana.dts Normal file
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/dts-v1/;
#include "tegra20.dtsi"
/ {
model = "NVIDIA Tegra20 Ventana evaluation board";
compatible = "nvidia,ventana", "nvidia,tegra20";
aliases {
usb0 = "/usb@c5008000";
sdhci0 = "/sdhci@c8000600";
sdhci1 = "/sdhci@c8000400";
};
memory {
reg = <0x00000000 0x40000000>;
};
host1x {
status = "okay";
dc@54200000 {
status = "okay";
rgb {
status = "okay";
nvidia,panel = <&lcd_panel>;
};
};
};
serial@70006300 {
clock-frequency = < 216000000 >;
};
i2c@7000c000 {
status = "disabled";
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
status = "disabled";
};
i2c@7000d000 {
status = "disabled";
};
usb@c5000000 {
status = "disabled";
};
usb@c5004000 {
status = "disabled";
};
sdhci@c8000400 {
status = "okay";
cd-gpios = <&gpio 69 1>; /* gpio PI5 */
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
power-gpios = <&gpio 70 0>; /* gpio PI6 */
bus-width = <4>;
};
sdhci@c8000600 {
status = "okay";
bus-width = <8>;
};
lcd_panel: panel {
clock = <72072000>;
xres = <1366>;
yres = <768>;
left-margin = <58>;
right-margin = <58>;
hsync-len = <58>;
lower-margin = <4>;
upper-margin = <4>;
vsync-len = <4>;
hsync-active-high;
vsync-active-high;
nvidia,bits-per-pixel = <16>;
nvidia,pwm = <&pwm 2 0>;
nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
nvidia,panel-timings = <0 0 200 0 0>;
};
};

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arch/arm/dts/tegra20-whistler.dts Normal file
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/dts-v1/;
#include "tegra20.dtsi"
/ {
model = "NVIDIA Tegra20 Whistler evaluation board";
compatible = "nvidia,whistler", "nvidia,tegra20";
aliases {
i2c0 = "/i2c@7000d000";
usb0 = "/usb@c5008000";
sdhci0 = "/sdhci@c8000600";
sdhci1 = "/sdhci@c8000400";
};
memory {
device_type = "memory";
reg = < 0x00000000 0x20000000 >;
};
serial@70006000 {
clock-frequency = < 216000000 >;
};
i2c@7000c000 {
status = "disabled";
};
i2c@7000c400 {
status = "disabled";
};
i2c@7000c500 {
status = "disabled";
};
i2c@7000d000 {
clock-frequency = <100000>;
pmic@3c {
compatible = "maxim,max8907b";
reg = <0x3c>;
clk_32k: clock {
compatible = "fixed-clock";
/*
* leave out for now due to CPP:
* #clock-cells = <0>;
*/
clock-frequency = <32768>;
};
};
};
usb@c5000000 {
status = "disabled";
};
usb@c5004000 {
status = "disabled";
};
sdhci@c8000400 {
status = "okay";
wp-gpios = <&gpio 173 0>; /* gpio PV5 */
bus-width = <8>;
};
sdhci@c8000600 {
status = "okay";
bus-width = <8>;
};
};

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arch/arm/dts/tegra30-beaver.dts Normal file
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/dts-v1/;
#include "tegra30.dtsi"
/ {
model = "NVIDIA Beaver";
compatible = "nvidia,beaver", "nvidia,tegra30";
aliases {
i2c0 = "/i2c@7000d000";
i2c1 = "/i2c@7000c000";
i2c2 = "/i2c@7000c400";
i2c3 = "/i2c@7000c500";
i2c4 = "/i2c@7000c700";
sdhci0 = "/sdhci@78000600";
sdhci1 = "/sdhci@78000000";
usb0 = "/usb@7d008000";
};
memory {
device_type = "memory";
reg = <0x80000000 0x7ff00000>;
};
i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c400 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c500 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c700 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000d000 {
status = "okay";
clock-frequency = <100000>;
};
spi@7000da00 {
status = "okay";
spi-max-frequency = <25000000>;
spi-flash@1 {
compatible = "winbond,w25q32";
reg = <1>;
spi-max-frequency = <20000000>;
};
};
sdhci@78000000 {
status = "okay";
cd-gpios = <&gpio 69 1>; /* gpio PI5 */
wp-gpios = <&gpio 155 0>; /* gpio PT3 */
power-gpios = <&gpio 31 0>; /* gpio PD7 */
bus-width = <4>;
};
sdhci@78000600 {
status = "okay";
bus-width = <8>;
};
usb@7d008000 {
nvidia,vbus-gpio = <&gpio 236 0>; /* PDD4 */
status = "okay";
};
};

72
arch/arm/dts/tegra30-cardhu.dts Normal file
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/dts-v1/;
#include "tegra30.dtsi"
/ {
model = "NVIDIA Cardhu";
compatible = "nvidia,cardhu", "nvidia,tegra30";
aliases {
i2c0 = "/i2c@7000d000";
i2c1 = "/i2c@7000c000";
i2c2 = "/i2c@7000c400";
i2c3 = "/i2c@7000c500";
i2c4 = "/i2c@7000c700";
sdhci0 = "/sdhci@78000600";
sdhci1 = "/sdhci@78000000";
usb0 = "/usb@7d008000";
};
memory {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c400 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c500 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c700 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000d000 {
status = "okay";
clock-frequency = <100000>;
};
spi@7000da00 {
status = "okay";
spi-max-frequency = <25000000>;
};
sdhci@78000000 {
status = "okay";
cd-gpios = <&gpio 69 1>; /* gpio PI5 */
wp-gpios = <&gpio 155 0>; /* gpio PT3 */
power-gpios = <&gpio 31 0>; /* gpio PD7 */
bus-width = <4>;
};
sdhci@78000600 {
status = "okay";
bus-width = <8>;
};
usb@7d008000 {
nvidia,vbus-gpio = <&gpio 236 0>; /* PDD4 */
status = "okay";
};
};

69
arch/arm/dts/tegra30-tamonten.dtsi Normal file
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#include "tegra30.dtsi"
/ {
model = "Avionic Design Tamonten NG";
compatible = "ad,tamonten-ng", "nvidia,tegra30";
memory {
reg = <0x80000000 0x40000000>;
};
aliases {
i2c0 = "/i2c@7000c000";
i2c1 = "/i2c@7000c700";
i2c2 = "/i2c@7000c400";
i2c3 = "/i2c@7000c500";
i2c4 = "/i2c@7000d000";
sdhci0 = "/sdhci@78000600";
sdhci1 = "/sdhci@78000400";
sdhci2 = "/sdhci@78000000";
usb0 = "/usb@7d008000";
};
/* GEN1 */
i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
};
/* GEN2 */
i2c@7000c400 {
clock-frequency = <100000>;
};
/* CAM */
i2c@7000c500 {
status = "okay";
clock-frequency = <100000>;
};
/* DDC */
i2c@7000c700 {
status = "okay";
clock-frequency = <100000>;
};
/* PWR */
i2c@7000d000 {
status = "okay";
clock-frequency = <100000>;
};
/* SD slot on the base board */
sdhci@78000400 {
cd-gpios = <&gpio 69 1>; /* gpio PI5 */
wp-gpios = <&gpio 67 0>; /* gpio PI3 */
bus-width = <4>;
};
/* EMMC on the COM module */
sdhci@78000600 {
status = "okay";
bus-width = <8>;
};
usb@7d008000 {
status = "okay";
};
};

18
arch/arm/dts/tegra30-tec-ng.dts Normal file
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/dts-v1/;
#include "tegra30-tamonten.dtsi"
/ {
model = "Avionic Design Tamonten™ NG Evaluation Carrier";
compatible = "ad,tec-ng", "nvidia,tegra30";
/* GEN2 */
i2c@7000c400 {
status = "okay";
};
/* SD card slot */
sdhci@78000400 {
status = "okay";
};
};

14
arch/arm/dts/zynq-microzed.dts Normal file
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/*
* Xilinx MicroZED board DTS
*
* Copyright (C) 2013 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynq-7000.dtsi"
/ {
model = "Zynq MicroZED Board";
compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000";
};

14
arch/arm/dts/zynq-zc702.dts Normal file
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/*
* Xilinx ZC702 board DTS
*
* Copyright (C) 2013 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynq-7000.dtsi"
/ {
model = "Zynq ZC702 Board";
compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
};

14
arch/arm/dts/zynq-zc706.dts Normal file
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/*
* Xilinx ZC706 board DTS
*
* Copyright (C) 2013 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynq-7000.dtsi"
/ {
model = "Zynq ZC706 Board";
compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
};

14
arch/arm/dts/zynq-zc770-xm010.dts Normal file
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/*
* Xilinx ZC770 XM010 board DTS
*
* Copyright (C) 2013 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynq-7000.dtsi"
/ {
model = "Zynq ZC770 XM010 Board";
compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000";
};

14
arch/arm/dts/zynq-zc770-xm012.dts Normal file
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/*
* Xilinx ZC770 XM012 board DTS
*
* Copyright (C) 2013 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynq-7000.dtsi"
/ {
model = "Zynq ZC770 XM012 Board";
compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000";
};

14
arch/arm/dts/zynq-zc770-xm013.dts Normal file
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/*
* Xilinx ZC770 XM013 board DTS
*
* Copyright (C) 2013 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynq-7000.dtsi"
/ {
model = "Zynq ZC770 XM013 Board";
compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
};

14
arch/arm/dts/zynq-zed.dts Normal file
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/*
* Xilinx ZED board DTS
*
* Copyright (C) 2013 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynq-7000.dtsi"
/ {
model = "Zynq ZED Board";
compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
};

7
arch/microblaze/dts/microblaze-generic.dts Normal file
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/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
} ;
} ;

24
arch/x86/dts/alex.dts Normal file
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/dts-v1/;
/include/ "coreboot.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Google Alex";
compatible = "google,alex", "intel,atom-pineview";
config {
silent_console = <0>;
};
gpio: gpio {};
serial {
reg = <0x3f8 8>;
clock-frequency = <115200>;
};
chosen { };
memory { device_type = "memory"; reg = <0 0>; };
};

35
arch/x86/dts/link.dts Normal file
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/dts-v1/;
/include/ "coreboot.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Google Link";
compatible = "google,link", "intel,celeron-ivybridge";
config {
silent_console = <0>;
};
gpio: gpio {};
serial {
reg = <0x3f8 8>;
clock-frequency = <115200>;
};
chosen { };
memory { device_type = "memory"; reg = <0 0>; };
spi {
#address-cells = <1>;
#size-cells = <0>;
compatible = "intel,ich9";
spi-flash@0 {
reg = <0>;
compatible = "winbond,w25q64", "spi-flash";
memory-map = <0xff800000 0x00800000>;
};
};
};