mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2026-06-13 15:03:58 +03:00
arm: Migrate GICV2 / GICV3 to Kconfig
Migrate CONFIG_GICV2 and CONFIG_GICV3 to Kconfig. We still have the GIC related registers that need to be handled more cleanly but start by moving this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
@@ -11,14 +11,13 @@
|
||||
|
||||
#include "rcar-gen3-common.h"
|
||||
|
||||
/* Generic Interrupt Controller Definitions */
|
||||
#ifdef CONFIG_GICV2
|
||||
#undef CONFIG_GICV2
|
||||
/*
|
||||
* Generic Interrupt Controller Definitions. Undefine v2 locations and define
|
||||
* v3 locations.
|
||||
*/
|
||||
#undef GICD_BASE
|
||||
#undef GICC_BASE
|
||||
#undef GICR_BASE
|
||||
#endif
|
||||
#define CONFIG_GICV3
|
||||
#define GICD_BASE 0xF1000000
|
||||
#define GICR_BASE 0xF1060000
|
||||
|
||||
|
||||
@@ -6,8 +6,6 @@
|
||||
#ifndef __LS1012A_COMMON_H
|
||||
#define __LS1012A_COMMON_H
|
||||
|
||||
#define CONFIG_GICV2
|
||||
|
||||
#include <asm/arch/config.h>
|
||||
#include <asm/arch/stream_id_lsch2.h>
|
||||
#include <linux/sizes.h>
|
||||
|
||||
@@ -27,7 +27,6 @@
|
||||
#endif
|
||||
|
||||
#define CONFIG_REMAKE_ELF
|
||||
#define CONFIG_GICV2
|
||||
|
||||
#include <asm/arch/stream_id_lsch2.h>
|
||||
#include <asm/arch/config.h>
|
||||
|
||||
@@ -27,7 +27,6 @@
|
||||
#endif
|
||||
|
||||
#define CONFIG_REMAKE_ELF
|
||||
#define CONFIG_GICV2
|
||||
|
||||
#include <asm/arch/config.h>
|
||||
#include <asm/arch/stream_id_lsch2.h>
|
||||
|
||||
@@ -8,7 +8,6 @@
|
||||
#define __LS2_COMMON_H
|
||||
|
||||
#define CONFIG_REMAKE_ELF
|
||||
#define CONFIG_GICV3
|
||||
|
||||
#include <asm/arch/stream_id_lsch3.h>
|
||||
#include <asm/arch/config.h>
|
||||
|
||||
@@ -12,7 +12,6 @@
|
||||
|
||||
#define CONFIG_REMAKE_ELF
|
||||
#define CONFIG_FSL_LAYERSCAPE
|
||||
#define CONFIG_GICV3
|
||||
#define CONFIG_FSL_TZPC_BP147
|
||||
#define CONFIG_FSL_MEMAC
|
||||
|
||||
|
||||
@@ -23,7 +23,6 @@
|
||||
/* note: arch/arm/cpu/armv8/start.S which references GICD_BASE/GICC_BASE
|
||||
* does not yet support DT. Thus define it here.
|
||||
*/
|
||||
#define CONFIG_GICV2
|
||||
#define GICD_BASE 0xf7011000
|
||||
#define GICC_BASE 0xf7012000
|
||||
|
||||
|
||||
@@ -26,7 +26,6 @@
|
||||
#define CONFIG_INITRD_TAG
|
||||
|
||||
/* Generic Interrupt Controller Definitions */
|
||||
#define CONFIG_GICV2
|
||||
#define GICD_BASE 0xF1010000
|
||||
#define GICC_BASE 0xF1020000
|
||||
|
||||
|
||||
@@ -115,11 +115,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
|
||||
"then source ${scriptaddr}; fi\0" \
|
||||
"socfpga_legacy_reset_compat=1\0"
|
||||
|
||||
/*
|
||||
* Generic Interrupt Controller Definitions
|
||||
*/
|
||||
#define CONFIG_GICV2
|
||||
|
||||
/*
|
||||
* External memory configurations
|
||||
*/
|
||||
|
||||
@@ -17,9 +17,6 @@
|
||||
* Physical Memory Map
|
||||
*/
|
||||
|
||||
/* Generic Interrupt Controller */
|
||||
#define CONFIG_GICV2
|
||||
|
||||
#undef FDTFILE
|
||||
#define BOOTENV_EFI_SET_FDTFILE_FALLBACK \
|
||||
"if test -z \"${fdtfile}\" -a -n \"${soc}\"; then " \
|
||||
|
||||
@@ -14,9 +14,6 @@
|
||||
*/
|
||||
#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
|
||||
|
||||
/* Generic Interrupt Controller */
|
||||
#define CONFIG_GICV2
|
||||
|
||||
/*
|
||||
* Memory layout for where various images get loaded by boot scripts:
|
||||
*
|
||||
|
||||
@@ -15,7 +15,6 @@
|
||||
/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */
|
||||
|
||||
/* Generic Interrupt Controller Definitions */
|
||||
#define CONFIG_GICV2
|
||||
#define GICD_BASE 0xF9010000
|
||||
#define GICC_BASE 0xF9020000
|
||||
|
||||
|
||||
Reference in New Issue
Block a user