mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2026-06-13 15:03:58 +03:00
Merge branch 'series1_v2' of git://git.denx.de/u-boot-sparc
This commit is contained in:
Tom Rini
538
include/ambapp.h
538
include/ambapp.h
@@ -3,8 +3,8 @@
|
||||
* the APB bus, also freely available in GRLIB at
|
||||
* www.gaisler.com.
|
||||
*
|
||||
* (C) Copyright 2007
|
||||
* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
|
||||
* (C) Copyright 2009, 2015
|
||||
* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
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||||
*
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||||
* SPDX-License-Identifier: GPL-2.0+
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*/
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||||
@@ -12,116 +12,136 @@
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#ifndef __AMBAPP_H__
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||||
#define __AMBAPP_H__
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||||
/* Default location of Plug&Play info
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* normally 0xfffff000 for AHB masters
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||||
* and 0xfffff800 for AHB slaves.
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||||
* Normally no need to change this.
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||||
*/
|
||||
#define LEON3_IO_AREA 0xfff00000
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#define LEON3_CONF_AREA 0xff000
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#define LEON3_AHB_SLAVE_CONF_AREA (1 << 11)
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||||
|
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/* Max devices this software will support */
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#define LEON3_AHB_MASTERS 16
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#define LEON3_AHB_SLAVES 16
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/*#define LEON3_APB_MASTERS 1*/ /* Number of APB buses that has Plug&Play */
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#define LEON3_APB_SLAVES 16 /* Total number of APB slaves per APB bus */
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||||
/* Vendor codes */
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||||
#define VENDOR_GAISLER 1
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#define VENDOR_PENDER 2
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#define VENDOR_ESA 4
|
||||
#define VENDOR_ASTRIUM 6
|
||||
#define VENDOR_OPENCHIP 7
|
||||
#define VENDOR_OPENCORES 8
|
||||
#define VENDOR_CONTRIB 9
|
||||
#define VENDOR_EONIC 11
|
||||
#define VENDOR_RADIONOR 15
|
||||
#define VENDOR_GLEICHMANN 16
|
||||
#define VENDOR_MENTA 17
|
||||
#define VENDOR_SUN 19
|
||||
#define VENDOR_EMBEDDIT 234
|
||||
#define VENDOR_CAL 202
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||||
|
||||
/* Gaisler Research device id's */
|
||||
#define GAISLER_LEON3 0x003
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||||
#define GAISLER_LEON3DSU 0x004
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||||
#define GAISLER_ETHAHB 0x005
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||||
#define GAISLER_APBMST 0x006
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#define GAISLER_AHBUART 0x007
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||||
#define GAISLER_SRCTRL 0x008
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#define GAISLER_SDCTRL 0x009
|
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#define GAISLER_APBUART 0x00C
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||||
#define GAISLER_IRQMP 0x00D
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#define GAISLER_AHBRAM 0x00E
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#define GAISLER_GPTIMER 0x011
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||||
#define GAISLER_PCITRG 0x012
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#define GAISLER_PCISBRG 0x013
|
||||
#define GAISLER_PCIFBRG 0x014
|
||||
#define GAISLER_PCITRACE 0x015
|
||||
#define GAISLER_PCIDMA 0x016
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||||
#define GAISLER_AHBTRACE 0x017
|
||||
#define GAISLER_ETHDSU 0x018
|
||||
#define GAISLER_PIOPORT 0x01A
|
||||
#define GAISLER_AHBJTAG 0x01c
|
||||
#define GAISLER_SPW 0x01f
|
||||
#define GAISLER_ATACTRL 0x024
|
||||
#define GAISLER_VGA 0x061
|
||||
#define GAISLER_KBD 0X060
|
||||
#define GAISLER_ETHMAC 0x01D
|
||||
#define GAISLER_DDRSPA 0x025
|
||||
#define GAISLER_EHCI 0x026
|
||||
#define GAISLER_UHCI 0x027
|
||||
#define GAISLER_SPW2 0x029
|
||||
#define GAISLER_DDR2SPA 0x02E
|
||||
#define GAISLER_AHBSTAT 0x052
|
||||
#define GAISLER_FTMCTRL 0x054
|
||||
|
||||
#define GAISLER_L2TIME 0xffd /* internal device: leon2 timer */
|
||||
#define GAISLER_L2C 0xffe /* internal device: leon2compat */
|
||||
#define GAISLER_PLUGPLAY 0xfff /* internal device: plug & play configarea */
|
||||
|
||||
/* European Space Agency device id's */
|
||||
#define ESA_LEON2 0x2
|
||||
#define ESA_MCTRL 0xF
|
||||
|
||||
/* Opencores device id's */
|
||||
#define OPENCORES_PCIBR 0x4
|
||||
#define OPENCORES_ETHMAC 0x5
|
||||
|
||||
/* Vendor codes */
|
||||
|
||||
/*
|
||||
*
|
||||
* Macros for manipulating Configuration registers
|
||||
*
|
||||
*/
|
||||
|
||||
#define amba_vendor(x) (((x) >> 24) & 0xff)
|
||||
|
||||
#define amba_device(x) (((x) >> 12) & 0xfff)
|
||||
|
||||
#define amba_membar_start(mbar) \
|
||||
(((mbar) & 0xfff00000) & (((mbar) & 0xfff0) << 16))
|
||||
|
||||
#define amba_iobar_start(base, iobar) \
|
||||
((base) | ((((iobar) & 0xfff00000)>>12) & (((iobar) & 0xfff0)<<4)) )
|
||||
|
||||
#define amba_irq(conf) ((conf) & 0xf)
|
||||
|
||||
#define amba_ver(conf) (((conf)>>5) & 0x1f)
|
||||
|
||||
#define amba_membar_type(mbar) ((mbar) & 0xf)
|
||||
|
||||
#define amba_membar_mask(mbar) (((mbar)>>4) & 0xfff)
|
||||
|
||||
#define AMBA_TYPE_APBIO 0x1
|
||||
#define AMBA_TYPE_MEM 0x2
|
||||
#define AMBA_TYPE_AHBIO 0x3
|
||||
|
||||
#define AMBA_TYPE_AHBIO_ADDR(addr) (LEON3_IO_AREA | ((addr) >> 12))
|
||||
#include <ambapp_ids.h>
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
/* Structures used to access Plug&Play information directly */
|
||||
struct ambapp_pnp_ahb {
|
||||
const unsigned int id; /* VENDOR, DEVICE, VER, IRQ, */
|
||||
const unsigned int custom[3];
|
||||
const unsigned int mbar[4]; /* MASK, ADDRESS, TYPE,
|
||||
* CACHABLE/PREFETCHABLE */
|
||||
};
|
||||
|
||||
struct ambapp_pnp_apb {
|
||||
const unsigned int id; /* VENDOR, DEVICE, VER, IRQ, */
|
||||
const unsigned int iobar; /* MASK, ADDRESS, TYPE,
|
||||
* CACHABLE/PREFETCHABLE */
|
||||
};
|
||||
|
||||
/* AMBA Plug&Play AHB Masters & Slaves information locations
|
||||
* Max devices is 64 supported by HW, however often only 16
|
||||
* are used.
|
||||
*/
|
||||
struct ambapp_pnp_info {
|
||||
struct ambapp_pnp_ahb masters[64];
|
||||
struct ambapp_pnp_ahb slaves[63];
|
||||
const unsigned int unused[4];
|
||||
const unsigned int systemid[4];
|
||||
};
|
||||
|
||||
/* Describes a AMBA PnP bus */
|
||||
struct ambapp_bus {
|
||||
int buses; /* Number of buses */
|
||||
unsigned int ioareas[6]; /* PnP I/O AREAs of AHB buses */
|
||||
unsigned int freq; /* Frequency of bus0 [Hz] */
|
||||
};
|
||||
|
||||
/* Processor Local AMBA bus */
|
||||
extern struct ambapp_bus ambapp_plb;
|
||||
|
||||
/* Get Bus frequency of a certain AMBA bus */
|
||||
extern unsigned int ambapp_bus_freq(
|
||||
struct ambapp_bus *abus,
|
||||
int ahb_bus_index
|
||||
);
|
||||
|
||||
/* AMBA PnP information of a APB Device */
|
||||
typedef struct {
|
||||
unsigned int vendor;
|
||||
unsigned int device;
|
||||
unsigned char irq;
|
||||
unsigned char ver;
|
||||
unsigned int address;
|
||||
unsigned int mask;
|
||||
int ahb_bus_index;
|
||||
} ambapp_apbdev;
|
||||
|
||||
/* AMBA PnP information of a AHB Device */
|
||||
typedef struct {
|
||||
unsigned int vendor;
|
||||
unsigned int device;
|
||||
unsigned char irq;
|
||||
unsigned char ver;
|
||||
unsigned int userdef[3];
|
||||
unsigned int address[4];
|
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unsigned int mask[4];
|
||||
int type[4];
|
||||
int ahb_bus_index;
|
||||
} ambapp_ahbdev;
|
||||
|
||||
/* Scan AMBA Bus for AHB Bridges */
|
||||
extern void ambapp_bus_init(
|
||||
unsigned int ioarea,
|
||||
unsigned int freq,
|
||||
struct ambapp_bus *abus);
|
||||
|
||||
/* Find APB Slave device by index using breath first search.
|
||||
*
|
||||
* When vendor and device are both set to zero, any device
|
||||
* with a non-zero device ID will match the search. It may be
|
||||
* useful when processing all devices on a AMBA bus.
|
||||
*/
|
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extern int ambapp_apb_find(
|
||||
struct ambapp_bus *abus,
|
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int vendor,
|
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int device,
|
||||
int index,
|
||||
ambapp_apbdev *dev
|
||||
);
|
||||
|
||||
/* Find AHB Master device by index using breath first search.
|
||||
*
|
||||
* When vendor and device are both set to zero, any device
|
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* with a non-zero device ID will match the search. It may be
|
||||
* useful when processing all devices on a AMBA bus.
|
||||
*/
|
||||
extern int ambapp_ahbmst_find(
|
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struct ambapp_bus *abus,
|
||||
int vendor,
|
||||
int device,
|
||||
int index,
|
||||
ambapp_ahbdev *dev
|
||||
);
|
||||
|
||||
/* Find AHB Slave device by index using breath first search.
|
||||
*
|
||||
* When vendor and device are both set to zero, any device
|
||||
* with a non-zero device ID will match the search. It may be
|
||||
* useful when processing all devices on a AMBA bus.
|
||||
*/
|
||||
extern int ambapp_ahbslv_find(
|
||||
struct ambapp_bus *abus,
|
||||
int vendor,
|
||||
int device,
|
||||
int index,
|
||||
ambapp_ahbdev *dev
|
||||
);
|
||||
|
||||
/* Return number of APB Slave devices of a certain ID (VENDOR:DEVICE)
|
||||
* zero is returned if no devices was found.
|
||||
*/
|
||||
extern int ambapp_apb_count(struct ambapp_bus *abus, int vendor, int device);
|
||||
|
||||
/* Return number of AHB Master devices of a certain ID (VENDOR:DEVICE)
|
||||
* zero is returned if no devices was found.
|
||||
*/
|
||||
extern int ambapp_ahbmst_count(struct ambapp_bus *abus, int vendor, int device);
|
||||
|
||||
/* Return number of AHB Slave devices of a certain ID (VENDOR:DEVICE)
|
||||
* zero is returned if no devices was found.
|
||||
*/
|
||||
extern int ambapp_ahbslv_count(struct ambapp_bus *abus, int vendor, int device);
|
||||
|
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#ifdef CONFIG_CMD_AMBAPP
|
||||
|
||||
@@ -135,243 +155,71 @@ char *ambapp_device_id2str(int vendor, int id);
|
||||
|
||||
/* Return name of vendor */
|
||||
char *ambapp_vendor_id2str(int vendor);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Types and structure used for AMBA Plug & Play bus scanning
|
||||
*/
|
||||
|
||||
/* AMBA Plug&Play AHB information layout */
|
||||
typedef struct {
|
||||
unsigned int conf;
|
||||
unsigned int userdef[3];
|
||||
unsigned int bars[4];
|
||||
} ahbctrl_pp_dev;
|
||||
|
||||
/* Prototypes for scanning AMBA Plug&Play bus for AMBA
|
||||
* i) AHB Masters
|
||||
* ii) AHB Slaves
|
||||
* iii) APB Slaves (APB MST is a AHB Slave)
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
unsigned char irq;
|
||||
unsigned char ver;
|
||||
unsigned int address;
|
||||
} ambapp_apbdev;
|
||||
|
||||
typedef struct {
|
||||
unsigned char irq;
|
||||
unsigned char ver;
|
||||
unsigned int userdef[3];
|
||||
unsigned int address[4];
|
||||
} ambapp_ahbdev;
|
||||
|
||||
/* AMBA Plug&Play AHB Masters & Slaves information locations
|
||||
* Max devices is 64 supported by HW, however often only 8
|
||||
* are used.
|
||||
*/
|
||||
typedef struct {
|
||||
ahbctrl_pp_dev masters[64];
|
||||
ahbctrl_pp_dev slaves[64];
|
||||
} ahbctrl_info;
|
||||
|
||||
/* AMBA Plug&Play AHB information layout */
|
||||
typedef struct {
|
||||
unsigned int conf;
|
||||
unsigned int bar;
|
||||
} apbctrl_pp_dev;
|
||||
|
||||
/* All functions return the number of found devices
|
||||
* 0 = no devices found
|
||||
*/
|
||||
|
||||
/****************************** APB SLAVES ******************************/
|
||||
int ambapp_apb_count(unsigned int vendor, unsigned int driver);
|
||||
|
||||
int ambapp_apb_first(unsigned int vendor,
|
||||
unsigned int driver, ambapp_apbdev * dev);
|
||||
|
||||
int ambapp_apb_next(unsigned int vendor,
|
||||
unsigned int driver, ambapp_apbdev * dev, int index);
|
||||
|
||||
int ambapp_apbs_first(unsigned int vendor,
|
||||
unsigned int driver, ambapp_apbdev * dev, int max_cnt);
|
||||
|
||||
/****************************** AHB MASTERS ******************************/
|
||||
int ambapp_ahbmst_count(unsigned int vendor, unsigned int driver);
|
||||
|
||||
int ambapp_ahbmst_first(unsigned int vendor,
|
||||
unsigned int driver, ambapp_ahbdev * dev);
|
||||
|
||||
int ambapp_ahbmst_next(unsigned int vendor,
|
||||
unsigned int driver, ambapp_ahbdev * dev, int index);
|
||||
|
||||
int ambapp_ahbmsts_first(unsigned int vendor,
|
||||
unsigned int driver, ambapp_ahbdev * dev, int max_cnt);
|
||||
|
||||
/****************************** AHB SLAVES ******************************/
|
||||
int ambapp_ahbslv_count(unsigned int vendor, unsigned int driver);
|
||||
|
||||
int ambapp_ahbslv_first(unsigned int vendor,
|
||||
unsigned int driver, ambapp_ahbdev * dev);
|
||||
|
||||
int ambapp_ahbslv_next(unsigned int vendor,
|
||||
unsigned int driver, ambapp_ahbdev * dev, int index);
|
||||
|
||||
int ambapp_ahbslvs_first(unsigned int vendor,
|
||||
unsigned int driver, ambapp_ahbdev * dev, int max_cnt);
|
||||
|
||||
/*************************** AHB/APB only regs functions *************************
|
||||
* During start up, no memory is available we can use the simplified functions
|
||||
* to get to the memory controller.
|
||||
*
|
||||
* Functions uses no stack/memory, only registers.
|
||||
*/
|
||||
unsigned int ambapp_apb_next_nomem(register unsigned int vendor, /* Plug&Play Vendor ID */
|
||||
register unsigned int driver, /* Plug&Play Device ID */
|
||||
register int index);
|
||||
|
||||
ahbctrl_pp_dev *ambapp_ahb_next_nomem(register unsigned int vendor, /* Plug&Play Vendor ID */
|
||||
register unsigned int driver, /* Plug&Play Device ID */
|
||||
register unsigned int opts, /* scan for AHB 1=slave, 0=masters */
|
||||
register int index);
|
||||
|
||||
unsigned int ambapp_ahb_get_info(ahbctrl_pp_dev * ahb, int info);
|
||||
|
||||
/*************************** AMBA Plug&Play device register MAPS *****************/
|
||||
|
||||
/*
|
||||
* The following defines the bits in the LEON UART Status Registers.
|
||||
*/
|
||||
|
||||
#define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */
|
||||
#define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
|
||||
#define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
|
||||
#define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */
|
||||
#define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */
|
||||
#define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */
|
||||
#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
|
||||
#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
|
||||
|
||||
/*
|
||||
* The following defines the bits in the LEON UART Ctrl Registers.
|
||||
*/
|
||||
|
||||
#define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */
|
||||
#define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */
|
||||
#define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
|
||||
#define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter interrupt enable */
|
||||
#define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */
|
||||
#define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */
|
||||
#define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */
|
||||
#define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */
|
||||
#define LEON_REG_UART_CTRL_DBG (1<<11) /* Debug Bit used by GRMON */
|
||||
|
||||
#define LEON3_GPTIMER_EN 1
|
||||
#define LEON3_GPTIMER_RL 2
|
||||
#define LEON3_GPTIMER_LD 4
|
||||
#define LEON3_GPTIMER_IRQEN 8
|
||||
|
||||
/*
|
||||
* The following defines the bits in the LEON PS/2 Status Registers.
|
||||
*/
|
||||
|
||||
#define LEON_REG_PS2_STATUS_DR 0x00000001 /* Data Ready */
|
||||
#define LEON_REG_PS2_STATUS_PE 0x00000002 /* Parity error */
|
||||
#define LEON_REG_PS2_STATUS_FE 0x00000004 /* Framing error */
|
||||
#define LEON_REG_PS2_STATUS_KI 0x00000008 /* Keyboard inhibit */
|
||||
|
||||
/*
|
||||
* The following defines the bits in the LEON PS/2 Ctrl Registers.
|
||||
*/
|
||||
|
||||
#define LEON_REG_PS2_CTRL_RE 0x00000001 /* Receiver enable */
|
||||
#define LEON_REG_PS2_CTRL_TE 0x00000002 /* Transmitter enable */
|
||||
#define LEON_REG_PS2_CTRL_RI 0x00000004 /* Keyboard receive interrupt */
|
||||
#define LEON_REG_PS2_CTRL_TI 0x00000008 /* Keyboard transmit interrupt */
|
||||
|
||||
typedef struct {
|
||||
volatile unsigned int ilevel;
|
||||
volatile unsigned int ipend;
|
||||
volatile unsigned int iforce;
|
||||
volatile unsigned int iclear;
|
||||
volatile unsigned int mstatus;
|
||||
volatile unsigned int notused[11];
|
||||
volatile unsigned int cpu_mask[16];
|
||||
volatile unsigned int cpu_force[16];
|
||||
} ambapp_dev_irqmp;
|
||||
|
||||
typedef struct {
|
||||
volatile unsigned int data;
|
||||
volatile unsigned int status;
|
||||
volatile unsigned int ctrl;
|
||||
volatile unsigned int scaler;
|
||||
} ambapp_dev_apbuart;
|
||||
|
||||
typedef struct {
|
||||
volatile unsigned int val;
|
||||
volatile unsigned int rld;
|
||||
volatile unsigned int ctrl;
|
||||
volatile unsigned int unused;
|
||||
} ambapp_dev_gptimer_element;
|
||||
|
||||
#define LEON3_GPTIMER_CTRL_EN 0x1 /* Timer enable */
|
||||
#define LEON3_GPTIMER_CTRL_RS 0x2 /* Timer reStart */
|
||||
#define LEON3_GPTIMER_CTRL_LD 0x4 /* Timer reLoad */
|
||||
#define LEON3_GPTIMER_CTRL_IE 0x8 /* interrupt enable */
|
||||
#define LEON3_GPTIMER_CTRL_IP 0x10 /* interrupt flag/pending */
|
||||
#define LEON3_GPTIMER_CTRL_CH 0x20 /* Chain with previous timer */
|
||||
|
||||
typedef struct {
|
||||
volatile unsigned int scalar;
|
||||
volatile unsigned int scalar_reload;
|
||||
volatile unsigned int config;
|
||||
volatile unsigned int unused;
|
||||
volatile ambapp_dev_gptimer_element e[8];
|
||||
} ambapp_dev_gptimer;
|
||||
|
||||
typedef struct {
|
||||
volatile unsigned int iodata;
|
||||
volatile unsigned int ioout;
|
||||
volatile unsigned int iodir;
|
||||
volatile unsigned int irqmask;
|
||||
volatile unsigned int irqpol;
|
||||
volatile unsigned int irqedge;
|
||||
} ambapp_dev_ioport;
|
||||
|
||||
typedef struct {
|
||||
volatile unsigned int write;
|
||||
volatile unsigned int dummy;
|
||||
volatile unsigned int txcolor;
|
||||
volatile unsigned int bgcolor;
|
||||
} ambapp_dev_textvga;
|
||||
|
||||
typedef struct {
|
||||
volatile unsigned int data;
|
||||
volatile unsigned int status;
|
||||
volatile unsigned int ctrl;
|
||||
} ambapp_dev_apbps2;
|
||||
|
||||
typedef struct {
|
||||
unsigned int mcfg1, mcfg2, mcfg3;
|
||||
} ambapp_dev_mctrl;
|
||||
|
||||
typedef struct {
|
||||
unsigned int sdcfg;
|
||||
} ambapp_dev_sdctrl;
|
||||
|
||||
typedef struct {
|
||||
unsigned int cfg1;
|
||||
unsigned int cfg2;
|
||||
unsigned int cfg3;
|
||||
} ambapp_dev_ddr2spa;
|
||||
|
||||
typedef struct {
|
||||
unsigned int ctrl;
|
||||
unsigned int cfg;
|
||||
} ambapp_dev_ddrspa;
|
||||
/* Return description of a device */
|
||||
char *ambapp_device_id2desc(int vendor, int id);
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* defined(__ASSEMBLER__) */
|
||||
|
||||
#define AMBA_DEFAULT_IOAREA 0xfff00000
|
||||
#define AMBA_CONF_AREA 0xff000
|
||||
#define AMBA_AHB_SLAVE_CONF_AREA 0x800
|
||||
|
||||
#define DEV_NONE 0
|
||||
#define DEV_AHB_MST 1
|
||||
#define DEV_AHB_SLV 2
|
||||
#define DEV_APB_SLV 3
|
||||
|
||||
#define AMBA_TYPE_APBIO 0x1
|
||||
#define AMBA_TYPE_MEM 0x2
|
||||
#define AMBA_TYPE_AHBIO 0x3
|
||||
|
||||
/* ID layout for APB and AHB devices */
|
||||
#define AMBA_PNP_ID(vendor, device) (((vendor)<<24) | ((device)<<12))
|
||||
|
||||
/* APB Slave PnP layout definitions */
|
||||
#define AMBA_APB_ID_OFS (0*4)
|
||||
#define AMBA_APB_IOBAR_OFS (1*4)
|
||||
#define AMBA_APB_CONF_LENGH (2*4)
|
||||
|
||||
/* AHB Master/Slave layout PnP definitions */
|
||||
#define AMBA_AHB_ID_OFS (0*4)
|
||||
#define AMBA_AHB_CUSTOM0_OFS (1*4)
|
||||
#define AMBA_AHB_CUSTOM1_OFS (2*4)
|
||||
#define AMBA_AHB_CUSTOM2_OFS (3*4)
|
||||
#define AMBA_AHB_MBAR0_OFS (4*4)
|
||||
#define AMBA_AHB_MBAR1_OFS (5*4)
|
||||
#define AMBA_AHB_MBAR2_OFS (6*4)
|
||||
#define AMBA_AHB_MBAR3_OFS (7*4)
|
||||
#define AMBA_AHB_CONF_LENGH (8*4)
|
||||
|
||||
/* Macros for extracting information from AMBA PnP information
|
||||
* registers.
|
||||
*/
|
||||
|
||||
#define amba_vendor(x) (((x) >> 24) & 0xff)
|
||||
|
||||
#define amba_device(x) (((x) >> 12) & 0xfff)
|
||||
|
||||
#define amba_irq(conf) ((conf) & 0x1f)
|
||||
|
||||
#define amba_ver(conf) (((conf)>>5) & 0x1f)
|
||||
|
||||
#define amba_iobar_start(base, iobar) \
|
||||
((base) | ((((iobar) & 0xfff00000)>>12) & (((iobar) & 0xfff0)<<4)))
|
||||
|
||||
#define amba_membar_start(mbar) \
|
||||
(((mbar) & 0xfff00000) & (((mbar) & 0xfff0) << 16))
|
||||
|
||||
#define amba_membar_type(mbar) ((mbar) & 0xf)
|
||||
|
||||
#define amba_membar_mask(mbar) (((mbar) >> 4) & 0xfff)
|
||||
|
||||
#define amba_ahbio_adr(addr, base_ioarea) \
|
||||
((unsigned int)(base_ioarea) | ((addr) >> 12))
|
||||
|
||||
#define amba_apb_mask(iobar) ((~(amba_membar_mask(iobar)<<8) & 0x000fffff) + 1)
|
||||
|
||||
#endif
|
||||
|
||||
250
include/ambapp_ids.h
Normal file
250
include/ambapp_ids.h
Normal file
@@ -0,0 +1,250 @@
|
||||
/* AMBA Plug & Play Bus Vendor and Device IDs.
|
||||
*
|
||||
* (C) Copyright 2010, 2015
|
||||
* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __AMBAPP_IDS_H__
|
||||
#define __AMBAPP_IDS_H__
|
||||
|
||||
/* Vendor ID defines */
|
||||
#define VENDOR_GAISLER 0x01
|
||||
#define VENDOR_PENDER 0x02
|
||||
#define VENDOR_ESA 0x04
|
||||
#define VENDOR_ASTRIUM 0x06
|
||||
#define VENDOR_OPENCHIP 0x07
|
||||
#define VENDOR_OPENCORES 0x08
|
||||
#define VENDOR_CONTRIB 0x09
|
||||
#define VENDOR_EONIC 0x0b
|
||||
#define VENDOR_RADIONOR 0x0f
|
||||
#define VENDOR_GLEICHMANN 0x10
|
||||
#define VENDOR_MENTA 0x11
|
||||
#define VENDOR_SUN 0x13
|
||||
#define VENDOR_MOVIDIA 0x14
|
||||
#define VENDOR_ORBITA 0x17
|
||||
#define VENDOR_SYNOPSYS 0x21
|
||||
#define VENDOR_NASA 0x22
|
||||
#define VENDOR_S3 0x31
|
||||
#define VENDOR_CAL 0xca
|
||||
#define VENDOR_EMBEDDIT 0xea
|
||||
#define VENDOR_CETON 0xcb
|
||||
#define VENDOR_ACTEL 0xac
|
||||
#define VENDOR_APPLECORE 0xae
|
||||
|
||||
/* Aeroflex Gaisler device ID defines */
|
||||
#define GAISLER_LEON2DSU 0x002
|
||||
#define GAISLER_LEON3 0x003
|
||||
#define GAISLER_LEON3DSU 0x004
|
||||
#define GAISLER_ETHAHB 0x005
|
||||
#define GAISLER_APBMST 0x006
|
||||
#define GAISLER_AHBUART 0x007
|
||||
#define GAISLER_SRCTRL 0x008
|
||||
#define GAISLER_SDCTRL 0x009
|
||||
#define GAISLER_SSRCTRL 0x00a
|
||||
#define GAISLER_APBUART 0x00c
|
||||
#define GAISLER_IRQMP 0x00d
|
||||
#define GAISLER_AHBRAM 0x00e
|
||||
#define GAISLER_AHBDPRAM 0x00f
|
||||
#define GAISLER_GPTIMER 0x011
|
||||
#define GAISLER_PCITRG 0x012
|
||||
#define GAISLER_PCISBRG 0x013
|
||||
#define GAISLER_PCIFBRG 0x014
|
||||
#define GAISLER_PCITRACE 0x015
|
||||
#define GAISLER_DMACTRL 0x016
|
||||
#define GAISLER_AHBTRACE 0x017
|
||||
#define GAISLER_DSUCTRL 0x018
|
||||
#define GAISLER_CANAHB 0x019
|
||||
#define GAISLER_GPIO 0x01a
|
||||
#define GAISLER_AHBROM 0x01b
|
||||
#define GAISLER_AHBJTAG 0x01c
|
||||
#define GAISLER_ETHMAC 0x01d
|
||||
#define GAISLER_SWNODE 0x01e
|
||||
#define GAISLER_SPW 0x01f
|
||||
#define GAISLER_AHB2AHB 0x020
|
||||
#define GAISLER_USBDC 0x021
|
||||
#define GAISLER_USB_DCL 0x022
|
||||
#define GAISLER_DDRMP 0x023
|
||||
#define GAISLER_ATACTRL 0x024
|
||||
#define GAISLER_DDRSP 0x025
|
||||
#define GAISLER_EHCI 0x026
|
||||
#define GAISLER_UHCI 0x027
|
||||
#define GAISLER_I2CMST 0x028
|
||||
#define GAISLER_SPW2 0x029
|
||||
#define GAISLER_AHBDMA 0x02a
|
||||
#define GAISLER_NUHOSP3 0x02b
|
||||
#define GAISLER_CLKGATE 0x02c
|
||||
#define GAISLER_SPICTRL 0x02d
|
||||
#define GAISLER_DDR2SP 0x02e
|
||||
#define GAISLER_SLINK 0x02f
|
||||
#define GAISLER_GRTM 0x030
|
||||
#define GAISLER_GRTC 0x031
|
||||
#define GAISLER_GRPW 0x032
|
||||
#define GAISLER_GRCTM 0x033
|
||||
#define GAISLER_GRHCAN 0x034
|
||||
#define GAISLER_GRFIFO 0x035
|
||||
#define GAISLER_GRADCDAC 0x036
|
||||
#define GAISLER_GRPULSE 0x037
|
||||
#define GAISLER_GRTIMER 0x038
|
||||
#define GAISLER_AHB2PP 0x039
|
||||
#define GAISLER_GRVERSION 0x03a
|
||||
#define GAISLER_APB2PW 0x03b
|
||||
#define GAISLER_PW2APB 0x03c
|
||||
#define GAISLER_GRCAN 0x03d
|
||||
#define GAISLER_I2CSLV 0x03e
|
||||
#define GAISLER_U16550 0x03f
|
||||
#define GAISLER_AHBMST_EM 0x040
|
||||
#define GAISLER_AHBSLV_EM 0x041
|
||||
#define GAISLER_GRTESTMOD 0x042
|
||||
#define GAISLER_ASCS 0x043
|
||||
#define GAISLER_IPMVBCTRL 0x044
|
||||
#define GAISLER_SPIMCTRL 0x045
|
||||
#define GAISLER_L4STAT 0x047
|
||||
#define GAISLER_LEON4 0x048
|
||||
#define GAISLER_LEON4DSU 0x049
|
||||
#define GAISLER_PWM 0x04a
|
||||
#define GAISLER_L2CACHE 0x04b
|
||||
#define GAISLER_SDCTRL64 0x04c
|
||||
#define GAISLER_GR1553B 0x04d
|
||||
#define GAISLER_1553TST 0x04e
|
||||
#define GAISLER_GRIOMMU 0x04f
|
||||
#define GAISLER_FTAHBRAM 0x050
|
||||
#define GAISLER_FTSRCTRL 0x051
|
||||
#define GAISLER_AHBSTAT 0x052
|
||||
#define GAISLER_LEON3FT 0x053
|
||||
#define GAISLER_FTMCTRL 0x054
|
||||
#define GAISLER_FTSDCTRL 0x055
|
||||
#define GAISLER_FTSRCTRL8 0x056
|
||||
#define GAISLER_MEMSCRUB 0x057
|
||||
#define GAISLER_FTSDCTRL64 0x058
|
||||
#define GAISLER_APBPS2 0x060
|
||||
#define GAISLER_VGACTRL 0x061
|
||||
#define GAISLER_LOGAN 0x062
|
||||
#define GAISLER_SVGACTRL 0x063
|
||||
#define GAISLER_T1AHB 0x064
|
||||
#define GAISLER_MP7WRAP 0x065
|
||||
#define GAISLER_GRSYSMON 0x066
|
||||
#define GAISLER_GRACECTRL 0x067
|
||||
#define GAISLER_ATAHBSLV 0x068
|
||||
#define GAISLER_ATAHBMST 0x069
|
||||
#define GAISLER_ATAPBSLV 0x06a
|
||||
#define GAISLER_B1553BC 0x070
|
||||
#define GAISLER_B1553RT 0x071
|
||||
#define GAISLER_B1553BRM 0x072
|
||||
#define GAISLER_AES 0x073
|
||||
#define GAISLER_ECC 0x074
|
||||
#define GAISLER_PCIF 0x075
|
||||
#define GAISLER_CLKMOD 0x076
|
||||
#define GAISLER_HAPSTRAK 0x077
|
||||
#define GAISLER_TEST_1X2 0x078
|
||||
#define GAISLER_WILD2AHB 0x079
|
||||
#define GAISLER_BIO1 0x07a
|
||||
#define GAISLER_AESDMA 0x07b
|
||||
#define GAISLER_SATCAN 0x080
|
||||
#define GAISLER_CANMUX 0x081
|
||||
#define GAISLER_GRTMRX 0x082
|
||||
#define GAISLER_GRTCTX 0x083
|
||||
#define GAISLER_GRTMDESC 0x084
|
||||
#define GAISLER_GRTMVC 0x085
|
||||
#define GAISLER_GEFFE 0x086
|
||||
#define GAISLER_GPREG 0x087
|
||||
#define GAISLER_GRTMPAHB 0x088
|
||||
#define GAISLER_SPWCUC 0x089
|
||||
#define GAISLER_SPW2_DMA 0x08a
|
||||
#define GAISLER_SPWROUTER 0x08b
|
||||
|
||||
/* European Space Agency device ID defines */
|
||||
#define ESA_LEON2 0x002
|
||||
#define ESA_LEON2APB 0x003
|
||||
#define ESA_IRQ 0x005
|
||||
#define ESA_TIMER 0x006
|
||||
#define ESA_UART 0x007
|
||||
#define ESA_CFG 0x008
|
||||
#define ESA_IO 0x009
|
||||
#define ESA_MCTRL 0x00f
|
||||
#define ESA_PCIARB 0x010
|
||||
#define ESA_HURRICANE 0x011
|
||||
#define ESA_SPW_RMAP 0x012
|
||||
#define ESA_AHBUART 0x013
|
||||
#define ESA_SPWA 0x014
|
||||
#define ESA_BOSCHCAN 0x015
|
||||
#define ESA_IRQ2 0x016
|
||||
#define ESA_AHBSTAT 0x017
|
||||
#define ESA_WPROT 0x018
|
||||
#define ESA_WPROT2 0x019
|
||||
#define ESA_PDEC3AMBA 0x020
|
||||
#define ESA_PTME3AMBA 0x021
|
||||
|
||||
/* OpenChip device ID defines */
|
||||
#define OPENCHIP_APBGPIO 0x001
|
||||
#define OPENCHIP_APBI2C 0x002
|
||||
#define OPENCHIP_APBSPI 0x003
|
||||
#define OPENCHIP_APBCHARLCD 0x004
|
||||
#define OPENCHIP_APBPWM 0x005
|
||||
#define OPENCHIP_APBPS2 0x006
|
||||
#define OPENCHIP_APBMMCSD 0x007
|
||||
#define OPENCHIP_APBNAND 0x008
|
||||
#define OPENCHIP_APBLPC 0x009
|
||||
#define OPENCHIP_APBCF 0x00a
|
||||
#define OPENCHIP_APBSYSACE 0x00b
|
||||
#define OPENCHIP_APB1WIRE 0x00c
|
||||
#define OPENCHIP_APBJTAG 0x00d
|
||||
#define OPENCHIP_APBSUI 0x00e
|
||||
|
||||
/* Various contributions device ID defines */
|
||||
#define CONTRIB_CORE1 0x001
|
||||
#define CONTRIB_CORE2 0x002
|
||||
|
||||
/* Gleichmann Electronics device ID defines */
|
||||
#define GLEICHMANN_CUSTOM 0x001
|
||||
#define GLEICHMANN_GEOLCD01 0x002
|
||||
#define GLEICHMANN_DAC 0x003
|
||||
#define GLEICHMANN_HPI 0x004
|
||||
#define GLEICHMANN_SPI 0x005
|
||||
#define GLEICHMANN_HIFC 0x006
|
||||
#define GLEICHMANN_ADCDAC 0x007
|
||||
#define GLEICHMANN_SPIOC 0x008
|
||||
#define GLEICHMANN_AC97 0x009
|
||||
|
||||
/* Sun Microsystems device ID defines */
|
||||
#define SUN_T1 0x001
|
||||
#define SUN_S1 0x011
|
||||
|
||||
/* Orbita device ID defines */
|
||||
#define ORBITA_1553B 0x001
|
||||
#define ORBITA_429 0x002
|
||||
#define ORBITA_SPI 0x003
|
||||
#define ORBITA_I2C 0x004
|
||||
#define ORBITA_SMARTCARD 0x064
|
||||
#define ORBITA_SDCARD 0x065
|
||||
#define ORBITA_UART16550 0x066
|
||||
#define ORBITA_CRYPTO 0x067
|
||||
#define ORBITA_SYSIF 0x068
|
||||
#define ORBITA_PIO 0x069
|
||||
#define ORBITA_RTC 0x0c8
|
||||
#define ORBITA_COLORLCD 0x12c
|
||||
#define ORBITA_PCI 0x190
|
||||
#define ORBITA_DSP 0x1f4
|
||||
#define ORBITA_USBHOST 0x258
|
||||
#define ORBITA_USBDEV 0x2bc
|
||||
|
||||
/* NASA device ID defines */
|
||||
#define NASA_EP32 0x001
|
||||
|
||||
/* CAL device ID defines */
|
||||
#define CAL_DDRCTRL 0x188
|
||||
|
||||
/* Actel Corporation device ID defines */
|
||||
#define ACTEL_COREMP7 0x001
|
||||
|
||||
/* AppleCore device ID defines */
|
||||
#define APPLECORE_UTLEON3 0x001
|
||||
#define APPLECORE_UTLEON3DSU 0x002
|
||||
|
||||
/* Opencores device id's */
|
||||
#define OPENCORES_PCIBR 0x4
|
||||
#define OPENCORES_ETHMAC 0x5
|
||||
|
||||
#endif
|
||||
@@ -13,7 +13,6 @@
|
||||
* Alphabetical list of all possible commands.
|
||||
*/
|
||||
|
||||
#define CONFIG_CMD_AMBAPP /* AMBA Plug & Play Bus print utility */
|
||||
#define CONFIG_CMD_ASKENV /* ask for env variable */
|
||||
#define CONFIG_CMD_BEDBUG /* Include BedBug Debugger */
|
||||
#define CONFIG_CMD_BMP /* BMP support */
|
||||
|
||||
@@ -60,7 +60,6 @@
|
||||
* Supported commands
|
||||
*/
|
||||
#define CONFIG_CMD_REGINFO
|
||||
#define CONFIG_CMD_AMBAPP
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_DIAG
|
||||
#define CONFIG_CMD_IRQ
|
||||
@@ -311,40 +310,38 @@
|
||||
|
||||
/***** Gaisler GRLIB IP-Cores Config ********/
|
||||
|
||||
/* AMBA Plug & Play info display on startup */
|
||||
/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
|
||||
|
||||
#define CONFIG_SYS_GRLIB_SDRAM 0
|
||||
|
||||
/* No SDRAM Configuration */
|
||||
#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
|
||||
|
||||
/* See, GRLIB Docs (grip.pdf) on how to set up
|
||||
* These the memory controller registers.
|
||||
*/
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG1 (0x10f800ff | (1<<11))
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x10f800ff | (1<<11))
|
||||
#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
|
||||
#else
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG2 0x82205260
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82205260
|
||||
#endif
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG3 0x0809a000
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x0809a000
|
||||
|
||||
#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11))
|
||||
/* GRLIB FT-MCTRL configuration */
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x10f800ff | (1<<11))
|
||||
#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
|
||||
#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
|
||||
#else
|
||||
#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82205260
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82205260
|
||||
#endif
|
||||
#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x0809a000
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x0809a000
|
||||
|
||||
/* no DDR controller */
|
||||
#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
|
||||
#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
|
||||
|
||||
/* no DDR2 Controller */
|
||||
#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
|
||||
#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
|
||||
|
||||
/* Calculate scaler register value from default baudrate */
|
||||
#define CONFIG_SYS_GRLIB_APBUART_SCALER \
|
||||
((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
|
||||
#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
|
||||
|
||||
/* Identification string */
|
||||
#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-CPCI-AX2000"
|
||||
|
||||
@@ -54,7 +54,6 @@
|
||||
* Supported commands
|
||||
*/
|
||||
#define CONFIG_CMD_REGINFO
|
||||
#define CONFIG_CMD_AMBAPP
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_DIAG
|
||||
#define CONFIG_CMD_IRQ
|
||||
@@ -288,30 +287,31 @@
|
||||
|
||||
/***** Gaisler GRLIB IP-Cores Config ********/
|
||||
|
||||
/* AMBA Plug & Play info display on startup */
|
||||
/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
|
||||
|
||||
#define CONFIG_SYS_GRLIB_SDRAM 0
|
||||
|
||||
/* No SDRAM Configuration */
|
||||
#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
|
||||
|
||||
/* See, GRLIB Docs (grip.pdf) on how to set up
|
||||
* These the memory controller registers.
|
||||
*/
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG1 (0x10f800ff | (1<<11))
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG2 0x00000000
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG3 0x00000000
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x10f800ff | (1<<11))
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x00000000
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00000000
|
||||
|
||||
#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11))
|
||||
#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x00000000
|
||||
#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00000000
|
||||
/* GRLIB FT-MCTRL configuration */
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x10f800ff | (1<<11))
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x00000000
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00000000
|
||||
|
||||
#define CONFIG_SYS_GRLIB_DDR_CFG 0xa900830a
|
||||
/* DDR controller */
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1_CTRL 0xa900830a
|
||||
|
||||
#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
|
||||
#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
|
||||
|
||||
/* Calculate scaler register value from default baudrate */
|
||||
#define CONFIG_SYS_GRLIB_APBUART_SCALER \
|
||||
((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
|
||||
/* no DDR2 Controller */
|
||||
#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
|
||||
|
||||
/* Identification string */
|
||||
#define CONFIG_IDENT_STRING "GAISLER LEON3 EP2S60"
|
||||
|
||||
@@ -41,7 +41,6 @@
|
||||
* Supported commands
|
||||
*/
|
||||
#define CONFIG_CMD_REGINFO
|
||||
#define CONFIG_CMD_AMBAPP
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_DIAG
|
||||
#define CONFIG_CMD_IRQ
|
||||
@@ -251,32 +250,30 @@
|
||||
|
||||
/***** Gaisler GRLIB IP-Cores Config ********/
|
||||
|
||||
/* AMBA Plug & Play info display on startup */
|
||||
/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
|
||||
|
||||
#define CONFIG_SYS_GRLIB_SDRAM 0
|
||||
|
||||
/* No SDRAM Configuration */
|
||||
#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
|
||||
|
||||
/* See, GRLIB Docs (grip.pdf) on how to set up
|
||||
* These the memory controller registers.
|
||||
*/
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x000000ff | (1<<11))
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00136000
|
||||
|
||||
#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x000000ff | (1<<11))
|
||||
#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
|
||||
#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00136000
|
||||
/* GRLIB FT-MCTRL configuration */
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x000000ff | (1<<11))
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00136000
|
||||
|
||||
/* no DDR controller */
|
||||
#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
|
||||
#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
|
||||
|
||||
/* no DDR2 Controller */
|
||||
#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
|
||||
#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
|
||||
|
||||
/* Calculate scaler register value from default baudrate */
|
||||
#define CONFIG_SYS_GRLIB_APBUART_SCALER \
|
||||
((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
|
||||
#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
|
||||
|
||||
/* Identification string */
|
||||
#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-XC3S-1500"
|
||||
|
||||
@@ -19,9 +19,13 @@
|
||||
*
|
||||
* Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
|
||||
*
|
||||
* TSIM command
|
||||
* tsim-leon3 -sdram 0 -ram 32000 -rom 8192 -mmu
|
||||
* TSIM command:
|
||||
* $ tsim-leon3 -sdram 32768 -ram 4096 -rom 2048 -mmu -cas
|
||||
*
|
||||
* In the evaluation version of TSIM, the -sdram/-ram/-rom arguments are
|
||||
* hard-coded to these values and need not be specified. (see below)
|
||||
*
|
||||
* Get TSIM from http://www.gaisler.com/index.php/downloads/simulators
|
||||
*/
|
||||
|
||||
#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
|
||||
@@ -47,7 +51,6 @@
|
||||
/*
|
||||
* Supported commands
|
||||
*/
|
||||
#define CONFIG_CMD_AMBAPP /* AMBA Plyg&Play information */
|
||||
#define CONFIG_CMD_DIAG
|
||||
#define CONFIG_CMD_FPGA_LOADMK
|
||||
#define CONFIG_CMD_IRQ
|
||||
@@ -184,18 +187,18 @@
|
||||
/*
|
||||
* Memory map
|
||||
*/
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x40000000
|
||||
#define CONFIG_SYS_SDRAM_SIZE 0x02000000
|
||||
#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x60000000
|
||||
#define CONFIG_SYS_SDRAM_SIZE 0x02000000 /* 32MiB SDRAM */
|
||||
#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE)
|
||||
|
||||
/* no SRAM available */
|
||||
#undef CONFIG_SYS_SRAM_BASE
|
||||
#undef CONFIG_SYS_SRAM_SIZE
|
||||
#define CONFIG_SYS_SRAM_BASE 0x40000000
|
||||
#define CONFIG_SYS_SRAM_SIZE 0x00400000 /* 4MiB SRAM */
|
||||
#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE)
|
||||
|
||||
/* Always Run U-Boot from SDRAM */
|
||||
#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
|
||||
#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
|
||||
#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
|
||||
#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
|
||||
#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
|
||||
#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
|
||||
|
||||
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
|
||||
|
||||
@@ -224,6 +227,7 @@
|
||||
/* make un relocated address from relocated address */
|
||||
#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
|
||||
|
||||
#ifdef CONFIG_CMD_NET
|
||||
/*
|
||||
* Ethernet configuration
|
||||
*/
|
||||
@@ -235,6 +239,8 @@
|
||||
/* #define CONFIG_GRETH_10MBIT 1 */
|
||||
#define CONFIG_PHY_ADDR 0x00
|
||||
|
||||
#endif /* CONFIG_CMD_NET */
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
@@ -255,37 +261,65 @@
|
||||
|
||||
/***** Gaisler GRLIB IP-Cores Config ********/
|
||||
|
||||
/* AMBA Plug & Play info display on startup */
|
||||
/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
|
||||
|
||||
#define CONFIG_SYS_GRLIB_SDRAM 0
|
||||
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
|
||||
|
||||
/* No SDRAM Configuration */
|
||||
#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
|
||||
|
||||
/* LEON2 MCTRL configuration */
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x000000ff | (1<<11))
|
||||
#if CONFIG_GRSIM
|
||||
/* GRSIM configuration */
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
|
||||
#else
|
||||
/* TSIM configuration */
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x81805220
|
||||
#endif
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
|
||||
#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00136000
|
||||
|
||||
#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x000000ff | (1<<11))
|
||||
#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
|
||||
#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00136000
|
||||
/* GRLIB FT-MCTRL configuration */
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x000000ff | (1<<11))
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
|
||||
#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00136000
|
||||
|
||||
/* no DDR controller */
|
||||
#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
|
||||
#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
|
||||
|
||||
/* no DDR2 Controller */
|
||||
#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
|
||||
#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
|
||||
|
||||
#define CONFIG_SYS_GRLIB_APBUART_SCALER \
|
||||
((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
|
||||
#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
|
||||
|
||||
/* default kernel command line */
|
||||
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
|
||||
|
||||
#define CONFIG_IDENT_STRING "Gaisler GRSIM"
|
||||
|
||||
/* TSIM command:
|
||||
* $ ./tsim-leon3 -mmu -cas
|
||||
*
|
||||
* This TSIM evaluation version will expire 2015-04-02
|
||||
*
|
||||
*
|
||||
* TSIM/LEON3 SPARC simulator, version 2.0.35 (evaluation version)
|
||||
*
|
||||
* Copyright (C) 2014, Aeroflex Gaisler - all rights reserved.
|
||||
* This software may only be used with a valid license.
|
||||
* For latest updates, go to http://www.gaisler.com/
|
||||
* Comments or bug-reports to support@gaisler.com
|
||||
*
|
||||
* serial port A on stdin/stdout
|
||||
* allocated 4096 K SRAM memory, in 1 bank
|
||||
* allocated 32 M SDRAM memory, in 1 bank
|
||||
* allocated 2048 K ROM memory
|
||||
* icache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
|
||||
* dcache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
|
||||
* tsim> leon
|
||||
* 0x80000000 Memory configuration register 1 0x000002ff
|
||||
* 0x80000004 Memory configuration register 2 0x81805220
|
||||
* 0x80000008 Memory configuration register 3 0x00000000
|
||||
*/
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
||||
@@ -264,8 +264,6 @@
|
||||
#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
|
||||
|
||||
/*** LEON2 UART 1 ***/
|
||||
#define CONFIG_SYS_LEON2_UART1_SCALER \
|
||||
((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
|
||||
|
||||
/* UART1 Define to 1 or 0 */
|
||||
#define LEON2_UART1_LOOPBACK_ENABLE 0
|
||||
@@ -275,9 +273,6 @@
|
||||
|
||||
/*** LEON2 UART 2 ***/
|
||||
|
||||
#define CONFIG_SYS_LEON2_UART2_SCALER \
|
||||
((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
|
||||
|
||||
/* UART2 Define to 1 or 0 */
|
||||
#define LEON2_UART2_LOOPBACK_ENABLE 0
|
||||
#define LEON2_UART2_FLOWCTRL_ENABLE 0
|
||||
|
||||
47
include/grlib/apbuart.h
Normal file
47
include/grlib/apbuart.h
Normal file
@@ -0,0 +1,47 @@
|
||||
/* GRLIB APBUART definitions
|
||||
*
|
||||
* (C) Copyright 2010, 2015
|
||||
* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __GRLIB_APBUART_H__
|
||||
#define __GRLIB_APBUART_H__
|
||||
|
||||
/* APBUART Register map */
|
||||
typedef struct {
|
||||
volatile unsigned int data;
|
||||
volatile unsigned int status;
|
||||
volatile unsigned int ctrl;
|
||||
volatile unsigned int scaler;
|
||||
} ambapp_dev_apbuart;
|
||||
|
||||
/*
|
||||
* The following defines the bits in the LEON UART Status Registers.
|
||||
*/
|
||||
|
||||
#define APBUART_STATUS_DR 0x00000001 /* Data Ready */
|
||||
#define APBUART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
|
||||
#define APBUART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
|
||||
#define APBUART_STATUS_BR 0x00000008 /* Break Error */
|
||||
#define APBUART_STATUS_OE 0x00000010 /* RX Overrun Error */
|
||||
#define APBUART_STATUS_PE 0x00000020 /* RX Parity Error */
|
||||
#define APBUART_STATUS_FE 0x00000040 /* RX Framing Error */
|
||||
#define APBUART_STATUS_ERR 0x00000078 /* Error Mask */
|
||||
|
||||
/*
|
||||
* The following defines the bits in the LEON UART Ctrl Registers.
|
||||
*/
|
||||
|
||||
#define APBUART_CTRL_RE 0x00000001 /* Receiver enable */
|
||||
#define APBUART_CTRL_TE 0x00000002 /* Transmitter enable */
|
||||
#define APBUART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
|
||||
#define APBUART_CTRL_TI 0x00000008 /* Transmitter interrupt enable */
|
||||
#define APBUART_CTRL_PS 0x00000010 /* Parity select */
|
||||
#define APBUART_CTRL_PE 0x00000020 /* Parity enable */
|
||||
#define APBUART_CTRL_FL 0x00000040 /* Flow control enable */
|
||||
#define APBUART_CTRL_LB 0x00000080 /* Loop Back enable */
|
||||
#define APBUART_CTRL_DBG (1<<11) /* Debug Bit used by GRMON */
|
||||
|
||||
#endif
|
||||
34
include/grlib/gptimer.h
Normal file
34
include/grlib/gptimer.h
Normal file
@@ -0,0 +1,34 @@
|
||||
/* GRLIB GPTIMER (General Purpose Timer) definitions
|
||||
*
|
||||
* (C) Copyright 2010, 2015
|
||||
* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __GRLIB_GPTIMER_H__
|
||||
#define __GRLIB_GPTIMER_H__
|
||||
|
||||
typedef struct {
|
||||
volatile unsigned int val;
|
||||
volatile unsigned int rld;
|
||||
volatile unsigned int ctrl;
|
||||
volatile unsigned int unused;
|
||||
} ambapp_dev_gptimer_element;
|
||||
|
||||
#define GPTIMER_CTRL_EN 0x1 /* Timer enable */
|
||||
#define GPTIMER_CTRL_RS 0x2 /* Timer reStart */
|
||||
#define GPTIMER_CTRL_LD 0x4 /* Timer reLoad */
|
||||
#define GPTIMER_CTRL_IE 0x8 /* interrupt enable */
|
||||
#define GPTIMER_CTRL_IP 0x10 /* interrupt flag/pending */
|
||||
#define GPTIMER_CTRL_CH 0x20 /* Chain with previous timer */
|
||||
|
||||
typedef struct {
|
||||
volatile unsigned int scalar;
|
||||
volatile unsigned int scalar_reload;
|
||||
volatile unsigned int config;
|
||||
volatile unsigned int unused;
|
||||
volatile ambapp_dev_gptimer_element e[8];
|
||||
} ambapp_dev_gptimer;
|
||||
|
||||
#endif
|
||||
87
include/grlib/greth.h
Normal file
87
include/grlib/greth.h
Normal file
@@ -0,0 +1,87 @@
|
||||
/* Gaisler.com GRETH 10/100/1000 Ethernet MAC definitions
|
||||
*
|
||||
* (C) Copyright 2010, 2015
|
||||
* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __GRLIB_GRETH_H__
|
||||
#define __GRLIB_GRETH_H__
|
||||
|
||||
#define GRETH_FD 0x10
|
||||
#define GRETH_RESET 0x40
|
||||
#define GRETH_MII_BUSY 0x8
|
||||
#define GRETH_MII_NVALID 0x10
|
||||
|
||||
/* MII registers */
|
||||
#define GRETH_MII_EXTADV_1000FD 0x00000200
|
||||
#define GRETH_MII_EXTADV_1000HD 0x00000100
|
||||
#define GRETH_MII_EXTPRT_1000FD 0x00000800
|
||||
#define GRETH_MII_EXTPRT_1000HD 0x00000400
|
||||
|
||||
#define GRETH_MII_100T4 0x00000200
|
||||
#define GRETH_MII_100TXFD 0x00000100
|
||||
#define GRETH_MII_100TXHD 0x00000080
|
||||
#define GRETH_MII_10FD 0x00000040
|
||||
#define GRETH_MII_10HD 0x00000020
|
||||
|
||||
#define GRETH_BD_EN 0x800
|
||||
#define GRETH_BD_WR 0x1000
|
||||
#define GRETH_BD_IE 0x2000
|
||||
#define GRETH_BD_LEN 0x7FF
|
||||
|
||||
#define GRETH_TXEN 0x1
|
||||
#define GRETH_INT_TX 0x8
|
||||
#define GRETH_TXI 0x4
|
||||
#define GRETH_TXBD_STATUS 0x0001C000
|
||||
#define GRETH_TXBD_MORE 0x20000
|
||||
#define GRETH_TXBD_IPCS 0x40000
|
||||
#define GRETH_TXBD_TCPCS 0x80000
|
||||
#define GRETH_TXBD_UDPCS 0x100000
|
||||
#define GRETH_TXBD_ERR_LC 0x10000
|
||||
#define GRETH_TXBD_ERR_UE 0x4000
|
||||
#define GRETH_TXBD_ERR_AL 0x8000
|
||||
#define GRETH_TXBD_NUM 128
|
||||
#define GRETH_TXBD_NUM_MASK (GRETH_TXBD_NUM-1)
|
||||
#define GRETH_TX_BUF_SIZE 2048
|
||||
|
||||
#define GRETH_INT_RX 0x4
|
||||
#define GRETH_RXEN 0x2
|
||||
#define GRETH_RXI 0x8
|
||||
#define GRETH_RXBD_STATUS 0xFFFFC000
|
||||
#define GRETH_RXBD_ERR_AE 0x4000
|
||||
#define GRETH_RXBD_ERR_FT 0x8000
|
||||
#define GRETH_RXBD_ERR_CRC 0x10000
|
||||
#define GRETH_RXBD_ERR_OE 0x20000
|
||||
#define GRETH_RXBD_ERR_LE 0x40000
|
||||
#define GRETH_RXBD_IP_DEC 0x80000
|
||||
#define GRETH_RXBD_IP_CSERR 0x100000
|
||||
#define GRETH_RXBD_UDP_DEC 0x200000
|
||||
#define GRETH_RXBD_UDP_CSERR 0x400000
|
||||
#define GRETH_RXBD_TCP_DEC 0x800000
|
||||
#define GRETH_RXBD_TCP_CSERR 0x1000000
|
||||
|
||||
#define GRETH_RXBD_NUM 128
|
||||
#define GRETH_RXBD_NUM_MASK (GRETH_RXBD_NUM-1)
|
||||
#define GRETH_RX_BUF_SIZE 2048
|
||||
|
||||
/* Ethernet configuration registers */
|
||||
typedef struct _greth_regs {
|
||||
volatile unsigned int control;
|
||||
volatile unsigned int status;
|
||||
volatile unsigned int esa_msb;
|
||||
volatile unsigned int esa_lsb;
|
||||
volatile unsigned int mdio;
|
||||
volatile unsigned int tx_desc_p;
|
||||
volatile unsigned int rx_desc_p;
|
||||
volatile unsigned int edcl_ip;
|
||||
} greth_regs;
|
||||
|
||||
/* Ethernet buffer descriptor */
|
||||
typedef struct _greth_bd {
|
||||
volatile unsigned int stat;
|
||||
unsigned int addr; /* Buffer address not changed by HW */
|
||||
} greth_bd;
|
||||
|
||||
#endif
|
||||
23
include/grlib/irqmp.h
Normal file
23
include/grlib/irqmp.h
Normal file
@@ -0,0 +1,23 @@
|
||||
/* GRLIB IRQMP (IRQ Multi-processor controller) definitions
|
||||
*
|
||||
* (C) Copyright 2010, 2015
|
||||
* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __GRLIB_IRQMP_H__
|
||||
#define __GRLIB_IRQMP_H__
|
||||
|
||||
typedef struct {
|
||||
volatile unsigned int ilevel;
|
||||
volatile unsigned int ipend;
|
||||
volatile unsigned int iforce;
|
||||
volatile unsigned int iclear;
|
||||
volatile unsigned int mstatus;
|
||||
volatile unsigned int notused[11];
|
||||
volatile unsigned int cpu_mask[16];
|
||||
volatile unsigned int cpu_force[16];
|
||||
} ambapp_dev_irqmp;
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user