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Merge tag 'xilinx-for-v2021.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2021.01 arm64: - Support for bigger U-Boot images compiled with PIE microblaze: - Extend support for LE/BE systems zynqmp: - Refactor silicon ID detection code with using firmware interface - Add support for saving variables based on bootmode zynqmp-r5: - Fix MPU mapping and defconfig setting. xilinx: - Minor driver changes: names alignment - Enable UBIFS - Minor DT and macros fixes - Fix boot with appended DT - Fix distro boot cmd: - pxe: Add fixing for platforms with manual relocation support clk: - fixed_rate: Add DM flag to support early boot on r5 fpga: - zynqmppl: Use only firmware interface and enable SPL build serial: - uartlite: Enable for ARM systems and support endians mmc: - zynq: Fix indentation net: - gem: Support for multiple phys - emac: Fix 64bit support and enable it for arm64 kconfig: - Setup default values for Xilinx platforms - Fix dependecies for Xilinx drivers - Source board Kconfig only when platform is enabled - Fix FPGA Kconfig entry with SPL - Change some defconfig values bindings: - Add binding doc for vsc8531
This commit is contained in:
@@ -24,7 +24,6 @@
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/* No falcon support */
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#undef CONFIG_SPL_OS_BOOT
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#undef CONFIG_SPL_FPGA_SUPPORT
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/* FPGA commands that we don't use */
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@@ -94,6 +94,18 @@
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# define BOOT_TARGET_DEVICES_MMC(func)
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#endif
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#if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP)
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# define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
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#else
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# define BOOT_TARGET_DEVICES_PXE(func)
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#endif
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#if defined(CONFIG_CMD_DHCP)
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# define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
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#else
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# define BOOT_TARGET_DEVICES_DHCP(func)
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#endif
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#if defined(CONFIG_ZYNQMP_GQSPI) || defined(CONFIG_CADENCE_OSPI_VERSAL)
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# define BOOT_TARGET_DEVICES_XSPI(func) func(XSPI, xspi, 0)
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#else
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@@ -135,8 +147,8 @@
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BOOT_TARGET_DEVICES_MMC(func) \
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BOOT_TARGET_DEVICES_XSPI(func) \
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BOOT_TARGET_DEVICES_DFU_USB(func) \
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func(PXE, pxe, na) \
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func(DHCP, dhcp, na)
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BOOT_TARGET_DEVICES_PXE(func) \
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BOOT_TARGET_DEVICES_DHCP(func)
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#include <config_distro_bootcmd.h>
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40
include/dt-bindings/net/mscc-phy-vsc8531.h
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40
include/dt-bindings/net/mscc-phy-vsc8531.h
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@@ -0,0 +1,40 @@
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/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Device Tree constants for Microsemi VSC8531 PHY
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*
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* Author: Nagaraju Lakkaraju
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*
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* Copyright (c) 2017 Microsemi Corporation
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*/
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#ifndef _DT_BINDINGS_MSCC_VSC8531_H
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#define _DT_BINDINGS_MSCC_VSC8531_H
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/* PHY LED Modes */
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#define VSC8531_LINK_ACTIVITY 0
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#define VSC8531_LINK_1000_ACTIVITY 1
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#define VSC8531_LINK_100_ACTIVITY 2
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#define VSC8531_LINK_10_ACTIVITY 3
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#define VSC8531_LINK_100_1000_ACTIVITY 4
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#define VSC8531_LINK_10_1000_ACTIVITY 5
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#define VSC8531_LINK_10_100_ACTIVITY 6
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#define VSC8584_LINK_100FX_1000X_ACTIVITY 7
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#define VSC8531_DUPLEX_COLLISION 8
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#define VSC8531_COLLISION 9
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#define VSC8531_ACTIVITY 10
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#define VSC8584_100FX_1000X_ACTIVITY 11
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#define VSC8531_AUTONEG_FAULT 12
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#define VSC8531_SERIAL_MODE 13
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#define VSC8531_FORCE_LED_OFF 14
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#define VSC8531_FORCE_LED_ON 15
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#define VSC8531_RGMII_CLK_DELAY_0_2_NS 0
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#define VSC8531_RGMII_CLK_DELAY_0_8_NS 1
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#define VSC8531_RGMII_CLK_DELAY_1_1_NS 2
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#define VSC8531_RGMII_CLK_DELAY_1_7_NS 3
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#define VSC8531_RGMII_CLK_DELAY_2_0_NS 4
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#define VSC8531_RGMII_CLK_DELAY_2_3_NS 5
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#define VSC8531_RGMII_CLK_DELAY_2_6_NS 6
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#define VSC8531_RGMII_CLK_DELAY_3_4_NS 7
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#endif
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@@ -10,9 +10,6 @@
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#include <xilinx.h>
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#include <linux/bitops.h>
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#define ZYNQMP_SIP_SVC_CSU_DMA_CHIPID 0xC2000018
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#define ZYNQMP_SIP_SVC_PM_FPGA_LOAD 0xC2000016
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#define ZYNQMP_SIP_SVC_PM_FPGA_STATUS 0xC2000017
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#define ZYNQMP_FPGA_OP_INIT (1 << 0)
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#define ZYNQMP_FPGA_OP_LOAD (1 << 1)
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#define ZYNQMP_FPGA_OP_DONE (1 << 2)
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