Xilinx changes for v2021.01

arm64:
- Support for bigger U-Boot images compiled with PIE

microblaze:
- Extend support for LE/BE systems

zynqmp:
- Refactor silicon ID detection code with using firmware interface
- Add support for saving variables based on bootmode

zynqmp-r5:
- Fix MPU mapping and defconfig setting.

xilinx:
- Minor driver changes: names alignment
- Enable UBIFS
- Minor DT and macros fixes
- Fix boot with appended DT
- Fix distro boot

cmd:
- pxe: Add fixing for platforms with manual relocation support

clk:
- fixed_rate: Add DM flag to support early boot on r5

fpga:
- zynqmppl: Use only firmware interface and enable SPL build

serial:
- uartlite: Enable for ARM systems and support endians

mmc:
- zynq: Fix indentation

net:
- gem: Support for multiple phys
- emac: Fix 64bit support and enable it for arm64

kconfig:
- Setup default values for Xilinx platforms
- Fix dependecies for Xilinx drivers
- Source board Kconfig only when platform is enabled
- Fix FPGA Kconfig entry with SPL
- Change some defconfig values

bindings:
- Add binding doc for vsc8531
This commit is contained in:
Tom Rini
2020-09-24 08:33:47 -04:00
51 changed files with 496 additions and 295 deletions

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@@ -24,7 +24,6 @@
/* No falcon support */
#undef CONFIG_SPL_OS_BOOT
#undef CONFIG_SPL_FPGA_SUPPORT
/* FPGA commands that we don't use */

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@@ -94,6 +94,18 @@
# define BOOT_TARGET_DEVICES_MMC(func)
#endif
#if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP)
# define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
#else
# define BOOT_TARGET_DEVICES_PXE(func)
#endif
#if defined(CONFIG_CMD_DHCP)
# define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
#else
# define BOOT_TARGET_DEVICES_DHCP(func)
#endif
#if defined(CONFIG_ZYNQMP_GQSPI) || defined(CONFIG_CADENCE_OSPI_VERSAL)
# define BOOT_TARGET_DEVICES_XSPI(func) func(XSPI, xspi, 0)
#else
@@ -135,8 +147,8 @@
BOOT_TARGET_DEVICES_MMC(func) \
BOOT_TARGET_DEVICES_XSPI(func) \
BOOT_TARGET_DEVICES_DFU_USB(func) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na)
BOOT_TARGET_DEVICES_PXE(func) \
BOOT_TARGET_DEVICES_DHCP(func)
#include <config_distro_bootcmd.h>

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@@ -0,0 +1,40 @@
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
* Device Tree constants for Microsemi VSC8531 PHY
*
* Author: Nagaraju Lakkaraju
*
* Copyright (c) 2017 Microsemi Corporation
*/
#ifndef _DT_BINDINGS_MSCC_VSC8531_H
#define _DT_BINDINGS_MSCC_VSC8531_H
/* PHY LED Modes */
#define VSC8531_LINK_ACTIVITY 0
#define VSC8531_LINK_1000_ACTIVITY 1
#define VSC8531_LINK_100_ACTIVITY 2
#define VSC8531_LINK_10_ACTIVITY 3
#define VSC8531_LINK_100_1000_ACTIVITY 4
#define VSC8531_LINK_10_1000_ACTIVITY 5
#define VSC8531_LINK_10_100_ACTIVITY 6
#define VSC8584_LINK_100FX_1000X_ACTIVITY 7
#define VSC8531_DUPLEX_COLLISION 8
#define VSC8531_COLLISION 9
#define VSC8531_ACTIVITY 10
#define VSC8584_100FX_1000X_ACTIVITY 11
#define VSC8531_AUTONEG_FAULT 12
#define VSC8531_SERIAL_MODE 13
#define VSC8531_FORCE_LED_OFF 14
#define VSC8531_FORCE_LED_ON 15
#define VSC8531_RGMII_CLK_DELAY_0_2_NS 0
#define VSC8531_RGMII_CLK_DELAY_0_8_NS 1
#define VSC8531_RGMII_CLK_DELAY_1_1_NS 2
#define VSC8531_RGMII_CLK_DELAY_1_7_NS 3
#define VSC8531_RGMII_CLK_DELAY_2_0_NS 4
#define VSC8531_RGMII_CLK_DELAY_2_3_NS 5
#define VSC8531_RGMII_CLK_DELAY_2_6_NS 6
#define VSC8531_RGMII_CLK_DELAY_3_4_NS 7
#endif

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@@ -10,9 +10,6 @@
#include <xilinx.h>
#include <linux/bitops.h>
#define ZYNQMP_SIP_SVC_CSU_DMA_CHIPID 0xC2000018
#define ZYNQMP_SIP_SVC_PM_FPGA_LOAD 0xC2000016
#define ZYNQMP_SIP_SVC_PM_FPGA_STATUS 0xC2000017
#define ZYNQMP_FPGA_OP_INIT (1 << 0)
#define ZYNQMP_FPGA_OP_LOAD (1 << 1)
#define ZYNQMP_FPGA_OP_DONE (1 << 2)