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Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
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@@ -22,10 +22,10 @@
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#define _ASM_CONFIG_H_
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#ifndef CONFIG_MAX_MEM_MAPPED
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#if defined(CONFIG_SDRAM_PPC4xx_IBM_DDR2) && defined(CONFIG_SPD_EEPROM)
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#if defined(CONFIG_4xx)
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#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30)
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#else
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#define CONFIG_MAX_MEM_MAPPED (256 << 20)
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#define CONFIG_MAX_MEM_MAPPED (256 << 20)
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#endif
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#endif
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@@ -566,6 +566,8 @@
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#define SDRAM_RDCC_RSAE_MASK 0x00000001
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#define SDRAM_RDCC_RSAE_DISABLE 0x00000001
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#define SDRAM_RDCC_RSAE_ENABLE 0x00000000
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#define SDRAM_RDCC_RDSS_ENCODE(n) ((((u32)(n))&0x03)<<30)
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#define SDRAM_RDCC_RDSS_DECODE(n) ((((u32)(n))>>30)&0x03)
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/*
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* SDRAM Read Feedback Delay Control Register
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@@ -45,7 +45,6 @@
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*/
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#define CONFIG_PHYS_64BIT
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#define CONFIG_VERY_BIG_RAM
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#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30)
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/*
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* Include common defines/options for all AMCC eval boards
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@@ -234,16 +234,9 @@
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*
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* DDR Autocalibration Method_B is the default.
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*/
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#if 0
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/*
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* Needs FIX!!!
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* Disable autocalibration for now, because of the unresolved problem
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* with kilauea board using 200MHz PLB/DDR2 frequency
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*/
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#define CONFIG_PPC4xx_DDR_AUTOCALIBRATION /* IBM DDR autocalibration */
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#define DEBUG_PPC4xx_DDR_AUTOCALIBRATION /* dynamic DDR autocal debug */
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#undef CONFIG_PPC4xx_DDR_METHOD_A
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#endif
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#define CONFIG_SYS_SDRAM0_MB0CF_BASE (( 0 << 20) + CONFIG_SYS_SDRAM_BASE)
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