From 5dc626f836190fa2ef27f34e263b53641c14087c Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:32 +0900 Subject: [PATCH 01/33] pinctrl: uniphier: add UniPhier pinctrl core support The core support for the pinctrl drivers for all the UniPhier SoCs. Signed-off-by: Masahiro Yamada Reviewed-by: Simon Glass --- drivers/pinctrl/Kconfig | 2 + drivers/pinctrl/Makefile | 2 + drivers/pinctrl/uniphier/Kconfig | 6 + drivers/pinctrl/uniphier/Makefile | 1 + .../pinctrl/uniphier/pinctrl-uniphier-core.c | 154 ++++++++++++++++++ drivers/pinctrl/uniphier/pinctrl-uniphier.h | 113 +++++++++++++ 6 files changed, 278 insertions(+) create mode 100644 drivers/pinctrl/uniphier/Kconfig create mode 100644 drivers/pinctrl/uniphier/Makefile create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-core.c create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier.h diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index b8146df99b6..3b6e3b7060d 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -124,4 +124,6 @@ config PINCTRL_SANDBOX endif +source "drivers/pinctrl/uniphier/Kconfig" + endmenu diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index f537df4e886..e56a17f9665 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -3,3 +3,5 @@ obj-$(CONFIG_$(SPL_)PINCTRL_GENERIC) += pinctrl-generic.o obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o + +obj-$(CONFIG_ARCH_UNIPHIER) += uniphier/ diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig new file mode 100644 index 00000000000..29a623dfc1d --- /dev/null +++ b/drivers/pinctrl/uniphier/Kconfig @@ -0,0 +1,6 @@ +if ARCH_UNIPHIER + +config PINCTRL_UNIPHIER_CORE + bool + +endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile new file mode 100644 index 00000000000..748aa1b4e42 --- /dev/null +++ b/drivers/pinctrl/uniphier/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_PINCTRL_UNIPHIER_CORE) += pinctrl-uniphier-core.o diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c new file mode 100644 index 00000000000..37a920ca8b4 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c @@ -0,0 +1,154 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +#include "pinctrl-uniphier.h" + +DECLARE_GLOBAL_DATA_PTR; + +static int uniphier_pinctrl_get_groups_count(struct udevice *dev) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->socdata->groups_count; +} + +static const char *uniphier_pinctrl_get_group_name(struct udevice *dev, + unsigned selector) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->socdata->groups[selector].name; +} + +static int uniphier_pinmux_get_functions_count(struct udevice *dev) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->socdata->functions_count; +} + +static const char *uniphier_pinmux_get_function_name(struct udevice *dev, + unsigned selector) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->socdata->functions[selector]; +} + +static void uniphier_pinconf_input_enable(struct udevice *dev, unsigned pin) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + int pins_count = priv->socdata->pins_count; + const struct uniphier_pinctrl_pin *pins = priv->socdata->pins; + int i; + + for (i = 0; i < pins_count; i++) { + if (pins[i].number == pin) { + unsigned int iectrl; + u32 tmp; + + iectrl = uniphier_pin_get_iectrl(pins[i].data); + tmp = readl(priv->base + UNIPHIER_PINCTRL_IECTRL); + tmp |= 1 << iectrl; + writel(tmp, priv->base + UNIPHIER_PINCTRL_IECTRL); + } + } +} + +static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin, + unsigned muxval) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + unsigned mux_bits = priv->socdata->mux_bits; + unsigned reg_stride = priv->socdata->reg_stride; + unsigned reg, reg_end, shift, mask; + u32 tmp; + + reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride; + reg_end = reg + reg_stride; + shift = pin * mux_bits % 32; + mask = (1U << mux_bits) - 1; + + /* + * If reg_stride is greater than 4, the MSB of each pinsel shall be + * stored in the offset+4. + */ + for (; reg < reg_end; reg += 4) { + tmp = readl(priv->base + reg); + tmp &= ~(mask << shift); + tmp |= (mask & muxval) << shift; + writel(tmp, priv->base + reg); + + muxval >>= mux_bits; + } + + if (priv->socdata->load_pinctrl) + writel(1, priv->base + UNIPHIER_PINCTRL_LOAD_PINMUX); + + /* some pins need input-enabling */ + uniphier_pinconf_input_enable(dev, pin); +} + +static int uniphier_pinmux_group_set(struct udevice *dev, + unsigned group_selector, + unsigned func_selector) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + const struct uniphier_pinctrl_group *grp = + &priv->socdata->groups[group_selector]; + int i; + + for (i = 0; i < grp->num_pins; i++) + uniphier_pinmux_set_one(dev, grp->pins[i], grp->muxvals[i]); + + return 0; +} + +const struct pinctrl_ops uniphier_pinctrl_ops = { + .get_groups_count = uniphier_pinctrl_get_groups_count, + .get_group_name = uniphier_pinctrl_get_group_name, + .get_functions_count = uniphier_pinmux_get_functions_count, + .get_function_name = uniphier_pinmux_get_function_name, + .pinmux_group_set = uniphier_pinmux_group_set, + .set_state = pinctrl_generic_set_state, +}; + +int uniphier_pinctrl_probe(struct udevice *dev, + struct uniphier_pinctrl_socdata *socdata) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + fdt_addr_t addr; + fdt_size_t size; + + addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", + &size); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->base = map_sysmem(addr, size); + if (!priv->base) + return -ENOMEM; + + priv->socdata = socdata; + + return 0; +} + +int uniphier_pinctrl_remove(struct udevice *dev) +{ + struct uniphier_pinctrl_priv *priv = dev_get_priv(dev); + + unmap_sysmem(priv->base); + + return 0; +} diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h new file mode 100644 index 00000000000..7eaec6a7024 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h @@ -0,0 +1,113 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __PINCTRL_UNIPHIER_H__ +#define __PINCTRL_UNIPHIER_H__ + +/* TODO: move this to include/linux/bug.h */ +#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:-!!(e); })) + +#include +#include + +#define UNIPHIER_PINCTRL_PINMUX_BASE 0x0 +#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x700 +#define UNIPHIER_PINCTRL_IECTRL 0xd00 + +#define UNIPHIER_PIN_ATTR_PACKED(iectrl) (iectrl) + +static inline unsigned int uniphier_pin_get_iectrl(unsigned long data) +{ + return data; +} + +/** + * struct uniphier_pinctrl_pin - pin data for UniPhier SoC + * + * @number: pin number + * @data: additional per-pin data + */ +struct uniphier_pinctrl_pin { + unsigned number; + unsigned long data; +}; + +/** + * struct uniphier_pinctrl_group - pin group data for UniPhier SoC + * + * @name: pin group name + * @pins: array of pins that belong to the group + * @num_pins: number of pins in the group + * @muxvals: array of values to be set to pinmux registers + */ +struct uniphier_pinctrl_group { + const char *name; + const unsigned *pins; + unsigned num_pins; + const unsigned *muxvals; +}; + +/** + * struct uniphier_pinctrl_socdata - SoC data for UniPhier pin controller + * + * @pins: array of pin data + * @pins_count: number of pin data + * @groups: array of pin group data + * @groups_count: number of pin group data + * @functions: array of pinmux function names + * @functions_count: number of pinmux functions + * @mux_bits: bit width of each pinmux register + * @reg_stride: stride of pinmux register address + * @load_pinctrl: if true, LOAD_PINMUX register must be set to one for new + * values in pinmux registers to become really effective + */ +struct uniphier_pinctrl_socdata { + const struct uniphier_pinctrl_pin *pins; + int pins_count; + const struct uniphier_pinctrl_group *groups; + int groups_count; + const char * const *functions; + int functions_count; + unsigned mux_bits; + unsigned reg_stride; + bool load_pinctrl; +}; + +#define UNIPHIER_PINCTRL_PIN(a, b) \ +{ \ + .number = a, \ + .data = UNIPHIER_PIN_ATTR_PACKED(b), \ +} + +#define UNIPHIER_PINCTRL_GROUP(grp) \ + { \ + .name = #grp, \ + .pins = grp##_pins, \ + .num_pins = ARRAY_SIZE(grp##_pins), \ + .muxvals = grp##_muxvals + \ + BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \ + ARRAY_SIZE(grp##_muxvals)), \ + } + +/** + * struct uniphier_pinctrl_priv - private data for UniPhier pinctrl driver + * + * @base: base address of the pinctrl device + * @socdata: SoC specific data + */ +struct uniphier_pinctrl_priv { + void __iomem *base; + struct uniphier_pinctrl_socdata *socdata; +}; + +extern const struct pinctrl_ops uniphier_pinctrl_ops; + +int uniphier_pinctrl_probe(struct udevice *dev, + struct uniphier_pinctrl_socdata *socdata); + +int uniphier_pinctrl_remove(struct udevice *dev); + +#endif /* __PINCTRL_UNIPHIER_H__ */ From e4410e820756891129f7c15f701c51956013804b Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:33 +0900 Subject: [PATCH 02/33] pinctrl: uniphier: add UniPhier PH1-LD4 pinctrl driver Add pin configuration and pinmux support for UniPhier PH1-LD4 SoC. Signed-off-by: Masahiro Yamada --- drivers/pinctrl/uniphier/Kconfig | 6 + drivers/pinctrl/uniphier/Makefile | 2 + drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c | 133 +++++++++++++++++++++ 3 files changed, 141 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 29a623dfc1d..03593cdd8b3 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -3,4 +3,10 @@ if ARCH_UNIPHIER config PINCTRL_UNIPHIER_CORE bool +config PINCTRL_UNIPHIER_PH1_LD4 + bool "UniPhier PH1-LD4 SoC pinctrl driver" + depends on MACH_PH1_LD4 + default y + select PINCTRL_UNIPHIER_CORE + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index 748aa1b4e42..b4bd042ac4f 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -1 +1,3 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_CORE) += pinctrl-uniphier-core.o + +obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c b/drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c new file mode 100644 index 00000000000..b3d47f09153 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c @@ -0,0 +1,133 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#include "pinctrl-uniphier.h" + +static const struct uniphier_pinctrl_pin ph1_ld4_pins[] = { + UNIPHIER_PINCTRL_PIN(53, 0), + UNIPHIER_PINCTRL_PIN(54, 0), + UNIPHIER_PINCTRL_PIN(55, 0), + UNIPHIER_PINCTRL_PIN(56, 0), + UNIPHIER_PINCTRL_PIN(67, 0), + UNIPHIER_PINCTRL_PIN(68, 0), + UNIPHIER_PINCTRL_PIN(69, 0), + UNIPHIER_PINCTRL_PIN(70, 0), + UNIPHIER_PINCTRL_PIN(85, 0), + UNIPHIER_PINCTRL_PIN(88, 0), + UNIPHIER_PINCTRL_PIN(156, 0), +}; + +static const unsigned emmc_pins[] = {21, 22, 23, 24, 25, 26, 27}; +static const unsigned emmc_muxvals[] = {0, 1, 1, 1, 1, 1, 1}; +static const unsigned emmc_dat8_pins[] = {28, 29, 30, 31}; +static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const unsigned i2c0_pins[] = {102, 103}; +static const unsigned i2c0_muxvals[] = {0, 0}; +static const unsigned i2c1_pins[] = {104, 105}; +static const unsigned i2c1_muxvals[] = {0, 0}; +static const unsigned i2c2_pins[] = {108, 109}; +static const unsigned i2c2_muxvals[] = {2, 2}; +static const unsigned i2c3_pins[] = {108, 109}; +static const unsigned i2c3_muxvals[] = {3, 3}; +static const unsigned nand_pins[] = {24, 25, 26, 27, 28, 29, 30, 31, 158, 159, + 160, 161, 162, 163, 164}; +static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0}; +static const unsigned nand_cs1_pins[] = {22, 23}; +static const unsigned nand_cs1_muxvals[] = {0, 0}; +static const unsigned sd_pins[] = {44, 45, 46, 47, 48, 49, 50, 51, 52}; +static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned uart0_pins[] = {85, 88}; +static const unsigned uart0_muxvals[] = {1, 1}; +static const unsigned uart1_pins[] = {155, 156}; +static const unsigned uart1_muxvals[] = {13, 13}; +static const unsigned uart1b_pins[] = {69, 70}; +static const unsigned uart1b_muxvals[] = {23, 23}; +static const unsigned uart2_pins[] = {128, 129}; +static const unsigned uart2_muxvals[] = {13, 13}; +static const unsigned uart3_pins[] = {110, 111}; +static const unsigned uart3_muxvals[] = {1, 1}; +static const unsigned usb0_pins[] = {53, 54}; +static const unsigned usb0_muxvals[] = {0, 0}; +static const unsigned usb1_pins[] = {55, 56}; +static const unsigned usb1_muxvals[] = {0, 0}; +static const unsigned usb2_pins[] = {155, 156}; +static const unsigned usb2_muxvals[] = {4, 4}; +static const unsigned usb2b_pins[] = {67, 68}; +static const unsigned usb2b_muxvals[] = {23, 23}; + +static const struct uniphier_pinctrl_group ph1_ld4_groups[] = { + UNIPHIER_PINCTRL_GROUP(emmc), + UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart1b), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb2b), +}; + +static const char * const ph1_ld4_functions[] = { + "emmc", + "i2c0", + "i2c1", + "i2c2", + "i2c3", + "nand", + "sd", + "uart0", + "uart1", + "uart2", + "uart3", + "usb0", + "usb1", + "usb2", +}; + +static struct uniphier_pinctrl_socdata ph1_ld4_pinctrl_socdata = { + .pins = ph1_ld4_pins, + .pins_count = ARRAY_SIZE(ph1_ld4_pins), + .groups = ph1_ld4_groups, + .groups_count = ARRAY_SIZE(ph1_ld4_groups), + .functions = ph1_ld4_functions, + .functions_count = ARRAY_SIZE(ph1_ld4_functions), + .mux_bits = 8, + .reg_stride = 4, + .load_pinctrl = false, +}; + +static int ph1_ld4_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &ph1_ld4_pinctrl_socdata); +} + +static const struct udevice_id ph1_ld4_pinctrl_match[] = { + { .compatible = "socionext,ph1-ld4-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(ph1_ld4_pinctrl) = { + .name = "ph1-ld4-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(ph1_ld4_pinctrl_match), + .probe = ph1_ld4_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +}; From a343812461d40dfe72622176c6581a9e2f673ea2 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:34 +0900 Subject: [PATCH 03/33] pinctrl: uniphier: add UniPhier PH1-Pro4 pinctrl driver Add pin configuration and pinmux support for UniPhier PH1-Pro4 SoC. Signed-off-by: Masahiro Yamada --- drivers/pinctrl/uniphier/Kconfig | 6 + drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c | 130 ++++++++++++++++++++ 3 files changed, 137 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 03593cdd8b3..c417a9f4ea3 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -9,4 +9,10 @@ config PINCTRL_UNIPHIER_PH1_LD4 default y select PINCTRL_UNIPHIER_CORE +config PINCTRL_UNIPHIER_PH1_PRO4 + bool "UniPhier PH1-Pro4 SoC pinctrl driver" + depends on MACH_PH1_PRO4 + default y + select PINCTRL_UNIPHIER_CORE + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index b4bd042ac4f..b1b597e0dcc 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_CORE) += pinctrl-uniphier-core.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c b/drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c new file mode 100644 index 00000000000..b3eaf138f76 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c @@ -0,0 +1,130 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#include "pinctrl-uniphier.h" + +static const struct uniphier_pinctrl_pin ph1_pro4_pins[] = { +}; + +static const unsigned emmc_pins[] = {40, 41, 42, 43, 51, 52, 53}; +static const unsigned emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; +static const unsigned emmc_dat8_pins[] = {44, 45, 46, 47}; +static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const unsigned i2c0_pins[] = {142, 143}; +static const unsigned i2c0_muxvals[] = {0, 0}; +static const unsigned i2c1_pins[] = {144, 145}; +static const unsigned i2c1_muxvals[] = {0, 0}; +static const unsigned i2c2_pins[] = {146, 147}; +static const unsigned i2c2_muxvals[] = {0, 0}; +static const unsigned i2c3_pins[] = {148, 149}; +static const unsigned i2c3_muxvals[] = {0, 0}; +static const unsigned i2c6_pins[] = {308, 309}; +static const unsigned i2c6_muxvals[] = {6, 6}; +static const unsigned nand_pins[] = {40, 41, 42, 43, 44, 45, 46, 47, 48, 49, + 50, 51, 52, 53, 54}; +static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0}; +static const unsigned nand_cs1_pins[] = {131, 132}; +static const unsigned nand_cs1_muxvals[] = {1, 1}; +static const unsigned sd_pins[] = {150, 151, 152, 153, 154, 155, 156, 157, 158}; +static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned sd1_pins[] = {319, 320, 321, 322, 323, 324, 325, 326, + 327}; +static const unsigned sd1_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned uart0_pins[] = {127, 128}; +static const unsigned uart0_muxvals[] = {0, 0}; +static const unsigned uart1_pins[] = {129, 130}; +static const unsigned uart1_muxvals[] = {0, 0}; +static const unsigned uart2_pins[] = {131, 132}; +static const unsigned uart2_muxvals[] = {0, 0}; +static const unsigned uart3_pins[] = {88, 89}; +static const unsigned uart3_muxvals[] = {2, 2}; +static const unsigned usb0_pins[] = {180, 181}; +static const unsigned usb0_muxvals[] = {0, 0}; +static const unsigned usb1_pins[] = {182, 183}; +static const unsigned usb1_muxvals[] = {0, 0}; +static const unsigned usb2_pins[] = {184, 185}; +static const unsigned usb2_muxvals[] = {0, 0}; +static const unsigned usb3_pins[] = {186, 187}; +static const unsigned usb3_muxvals[] = {0, 0}; + +static const struct uniphier_pinctrl_group ph1_pro4_groups[] = { + UNIPHIER_PINCTRL_GROUP(emmc), + UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(i2c6), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(sd1), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3), +}; + +static const char * const ph1_pro4_functions[] = { + "emmc", + "i2c0", + "i2c1", + "i2c2", + "i2c3", + "i2c6", + "nand", + "sd", + "sd1", + "uart0", + "uart1", + "uart2", + "uart3", + "usb0", + "usb1", + "usb2", + "usb3", +}; + +static struct uniphier_pinctrl_socdata ph1_pro4_pinctrl_socdata = { + .pins = ph1_pro4_pins, + .pins_count = ARRAY_SIZE(ph1_pro4_pins), + .groups = ph1_pro4_groups, + .groups_count = ARRAY_SIZE(ph1_pro4_groups), + .functions = ph1_pro4_functions, + .functions_count = ARRAY_SIZE(ph1_pro4_functions), + .mux_bits = 4, + .reg_stride = 8, + .load_pinctrl = true, +}; + +static int ph1_pro4_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &ph1_pro4_pinctrl_socdata); +} + +static const struct udevice_id ph1_pro4_pinctrl_match[] = { + { .compatible = "socionext,ph1-pro4-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(ph1_pro4_pinctrl) = { + .name = "ph1-pro4-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(ph1_pro4_pinctrl_match), + .probe = ph1_pro4_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, + .flags = DM_FLAG_PRE_RELOC, +}; From 06b2ae5890fad1531965ae8ad844336e67fc9bb0 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:35 +0900 Subject: [PATCH 04/33] pinctrl: uniphier: add UniPhier PH1-sLD8 pinctrl driver Add pin configuration and pinmux support for UniPhier PH1-sLD8 SoC. Signed-off-by: Masahiro Yamada --- drivers/pinctrl/uniphier/Kconfig | 6 + drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c | 141 ++++++++++++++++++++ 3 files changed, 148 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index c417a9f4ea3..a156a28c288 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -15,4 +15,10 @@ config PINCTRL_UNIPHIER_PH1_PRO4 default y select PINCTRL_UNIPHIER_CORE +config PINCTRL_UNIPHIER_PH1_SLD8 + bool "UniPhier PH1-sLD8 SoC pinctrl driver" + depends on MACH_PH1_SLD8 + default y + select PINCTRL_UNIPHIER_CORE + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index b1b597e0dcc..3349fff80aa 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_CORE) += pinctrl-uniphier-core.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c b/drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c new file mode 100644 index 00000000000..5fafdb61001 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c @@ -0,0 +1,141 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#include "pinctrl-uniphier.h" + +static const struct uniphier_pinctrl_pin ph1_sld8_pins[] = { + UNIPHIER_PINCTRL_PIN(32, 8), + UNIPHIER_PINCTRL_PIN(33, 8), + UNIPHIER_PINCTRL_PIN(34, 8), + UNIPHIER_PINCTRL_PIN(35, 8), + UNIPHIER_PINCTRL_PIN(36, 8), + UNIPHIER_PINCTRL_PIN(37, 8), + UNIPHIER_PINCTRL_PIN(38, 8), + UNIPHIER_PINCTRL_PIN(39, 8), + UNIPHIER_PINCTRL_PIN(40, 9), + UNIPHIER_PINCTRL_PIN(41, 0), + UNIPHIER_PINCTRL_PIN(42, 0), + UNIPHIER_PINCTRL_PIN(43, 0), + UNIPHIER_PINCTRL_PIN(44, 0), + UNIPHIER_PINCTRL_PIN(70, 0), + UNIPHIER_PINCTRL_PIN(71, 0), + UNIPHIER_PINCTRL_PIN(102, 10), + UNIPHIER_PINCTRL_PIN(103, 10), + UNIPHIER_PINCTRL_PIN(104, 11), + UNIPHIER_PINCTRL_PIN(105, 11), + UNIPHIER_PINCTRL_PIN(108, 13), + UNIPHIER_PINCTRL_PIN(109, 13), + UNIPHIER_PINCTRL_PIN(112, 0), + UNIPHIER_PINCTRL_PIN(113, 0), + UNIPHIER_PINCTRL_PIN(114, 0), + UNIPHIER_PINCTRL_PIN(115, 0), +}; + +static const unsigned emmc_pins[] = {21, 22, 23, 24, 25, 26, 27}; +static const unsigned emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; +static const unsigned emmc_dat8_pins[] = {28, 29, 30, 31}; +static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const unsigned i2c0_pins[] = {102, 103}; +static const unsigned i2c0_muxvals[] = {0, 0}; +static const unsigned i2c1_pins[] = {104, 105}; +static const unsigned i2c1_muxvals[] = {0, 0}; +static const unsigned i2c2_pins[] = {108, 109}; +static const unsigned i2c2_muxvals[] = {2, 2}; +static const unsigned i2c3_pins[] = {108, 109}; +static const unsigned i2c3_muxvals[] = {3, 3}; +static const unsigned nand_pins[] = {15, 16, 17, 18, 19, 20, 21, 24, 25, 26, + 27, 28, 29, 30, 31}; +static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0}; +static const unsigned nand_cs1_pins[] = {22, 23}; +static const unsigned nand_cs1_muxvals[] = {0, 0}; +static const unsigned sd_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40}; +static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned uart0_pins[] = {70, 71}; +static const unsigned uart0_muxvals[] = {3, 3}; +static const unsigned uart1_pins[] = {114, 115}; +static const unsigned uart1_muxvals[] = {0, 0}; +static const unsigned uart2_pins[] = {112, 113}; +static const unsigned uart2_muxvals[] = {1, 1}; +static const unsigned uart3_pins[] = {110, 111}; +static const unsigned uart3_muxvals[] = {1, 1}; +static const unsigned usb0_pins[] = {41, 42}; +static const unsigned usb0_muxvals[] = {0, 0}; +static const unsigned usb1_pins[] = {43, 44}; +static const unsigned usb1_muxvals[] = {0, 0}; +static const unsigned usb2_pins[] = {114, 115}; +static const unsigned usb2_muxvals[] = {1, 1}; + +static const struct uniphier_pinctrl_group ph1_sld8_groups[] = { + UNIPHIER_PINCTRL_GROUP(emmc), + UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), +}; + +static const char * const ph1_sld8_functions[] = { + "emmc", + "i2c0", + "i2c1", + "i2c2", + "i2c3", + "nand", + "sd", + "uart0", + "uart1", + "uart2", + "uart3", + "usb0", + "usb1", + "usb2", +}; + +static struct uniphier_pinctrl_socdata ph1_sld8_pinctrl_socdata = { + .pins = ph1_sld8_pins, + .pins_count = ARRAY_SIZE(ph1_sld8_pins), + .groups = ph1_sld8_groups, + .groups_count = ARRAY_SIZE(ph1_sld8_groups), + .functions = ph1_sld8_functions, + .functions_count = ARRAY_SIZE(ph1_sld8_functions), + .mux_bits = 8, + .reg_stride = 4, + .load_pinctrl = false, +}; + +static int ph1_sld8_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &ph1_sld8_pinctrl_socdata); +} + +static const struct udevice_id ph1_sld8_pinctrl_match[] = { + { .compatible = "socionext,ph1-sld8-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(ph1_sld8_pinctrl) = { + .name = "ph1-sld8-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(ph1_sld8_pinctrl_match), + .probe = ph1_sld8_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +}; From b82ca82ed23759150f2e00e5299ce1583ba97dd6 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:36 +0900 Subject: [PATCH 05/33] pinctrl: uniphier: add UniPhier PH1-Pro5 pinctrl driver Add pin configuration and pinmux support for UniPhier PH1-Pro5 SoC. Signed-off-by: Masahiro Yamada --- drivers/pinctrl/uniphier/Kconfig | 6 + drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c | 144 ++++++++++++++++++++ 3 files changed, 151 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index a156a28c288..9d3065db300 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -21,4 +21,10 @@ config PINCTRL_UNIPHIER_PH1_SLD8 default y select PINCTRL_UNIPHIER_CORE +config PINCTRL_UNIPHIER_PH1_PRO5 + bool "UniPhier PH1-Pro5 SoC pinctrl driver" + depends on MACH_PH1_PRO5 + default y + select PINCTRL_UNIPHIER_CORE + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index 3349fff80aa..b0cd3e86bc9 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -3,3 +3,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_CORE) += pinctrl-uniphier-core.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO5) += pinctrl-ph1-pro5.o diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c b/drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c new file mode 100644 index 00000000000..37492500669 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c @@ -0,0 +1,144 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#include "pinctrl-uniphier.h" + +static const struct uniphier_pinctrl_pin ph1_pro5_pins[] = { + UNIPHIER_PINCTRL_PIN(47, 0), + UNIPHIER_PINCTRL_PIN(48, 0), + UNIPHIER_PINCTRL_PIN(49, 0), + UNIPHIER_PINCTRL_PIN(50, 0), + UNIPHIER_PINCTRL_PIN(53, 0), + UNIPHIER_PINCTRL_PIN(54, 0), + UNIPHIER_PINCTRL_PIN(87, 0), + UNIPHIER_PINCTRL_PIN(88, 0), + UNIPHIER_PINCTRL_PIN(101, 0), + UNIPHIER_PINCTRL_PIN(102, 0), +}; + +static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42}; +static const unsigned emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0}; +static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46}; +static const unsigned emmc_dat8_muxvals[] = {0, 0, 0, 0}; +static const unsigned i2c0_pins[] = {112, 113}; +static const unsigned i2c0_muxvals[] = {0, 0}; +static const unsigned i2c1_pins[] = {114, 115}; +static const unsigned i2c1_muxvals[] = {0, 0}; +static const unsigned i2c2_pins[] = {116, 117}; +static const unsigned i2c2_muxvals[] = {0, 0}; +static const unsigned i2c3_pins[] = {118, 119}; +static const unsigned i2c3_muxvals[] = {0, 0}; +static const unsigned i2c5_pins[] = {87, 88}; +static const unsigned i2c5_muxvals[] = {2, 2}; +static const unsigned i2c5b_pins[] = {196, 197}; +static const unsigned i2c5b_muxvals[] = {2, 2}; +static const unsigned i2c5c_pins[] = {215, 216}; +static const unsigned i2c5c_muxvals[] = {2, 2}; +static const unsigned i2c6_pins[] = {101, 102}; +static const unsigned i2c6_muxvals[] = {2, 2}; +static const unsigned nand_pins[] = {19, 20, 21, 22, 23, 24, 25, 28, 29, 30, + 31, 32, 33, 34, 35}; +static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0}; +static const unsigned nand_cs1_pins[] = {26, 27}; +static const unsigned nand_cs1_muxvals[] = {0, 0}; +static const unsigned sd_pins[] = {250, 251, 252, 253, 254, 255, 256, 257, 258}; +static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned uart0_pins[] = {47, 48}; +static const unsigned uart0_muxvals[] = {0, 0}; +static const unsigned uart0b_pins[] = {227, 228}; +static const unsigned uart0b_muxvals[] = {3, 3}; +static const unsigned uart1_pins[] = {49, 50}; +static const unsigned uart1_muxvals[] = {0, 0}; +static const unsigned uart2_pins[] = {51, 52}; +static const unsigned uart2_muxvals[] = {0, 0}; +static const unsigned uart3_pins[] = {53, 54}; +static const unsigned uart3_muxvals[] = {0, 0}; +static const unsigned usb0_pins[] = {124, 125}; +static const unsigned usb0_muxvals[] = {0, 0}; +static const unsigned usb1_pins[] = {126, 127}; +static const unsigned usb1_muxvals[] = {0, 0}; +static const unsigned usb2_pins[] = {128, 129}; +static const unsigned usb2_muxvals[] = {0, 0}; + +static const struct uniphier_pinctrl_group ph1_pro5_groups[] = { + UNIPHIER_PINCTRL_GROUP(emmc), + UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(i2c5), + UNIPHIER_PINCTRL_GROUP(i2c5b), + UNIPHIER_PINCTRL_GROUP(i2c5c), + UNIPHIER_PINCTRL_GROUP(i2c6), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart0b), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), +}; + +static const char * const ph1_pro5_functions[] = { + "emmc", + "i2c0", + "i2c1", + "i2c2", + "i2c3", + "i2c5", + "i2c6", + "nand", + "sd", + "uart0", + "uart1", + "uart2", + "uart3", + "usb0", + "usb1", + "usb2", +}; + +static struct uniphier_pinctrl_socdata ph1_pro5_pinctrl_socdata = { + .pins = ph1_pro5_pins, + .pins_count = ARRAY_SIZE(ph1_pro5_pins), + .groups = ph1_pro5_groups, + .groups_count = ARRAY_SIZE(ph1_pro5_groups), + .functions = ph1_pro5_functions, + .functions_count = ARRAY_SIZE(ph1_pro5_functions), + .mux_bits = 4, + .reg_stride = 8, + .load_pinctrl = true, +}; + +static int ph1_pro5_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &ph1_pro5_pinctrl_socdata); +} + +static const struct udevice_id ph1_pro5_pinctrl_match[] = { + { .compatible = "socionext,ph1-pro5-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(ph1_pro5_pinctrl) = { + .name = "ph1-pro5-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(ph1_pro5_pinctrl_match), + .probe = ph1_pro5_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, + .flags = DM_FLAG_PRE_RELOC, +}; From 833de5fafb43df835f5a9d2a8b77c0ffbbde9cb0 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:37 +0900 Subject: [PATCH 06/33] pinctrl: uniphier: add UniPhier ProXstream2 pinctrl driver Add pin configuration and pinmux support for UniPhier ProXstream2 SoC. Signed-off-by: Masahiro Yamada --- drivers/pinctrl/uniphier/Kconfig | 6 + drivers/pinctrl/uniphier/Makefile | 1 + .../pinctrl/uniphier/pinctrl-proxstream2.c | 140 ++++++++++++++++++ 3 files changed, 147 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-proxstream2.c diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 9d3065db300..7f729b68a12 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -27,4 +27,10 @@ config PINCTRL_UNIPHIER_PH1_PRO5 default y select PINCTRL_UNIPHIER_CORE +config PINCTRL_UNIPHIER_PROXSTREAM2 + bool "UniPhier ProXstream2 SoC pinctrl driver" + depends on MACH_PROXSTREAM2 + default y + select PINCTRL_UNIPHIER_CORE + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index b0cd3e86bc9..aed038c59f0 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO5) += pinctrl-ph1-pro5.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PROXSTREAM2) += pinctrl-proxstream2.o diff --git a/drivers/pinctrl/uniphier/pinctrl-proxstream2.c b/drivers/pinctrl/uniphier/pinctrl-proxstream2.c new file mode 100644 index 00000000000..2cca69d5148 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-proxstream2.c @@ -0,0 +1,140 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#include "pinctrl-uniphier.h" + +static const struct uniphier_pinctrl_pin proxstream2_pins[] = { + UNIPHIER_PINCTRL_PIN(113, 0), + UNIPHIER_PINCTRL_PIN(114, 0), + UNIPHIER_PINCTRL_PIN(115, 0), + UNIPHIER_PINCTRL_PIN(116, 0), +}; + +static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42}; +static const unsigned emmc_muxvals[] = {9, 9, 9, 9, 9, 9, 9}; +static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46}; +static const unsigned emmc_dat8_muxvals[] = {9, 9, 9, 9}; +static const unsigned i2c0_pins[] = {109, 110}; +static const unsigned i2c0_muxvals[] = {8, 8}; +static const unsigned i2c1_pins[] = {111, 112}; +static const unsigned i2c1_muxvals[] = {8, 8}; +static const unsigned i2c2_pins[] = {171, 172}; +static const unsigned i2c2_muxvals[] = {8, 8}; +static const unsigned i2c3_pins[] = {159, 160}; +static const unsigned i2c3_muxvals[] = {8, 8}; +static const unsigned i2c5_pins[] = {183, 184}; +static const unsigned i2c5_muxvals[] = {11, 11}; +static const unsigned i2c6_pins[] = {185, 186}; +static const unsigned i2c6_muxvals[] = {11, 11}; +static const unsigned nand_pins[] = {30, 31, 32, 33, 34, 35, 36, 39, 40, 41, + 42, 43, 44, 45, 46}; +static const unsigned nand_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, + 8, 8}; +static const unsigned nand_cs1_pins[] = {37, 38}; +static const unsigned nand_cs1_muxvals[] = {8, 8}; +static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55}; +static const unsigned sd_muxvals[] = {8, 8, 8, 8, 8, 8, 8, 8, 8}; +static const unsigned uart0_pins[] = {217, 218}; +static const unsigned uart0_muxvals[] = {8, 8}; +static const unsigned uart0b_pins[] = {179, 180}; +static const unsigned uart0b_muxvals[] = {10, 10}; +static const unsigned uart1_pins[] = {115, 116}; +static const unsigned uart1_muxvals[] = {8, 8}; +static const unsigned uart2_pins[] = {113, 114}; +static const unsigned uart2_muxvals[] = {8, 8}; +static const unsigned uart3_pins[] = {219, 220}; +static const unsigned uart3_muxvals[] = {8, 8}; +static const unsigned uart3b_pins[] = {181, 182}; +static const unsigned uart3b_muxvals[] = {10, 10}; +static const unsigned usb0_pins[] = {56, 57}; +static const unsigned usb0_muxvals[] = {8, 8}; +static const unsigned usb1_pins[] = {58, 59}; +static const unsigned usb1_muxvals[] = {8, 8}; +static const unsigned usb2_pins[] = {60, 61}; +static const unsigned usb2_muxvals[] = {8, 8}; +static const unsigned usb3_pins[] = {62, 63}; +static const unsigned usb3_muxvals[] = {8, 8}; + +static const struct uniphier_pinctrl_group proxstream2_groups[] = { + UNIPHIER_PINCTRL_GROUP(emmc), + UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(i2c5), + UNIPHIER_PINCTRL_GROUP(i2c6), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart0b), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart3), + UNIPHIER_PINCTRL_GROUP(uart3b), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3), +}; + +static const char * const proxstream2_functions[] = { + "emmc", + "i2c0", + "i2c1", + "i2c2", + "i2c3", + "i2c5", + "i2c6", + "nand", + "sd", + "uart0", + "uart0b", + "uart1", + "uart2", + "uart3", + "uart3b", + "usb0", + "usb1", + "usb2", + "usb3", +}; + +static struct uniphier_pinctrl_socdata proxstream2_pinctrl_socdata = { + .pins = proxstream2_pins, + .pins_count = ARRAY_SIZE(proxstream2_pins), + .groups = proxstream2_groups, + .groups_count = ARRAY_SIZE(proxstream2_groups), + .functions = proxstream2_functions, + .functions_count = ARRAY_SIZE(proxstream2_functions), + .mux_bits = 8, + .reg_stride = 4, + .load_pinctrl = false, +}; + +static int proxstream2_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &proxstream2_pinctrl_socdata); +} + +static const struct udevice_id proxstream2_pinctrl_match[] = { + { .compatible = "socionext,proxstream2-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(proxstream2_pinctrl) = { + .name = "proxstream2-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(proxstream2_pinctrl_match), + .probe = proxstream2_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +}; From 080b7a5b4522d4a8fcda4a4e0c34b757ac99bdae Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:38 +0900 Subject: [PATCH 07/33] pinctrl: uniphier: add UniPhier PH1-LD6b pinctrl driver Add pin configuration and pinmux support for UniPhier PH1-LD6b SoC. Signed-off-by: Masahiro Yamada --- drivers/pinctrl/uniphier/Kconfig | 6 + drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c | 133 ++++++++++++++++++++ 3 files changed, 140 insertions(+) create mode 100644 drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 7f729b68a12..757edce178f 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -33,4 +33,10 @@ config PINCTRL_UNIPHIER_PROXSTREAM2 default y select PINCTRL_UNIPHIER_CORE +config PINCTRL_UNIPHIER_PH1_LD6B + bool "UniPhier PH1-LD6b SoC pinctrl driver" + depends on MACH_PH1_LD6B + default y + select PINCTRL_UNIPHIER_CORE + endif diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index aed038c59f0..e215b109729 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO5) += pinctrl-ph1-pro5.o obj-$(CONFIG_PINCTRL_UNIPHIER_PROXSTREAM2) += pinctrl-proxstream2.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD6B) += pinctrl-ph1-ld6b.o diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c new file mode 100644 index 00000000000..8703a215e48 --- /dev/null +++ b/drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c @@ -0,0 +1,133 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#include "pinctrl-uniphier.h" + +static const struct uniphier_pinctrl_pin ph1_ld6b_pins[] = { + UNIPHIER_PINCTRL_PIN(113, 0), + UNIPHIER_PINCTRL_PIN(114, 0), + UNIPHIER_PINCTRL_PIN(115, 0), + UNIPHIER_PINCTRL_PIN(116, 0), + UNIPHIER_PINCTRL_PIN(217, 0), + UNIPHIER_PINCTRL_PIN(218, 0), + UNIPHIER_PINCTRL_PIN(219, 0), + UNIPHIER_PINCTRL_PIN(220, 0), +}; + +static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42}; +static const unsigned emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1}; +static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46}; +static const unsigned emmc_dat8_muxvals[] = {1, 1, 1, 1}; +static const unsigned i2c0_pins[] = {109, 110}; +static const unsigned i2c0_muxvals[] = {0, 0}; +static const unsigned i2c1_pins[] = {111, 112}; +static const unsigned i2c1_muxvals[] = {0, 0}; +static const unsigned i2c2_pins[] = {115, 116}; +static const unsigned i2c2_muxvals[] = {1, 1}; +static const unsigned i2c3_pins[] = {118, 119}; +static const unsigned i2c3_muxvals[] = {1, 1}; +static const unsigned nand_pins[] = {30, 31, 32, 33, 34, 35, 36, 39, 40, 41, + 42, 43, 44, 45, 46}; +static const unsigned nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0}; +static const unsigned nand_cs1_pins[] = {37, 38}; +static const unsigned nand_cs1_muxvals[] = {0, 0}; +static const unsigned sd_pins[] = {47, 48, 49, 50, 51, 52, 53, 54, 55}; +static const unsigned sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; +static const unsigned uart0_pins[] = {135, 136}; +static const unsigned uart0_muxvals[] = {3, 3}; +static const unsigned uart0b_pins[] = {11, 12}; +static const unsigned uart0b_muxvals[] = {2, 2}; +static const unsigned uart1_pins[] = {115, 116}; +static const unsigned uart1_muxvals[] = {0, 0}; +static const unsigned uart1b_pins[] = {113, 114}; +static const unsigned uart1b_muxvals[] = {1, 1}; +static const unsigned uart2_pins[] = {113, 114}; +static const unsigned uart2_muxvals[] = {2, 2}; +static const unsigned uart2b_pins[] = {86, 87}; +static const unsigned uart2b_muxvals[] = {1, 1}; +static const unsigned usb0_pins[] = {56, 57}; +static const unsigned usb0_muxvals[] = {0, 0}; +static const unsigned usb1_pins[] = {58, 59}; +static const unsigned usb1_muxvals[] = {0, 0}; +static const unsigned usb2_pins[] = {60, 61}; +static const unsigned usb2_muxvals[] = {0, 0}; +static const unsigned usb3_pins[] = {62, 63}; +static const unsigned usb3_muxvals[] = {0, 0}; + +static const struct uniphier_pinctrl_group ph1_ld6b_groups[] = { + UNIPHIER_PINCTRL_GROUP(emmc), + UNIPHIER_PINCTRL_GROUP(emmc_dat8), + UNIPHIER_PINCTRL_GROUP(i2c0), + UNIPHIER_PINCTRL_GROUP(i2c1), + UNIPHIER_PINCTRL_GROUP(i2c2), + UNIPHIER_PINCTRL_GROUP(i2c3), + UNIPHIER_PINCTRL_GROUP(nand), + UNIPHIER_PINCTRL_GROUP(nand_cs1), + UNIPHIER_PINCTRL_GROUP(sd), + UNIPHIER_PINCTRL_GROUP(uart0), + UNIPHIER_PINCTRL_GROUP(uart0b), + UNIPHIER_PINCTRL_GROUP(uart1), + UNIPHIER_PINCTRL_GROUP(uart1b), + UNIPHIER_PINCTRL_GROUP(uart2), + UNIPHIER_PINCTRL_GROUP(uart2b), + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3), +}; + +static const char * const ph1_ld6b_functions[] = { + "emmc", + "i2c0", + "i2c1", + "i2c2", + "i2c3", + "nand", + "sd", + "uart0", + "uart1", + "uart2", + "usb0", + "usb1", + "usb2", + "usb3", +}; + +static struct uniphier_pinctrl_socdata ph1_ld6b_pinctrl_socdata = { + .pins = ph1_ld6b_pins, + .pins_count = ARRAY_SIZE(ph1_ld6b_pins), + .groups = ph1_ld6b_groups, + .groups_count = ARRAY_SIZE(ph1_ld6b_groups), + .functions = ph1_ld6b_functions, + .functions_count = ARRAY_SIZE(ph1_ld6b_functions), + .mux_bits = 8, + .reg_stride = 4, + .load_pinctrl = false, +}; + +static int ph1_ld6b_pinctrl_probe(struct udevice *dev) +{ + return uniphier_pinctrl_probe(dev, &ph1_ld6b_pinctrl_socdata); +} + +static const struct udevice_id ph1_ld6b_pinctrl_match[] = { + { .compatible = "socionext,ph1-ld6b-pinctrl" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(ph1_ld6b_pinctrl) = { + .name = "ph1-ld6b-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(ph1_ld6b_pinctrl_match), + .probe = ph1_ld6b_pinctrl_probe, + .remove = uniphier_pinctrl_remove, + .priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), + .ops = &uniphier_pinctrl_ops, +}; From be262b62f0f919f2b04ae217764daed10608a0fa Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:39 +0900 Subject: [PATCH 08/33] ARM: uniphier: enable simple-bus driver for SPL In UniPhier device trees, pinctrl device nodes are located under the simple-bus (AMBA). This is needed to bind pinctrl devices in SPL. Signed-off-by: Masahiro Yamada --- configs/ph1_ld4_defconfig | 1 + configs/ph1_pro4_defconfig | 1 + configs/ph1_sld8_defconfig | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 56c215fe375..74e759a578b 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -17,6 +17,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_TIME=y # CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_SIMPLE_BUS=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 7624c547f68..714339acf30 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -16,6 +16,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_TIME=y # CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_SIMPLE_BUS=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 1a35a77f67f..df0e0051acd 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -17,6 +17,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_TIME=y # CONFIG_CMD_MISC is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_SIMPLE_BUS=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 From 76c52ce29fd75ca8802383ef1aed6c8f13461e37 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:40 +0900 Subject: [PATCH 09/33] ARM: uniphier: increase CONFIG_SYS_MALLOC_F_LEN to bind all nodes In the next commit, I will add "u-boot,dm-pre-reloc" to the "soc" (simple-bus) nodes in UniPhier device trees. But, before that, CONFIG_SYS_MALLOC_F_LEN must be increased. Adding "u-boot,dm-pre-reloc" to a simple-bus node causes it to bind all of its child nodes. (See simple_bus_post_bind() function) Actually, I want only UART0 and pinctrl to be bound in SPL and before relocation in U-boot proper. But, with "u-boot,dm-pre-reloc" in the simple-bus node, all the other unwanted nodes are also bound. The default value for CONFIG_SYS_MALLOC_F_LEN, 0x400, is not enough for that. Increase the pre-reloc malloc size to 0x2000, hoping the root cause will be fixed later. Signed-off-by: Masahiro Yamada --- configs/ph1_ld4_defconfig | 1 + configs/ph1_pro4_defconfig | 1 + configs/ph1_sld8_defconfig | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 74e759a578b..61eb037bc2f 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_MACH_PH1_LD4=y CONFIG_PFC_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 714339acf30..7582fdf91bc 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_PFC_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref" diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index df0e0051acd..236e6739a47 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_MACH_PH1_SLD8=y CONFIG_PFC_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 From b25c4ab5be39767e594629030a73824c97aa8156 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:41 +0900 Subject: [PATCH 10/33] ARM: dts: uniphier: prepare device trees to use pinctrl in SPL Add "u-boot,dm-pre-reloc" for device nodes we want in SPL DTB (spl/u-boot-spl.dtb). The "soc" node (this is simple-bus node) also needs the property to bind the pinctrl node located under it. I am collecting this U-Boot specific hack to the bottom of board DTS rather than inserting "u-boot,dm-pre-reloc" into SoC DTSI. My goal is to sync DTSI with Linux for easier maintenance. Signed-off-by: Masahiro Yamada Reviewed-by: Simon Glass --- arch/arm/dts/uniphier-ph1-ld4-ref.dts | 18 ++++++++++++++++-- arch/arm/dts/uniphier-ph1-ld6b-ref.dts | 18 ++++++++++++++++-- arch/arm/dts/uniphier-ph1-pro4-ref.dts | 18 ++++++++++++++++-- arch/arm/dts/uniphier-ph1-sld8-ref.dts | 18 ++++++++++++++++-- 4 files changed, 64 insertions(+), 8 deletions(-) diff --git a/arch/arm/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/dts/uniphier-ph1-ld4-ref.dts index 20f2e9a7d2a..9d697c1c88b 100644 --- a/arch/arm/dts/uniphier-ph1-ld4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld4-ref.dts @@ -61,6 +61,20 @@ }; /* for U-boot only */ -&serial0 { - u-boot,dm-pre-reloc; +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&serial0 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts index 58dc20e6022..ca68930527f 100644 --- a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts @@ -54,6 +54,20 @@ }; /* for U-boot only */ -&serial0 { - u-boot,dm-pre-reloc; +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&serial0 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/dts/uniphier-ph1-pro4-ref.dts index ec1117d4a24..a8250696384 100644 --- a/arch/arm/dts/uniphier-ph1-pro4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-pro4-ref.dts @@ -68,6 +68,20 @@ }; /* for U-boot only */ -&serial0 { - u-boot,dm-pre-reloc; +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&serial0 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/dts/uniphier-ph1-sld8-ref.dts index 6269f9afd32..2cfcaff54af 100644 --- a/arch/arm/dts/uniphier-ph1-sld8-ref.dts +++ b/arch/arm/dts/uniphier-ph1-sld8-ref.dts @@ -65,6 +65,20 @@ }; /* for U-boot only */ -&serial0 { - u-boot,dm-pre-reloc; +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&serial0 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; }; From 759ba3a87444b9a159b0c0f71ec47bc1415f5bde Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:42 +0900 Subject: [PATCH 11/33] ARM: uniphier: enable PINCTRL and SPL_PINCTRL Now, UniPhier SoCs are ready to enable pinctrl drivers. Signed-off-by: Masahiro Yamada --- configs/ph1_ld4_defconfig | 2 ++ configs/ph1_pro4_defconfig | 2 ++ configs/ph1_sld8_defconfig | 2 ++ 3 files changed, 6 insertions(+) diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 61eb037bc2f..13b124b661e 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -24,6 +24,8 @@ CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_SPL_NAND_DENALI=y CONFIG_UNIPHIER_SERIAL=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 7582fdf91bc..0982d9141a3 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -23,6 +23,8 @@ CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_SPL_NAND_DENALI=y CONFIG_UNIPHIER_SERIAL=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 236e6739a47..584c41ab9f6 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -24,6 +24,8 @@ CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_SPL_NAND_DENALI=y CONFIG_UNIPHIER_SERIAL=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y From 11f3afeaa5a03e624e630c6b2187efb998d49972 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:43 +0900 Subject: [PATCH 12/33] ARM: uniphier: drop ad-hoc early pin-muxing settings As the UniPhier serial driver had already switched to Drive Model and the pinctrl drivers are now enabled, these pin-muxing settings are properly handled by the pinctrl drivers. Signed-off-by: Masahiro Yamada Reviewed-by: Simon Glass --- arch/arm/mach-uniphier/ph1-ld4/Makefile | 2 +- .../arm/mach-uniphier/ph1-ld4/early_pinctrl.c | 27 ------------------- arch/arm/mach-uniphier/ph1-pro4/Makefile | 2 +- .../mach-uniphier/ph1-pro4/early_pinctrl.c | 26 ------------------ .../mach-uniphier/ph1-sld8/early_pinctrl.c | 27 ------------------- arch/arm/mach-uniphier/spl.c | 5 ++++ 6 files changed, 7 insertions(+), 82 deletions(-) delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c delete mode 100644 arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c diff --git a/arch/arm/mach-uniphier/ph1-ld4/Makefile b/arch/arm/mach-uniphier/ph1-ld4/Makefile index 1410b12cb6f..789820e0678 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/Makefile +++ b/arch/arm/mach-uniphier/ph1-ld4/Makefile @@ -5,7 +5,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += bcu_init.o sg_init.o pll_init.o early_clkrst_init.o \ - early_pinctrl.o pll_spectrum.o umc_init.o ddrphy_init.o + pll_spectrum.o umc_init.o ddrphy_init.o obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o else diff --git a/arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c deleted file mode 100644 index e5e86bb3634..00000000000 --- a/arch/arm/mach-uniphier/ph1-ld4/early_pinctrl.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Copyright (C) 2011-2015 Panasonic Corporation - * Copyright (C) 2015 Socionext Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include - -void early_pin_init(void) -{ - /* Comment format: PAD Name -> Function Name */ - -#ifdef CONFIG_UNIPHIER_SERIAL - sg_set_pinsel(85, 1); /* HSDOUT3 -> RXD0 */ - sg_set_pinsel(88, 1); /* HDDOUT6 -> TXD0 */ - - sg_set_pinsel(69, 23); /* PCIOWR -> TXD1 */ - sg_set_pinsel(70, 23); /* PCIORD -> RXD1 */ - - sg_set_pinsel(128, 13); /* XIRQ6 -> TXD2 */ - sg_set_pinsel(129, 13); /* XIRQ7 -> RXD2 */ - - sg_set_pinsel(110, 1); /* SBO0 -> TXD3 */ - sg_set_pinsel(111, 1); /* SBI0 -> RXD3 */ -#endif -} diff --git a/arch/arm/mach-uniphier/ph1-pro4/Makefile b/arch/arm/mach-uniphier/ph1-pro4/Makefile index 229f4432ffb..7fdb36a394e 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/Makefile +++ b/arch/arm/mach-uniphier/ph1-pro4/Makefile @@ -5,7 +5,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += sg_init.o pll_init.o early_clkrst_init.o \ - early_pinctrl.o pll_spectrum.o umc_init.o ddrphy_init.o + pll_spectrum.o umc_init.o ddrphy_init.o obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o else diff --git a/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c deleted file mode 100644 index e78d6ab501f..00000000000 --- a/arch/arm/mach-uniphier/ph1-pro4/early_pinctrl.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -void early_pin_init(void) -{ - /* Comment format: PAD Name -> Function Name */ - -#ifdef CONFIG_UNIPHIER_SERIAL - sg_set_pinsel(127, 0); /* RXD0 -> RXD0 */ - sg_set_pinsel(128, 0); /* TXD0 -> TXD0 */ - sg_set_pinsel(129, 0); /* RXD1 -> RXD1 */ - sg_set_pinsel(130, 0); /* TXD1 -> TXD1 */ - sg_set_pinsel(131, 0); /* RXD2 -> RXD2 */ - sg_set_pinsel(132, 0); /* TXD2 -> TXD2 */ - sg_set_pinsel(88, 2); /* CH6CLK -> RXD3 */ - sg_set_pinsel(89, 2); /* CH6VAL -> TXD3 */ -#endif - - writel(1, SG_LOADPINCTRL); -} diff --git a/arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c deleted file mode 100644 index 28cc4296fc0..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld8/early_pinctrl.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Copyright (C) 2011-2015 Panasonic Corporation - * Copyright (C) 2015 Socionext Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include - -void early_pin_init(void) -{ - /* Comment format: PAD Name -> Function Name */ - -#ifdef CONFIG_UNIPHIER_SERIAL - sg_set_pinsel(70, 3); /* HDDOUT0 -> TXD0 */ - sg_set_pinsel(71, 3); /* HSDOUT1 -> RXD0 */ - - sg_set_pinsel(114, 0); /* TXD1 -> TXD1 */ - sg_set_pinsel(115, 0); /* RXD1 -> RXD1 */ - - sg_set_pinsel(112, 1); /* SBO1 -> TXD2 */ - sg_set_pinsel(113, 1); /* SBI1 -> RXD2 */ - - sg_set_pinsel(110, 1); /* SBO0 -> TXD3 */ - sg_set_pinsel(111, 1); /* SBI0 -> RXD3 */ -#endif -} diff --git a/arch/arm/mach-uniphier/spl.c b/arch/arm/mach-uniphier/spl.c index a34d3a167cc..86764bcc73b 100644 --- a/arch/arm/mach-uniphier/spl.c +++ b/arch/arm/mach-uniphier/spl.c @@ -15,6 +15,11 @@ void __weak bcu_init(void) { }; + +void __weak early_pin_init(void) +{ +}; + void sbc_init(void); void sg_init(void); void pll_init(void); From 1386233da33235a68d9f4321e505bfa97370d949 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:44 +0900 Subject: [PATCH 13/33] ARM: uniphier: drop ad-hoc input enable settings These input enable settings are handled by the pinctrl drivers. Because the external bus pins are input-enabled by default, on-board devices such as LED still work fine even with this delayed input enabling. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/ph1-ld4/Makefile | 2 +- arch/arm/mach-uniphier/ph1-ld4/sg_init.c | 18 ------------------ arch/arm/mach-uniphier/ph1-pro4/Makefile | 2 +- arch/arm/mach-uniphier/ph1-pro4/sg_init.c | 18 ------------------ arch/arm/mach-uniphier/ph1-sld8/pinctrl.c | 9 --------- arch/arm/mach-uniphier/ph1-sld8/sg_init.c | 1 - arch/arm/mach-uniphier/spl.c | 8 +++++--- 7 files changed, 7 insertions(+), 51 deletions(-) delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/sg_init.c delete mode 100644 arch/arm/mach-uniphier/ph1-pro4/sg_init.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/sg_init.c diff --git a/arch/arm/mach-uniphier/ph1-ld4/Makefile b/arch/arm/mach-uniphier/ph1-ld4/Makefile index 789820e0678..0c198c65e77 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/Makefile +++ b/arch/arm/mach-uniphier/ph1-ld4/Makefile @@ -4,7 +4,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o -obj-y += bcu_init.o sg_init.o pll_init.o early_clkrst_init.o \ +obj-y += bcu_init.o pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o diff --git a/arch/arm/mach-uniphier/ph1-ld4/sg_init.c b/arch/arm/mach-uniphier/ph1-ld4/sg_init.c deleted file mode 100644 index dab56e949c1..00000000000 --- a/arch/arm/mach-uniphier/ph1-ld4/sg_init.c +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -void sg_init(void) -{ - u32 tmp; - - /* Input ports must be enabled before deasserting reset of cores */ - tmp = readl(SG_IECTRL); - tmp |= 0x1; - writel(tmp, SG_IECTRL); -} diff --git a/arch/arm/mach-uniphier/ph1-pro4/Makefile b/arch/arm/mach-uniphier/ph1-pro4/Makefile index 7fdb36a394e..afd9235e9b3 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/Makefile +++ b/arch/arm/mach-uniphier/ph1-pro4/Makefile @@ -4,7 +4,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o -obj-y += sg_init.o pll_init.o early_clkrst_init.o \ +obj-y += pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o diff --git a/arch/arm/mach-uniphier/ph1-pro4/sg_init.c b/arch/arm/mach-uniphier/ph1-pro4/sg_init.c deleted file mode 100644 index d6ccffbbc3e..00000000000 --- a/arch/arm/mach-uniphier/ph1-pro4/sg_init.c +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -void sg_init(void) -{ - u32 tmp; - - /* Input ports must be enabled before deasserting reset of cores */ - tmp = readl(SG_IECTRL); - tmp |= 1 << 6; - writel(tmp, SG_IECTRL); -} diff --git a/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c b/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c index 130c8317366..98da1f9fe9b 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c +++ b/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c @@ -11,15 +11,6 @@ void pin_init(void) { /* Comment format: PAD Name -> Function Name */ -#ifdef CONFIG_SYS_I2C_UNIPHIER - { - u32 tmp; - tmp = readl(SG_IECTRL); - tmp |= 0xc00; /* enable SCL0, SDA0, SCL1, SDA1 */ - writel(tmp, SG_IECTRL); - } -#endif - #ifdef CONFIG_NAND_DENALI sg_set_pinsel(15, 0); /* XNFRE_GB -> XNFRE_GB */ sg_set_pinsel(16, 0); /* XNFWE_GB -> XNFWE_GB */ diff --git a/arch/arm/mach-uniphier/ph1-sld8/sg_init.c b/arch/arm/mach-uniphier/ph1-sld8/sg_init.c deleted file mode 100644 index a808289a56d..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld8/sg_init.c +++ /dev/null @@ -1 +0,0 @@ -#include "../ph1-ld4/sg_init.c" diff --git a/arch/arm/mach-uniphier/spl.c b/arch/arm/mach-uniphier/spl.c index 86764bcc73b..78534fc41ce 100644 --- a/arch/arm/mach-uniphier/spl.c +++ b/arch/arm/mach-uniphier/spl.c @@ -1,7 +1,5 @@ /* - * Copyright (C) 2013-2015 Panasonic Corporation - * Copyright (C) 2015 Socionext Inc. - * Author: Masahiro Yamada + * Copyright (C) 2013-2015 Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ @@ -16,6 +14,10 @@ void __weak bcu_init(void) { }; +void __weak sg_init(void) +{ +}; + void __weak early_pin_init(void) { }; From 9879842c6fdb64d95085ac66647ed77d7abfd439 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:45 +0900 Subject: [PATCH 14/33] ARM: uniphier: drop DCC micro support card support Historically (for compatibility with very old platforms), two different types of micro support cards have been used with the UniPhier SoC development boards. It has been painful to maintain both. Having one of them is enough. Signed-off-by: Masahiro Yamada Reviewed-by: Simon Glass --- arch/arm/mach-uniphier/Kconfig | 23 +---- arch/arm/mach-uniphier/Makefile | 3 +- arch/arm/mach-uniphier/include/mach/board.h | 6 +- arch/arm/mach-uniphier/ph1-ld4/Makefile | 3 +- arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c | 49 ----------- arch/arm/mach-uniphier/ph1-pro4/Makefile | 3 +- .../arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c | 42 --------- arch/arm/mach-uniphier/ph1-sld3/Makefile | 3 +- .../arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c | 37 -------- .../arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c | 57 ------------ arch/arm/mach-uniphier/support_card.c | 87 +++---------------- configs/ph1_ld4_defconfig | 2 +- configs/ph1_pro4_defconfig | 2 +- configs/ph1_sld3_defconfig | 2 +- configs/ph1_sld8_defconfig | 2 +- include/configs/uniphier.h | 19 ++-- 16 files changed, 29 insertions(+), 311 deletions(-) delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c delete mode 100644 arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 7b49ad3b490..28d574fbb80 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -26,29 +26,14 @@ config MACH_PH1_SLD8 endchoice -choice - prompt "UniPhier Support Card select" - optional - -config PFC_MICRO_SUPPORT_CARD - bool "Support card with PFC CPLD" +config MICRO_SUPPORT_CARD + bool "Use Micro Support Card" help - This option provides support for the expansion board with PFC - original address mapping. + This option provides support for the expansion board, available + on some UniPhier reference boards. Say Y to use the on-board UART, Ether, LED devices. -config DCC_MICRO_SUPPORT_CARD - bool "Support card with DCC CPLD" - help - This option provides support for the expansion board with DCC- - arranged address mapping that is compatible with legacy UniPhier - reference boards. - - Say Y to use the on-board UART, Ether, LED devices. - -endchoice - config CMD_PINMON bool "Enable boot mode pins monitor command" default y diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 103db6d7dc6..5f175575e86 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -29,8 +29,7 @@ endif obj-y += timer.o -obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += support_card.o -obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += support_card.o +obj-$(CONFIG_MICRO_SUPPORT_CARD) += support_card.o obj-$(CONFIG_MACH_PH1_SLD3) += ph1-sld3/ obj-$(CONFIG_MACH_PH1_LD4) += ph1-ld4/ diff --git a/arch/arm/mach-uniphier/include/mach/board.h b/arch/arm/mach-uniphier/include/mach/board.h index e3cba5befe2..c039d807f4d 100644 --- a/arch/arm/mach-uniphier/include/mach/board.h +++ b/arch/arm/mach-uniphier/include/mach/board.h @@ -1,6 +1,5 @@ /* - * Copyright (C) 2012-2014 Panasonic Corporation - * Author: Masahiro Yamada + * Copyright (C) 2012-2015 Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ @@ -8,8 +7,7 @@ #ifndef ARCH_BOARD_H #define ARCH_BOARD_H -#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) || \ - defined(CONFIG_DCC_MICRO_SUPPORT_CARD) +#if defined(CONFIG_MICRO_SUPPORT_CARD) void support_card_reset(void); void support_card_init(void); void support_card_late_init(void); diff --git a/arch/arm/mach-uniphier/ph1-ld4/Makefile b/arch/arm/mach-uniphier/ph1-ld4/Makefile index 0c198c65e77..4a2c944aeef 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/Makefile +++ b/arch/arm/mach-uniphier/ph1-ld4/Makefile @@ -6,8 +6,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += bcu_init.o pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o -obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o -obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o +obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o else obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o endif diff --git a/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c deleted file mode 100644 index 5b5958be053..00000000000 --- a/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -void sbc_init(void) -{ - u32 tmp; - - /* system bus output enable */ - tmp = readl(PC0CTRL); - tmp &= 0xfffffcff; - writel(tmp, PC0CTRL); - - /* XECS1: sub/boot memory (boot swap = off/on) */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); - - /* XECS0: boot/sub memory (boot swap = off/on) */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04); - - /* XECS3: peripherals */ - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30); - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31); - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32); - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34); - - /* base address regsiters */ - writel(0x0000bc01, SBBASE0); - writel(0x0400bc01, SBBASE1); - writel(0x0800bf01, SBBASE3); - - /* enable access to sub memory when boot swap is on */ - if (boot_is_swapped()) - sg_set_pinsel(155, 1); /* PORT24 -> XECS0 */ - - sg_set_pinsel(156, 1); /* PORT25 -> XECS3 */ -} diff --git a/arch/arm/mach-uniphier/ph1-pro4/Makefile b/arch/arm/mach-uniphier/ph1-pro4/Makefile index afd9235e9b3..a52b5aa5565 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/Makefile +++ b/arch/arm/mach-uniphier/ph1-pro4/Makefile @@ -6,8 +6,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o -obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o -obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o +obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o else obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o endif diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c deleted file mode 100644 index 877ba79f68d..00000000000 --- a/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -void sbc_init(void) -{ - /* XECS0: boot/sub memory (boot swap = off/on) */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04); - - /* XECS1: sub/boot memory (boot swap = off/on) */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); - - /* XECS3: peripherals */ - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30); - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31); - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32); - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34); - - writel(0x0000bc01, SBBASE0); /* boot memory */ - writel(0x0400bc01, SBBASE1); /* sub memory */ - writel(0x0800bf01, SBBASE3); /* peripherals */ - - /* enable access to sub memory when boot swap is on */ - if (boot_is_swapped()) - sg_set_pinsel(318, 5); /* PORT22 -> XECS0 */ - - sg_set_pinsel(313, 5); /* PORT15 -> XECS3 */ - writel(0x00000001, SG_LOADPINCTRL); -} diff --git a/arch/arm/mach-uniphier/ph1-sld3/Makefile b/arch/arm/mach-uniphier/ph1-sld3/Makefile index aff5d640d6f..e3cb39fa50d 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/Makefile +++ b/arch/arm/mach-uniphier/ph1-sld3/Makefile @@ -6,8 +6,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += bcu_init.o memconf.o sg_init.o pll_init.o early_clkrst_init.o \ early_pinctrl.o pll_spectrum.o umc_init.o -obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o -obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o +obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o else obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o endif diff --git a/arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c deleted file mode 100644 index f5e24467ced..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld3/sbc_init_3cs.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -void sbc_init(void) -{ - /* only address/data multiplex mode is supported */ - - /* XECS0 : boot/sub memory (boot swap = off/on) */ - writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL00); - writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL01); - writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL02); - - /* XECS1 : sub/boot memory (boot swap = off/on) */ - writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10); - writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11); - writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12); - - /* XECS2 : peripherals */ - writel(SBCTRL0_ADMULTIPLX_PERI_VALUE, SBCTRL20); - writel(SBCTRL1_ADMULTIPLX_PERI_VALUE, SBCTRL21); - writel(SBCTRL2_ADMULTIPLX_PERI_VALUE, SBCTRL22); - - /* base address regsiters */ - writel(0x0000bc01, SBBASE0); - writel(0x0400bc01, SBBASE1); - writel(0x0800bf01, SBBASE2); - - sg_set_pinsel(99, 1); /* GPIO26 -> EA24 */ -} diff --git a/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c deleted file mode 100644 index c2267c73eeb..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -void sbc_init(void) -{ - u32 tmp; - - /* system bus output enable */ - tmp = readl(PC0CTRL); - tmp &= 0xfffffcff; - writel(tmp, PC0CTRL); - - /* - * SBCTRL0* does not need settings because PH1-sLD8 has no support for - * XECS0. The boot swap must be enabled to boot from the support card. - */ - - if (boot_is_swapped()) { - /* XECS1 : boot memory if boot swap is on */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); - } - - /* XECS4 : sub memory */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL40); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL41); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL42); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL44); - - /* XECS5 : peripherals */ - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL50); - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL51); - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL52); - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL54); - - /* base address regsiters */ - writel(0x0000bc01, SBBASE0); /* boot memory */ - writel(0x0900bfff, SBBASE1); /* dummy */ - writel(0x0400bc01, SBBASE4); /* sub memory */ - writel(0x0800bf01, SBBASE5); /* peripherals */ - - sg_set_pinsel(134, 16); /* XIRQ6 -> XECS4 */ - sg_set_pinsel(135, 16); /* XIRQ7 -> XECS5 */ - - /* dummy read to assure write process */ - readl(SG_PINCTRL(0)); -} diff --git a/arch/arm/mach-uniphier/support_card.c b/arch/arm/mach-uniphier/support_card.c index ea85b20e979..4ca6ffea2dc 100644 --- a/arch/arm/mach-uniphier/support_card.c +++ b/arch/arm/mach-uniphier/support_card.c @@ -8,11 +8,9 @@ #include #include -#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) - -#define PFC_MICRO_SUPPORT_CARD_RESET \ +#define MICRO_SUPPORT_CARD_RESET \ ((CONFIG_SUPPORT_CARD_BASE) + 0x000D0034) -#define PFC_MICRO_SUPPORT_CARD_REVISION \ +#define MICRO_SUPPORT_CARD_REVISION \ ((CONFIG_SUPPORT_CARD_BASE) + 0x000D00E0) /* * 0: reset deassert, 1: reset @@ -22,65 +20,22 @@ */ void support_card_reset_deassert(void) { - writel(0, PFC_MICRO_SUPPORT_CARD_RESET); + writel(0, MICRO_SUPPORT_CARD_RESET); } void support_card_reset(void) { - writel(3, PFC_MICRO_SUPPORT_CARD_RESET); + writel(3, MICRO_SUPPORT_CARD_RESET); } static int support_card_show_revision(void) { u32 revision; - revision = readl(PFC_MICRO_SUPPORT_CARD_REVISION); - printf("(PFC CPLD version %d.%d)\n", revision >> 4, revision & 0xf); + revision = readl(MICRO_SUPPORT_CARD_REVISION); + printf("(CPLD version %d.%d)\n", revision >> 4, revision & 0xf); return 0; } -#endif - -#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD) - -#define DCC_MICRO_SUPPORT_CARD_RESET_LAN \ - ((CONFIG_SUPPORT_CARD_BASE) + 0x00401300) -#define DCC_MICRO_SUPPORT_CARD_RESET_UART \ - ((CONFIG_SUPPORT_CARD_BASE) + 0x00401304) -#define DCC_MICRO_SUPPORT_CARD_RESET_I2C \ - ((CONFIG_SUPPORT_CARD_BASE) + 0x00401308) -#define DCC_MICRO_SUPPORT_CARD_REVISION \ - ((CONFIG_SUPPORT_CARD_BASE) + 0x005000E0) - -void support_card_reset_deassert(void) -{ - writel(1, DCC_MICRO_SUPPORT_CARD_RESET_LAN); /* LAN and LED */ - writel(1, DCC_MICRO_SUPPORT_CARD_RESET_UART); /* UART */ - writel(1, DCC_MICRO_SUPPORT_CARD_RESET_I2C); /* I2C */ -} - -void support_card_reset(void) -{ - writel(0, DCC_MICRO_SUPPORT_CARD_RESET_LAN); /* LAN and LED */ - writel(0, DCC_MICRO_SUPPORT_CARD_RESET_UART); /* UART */ - writel(0, DCC_MICRO_SUPPORT_CARD_RESET_I2C); /* I2C */ -} - -static int support_card_show_revision(void) -{ - u32 revision; - - revision = readl(DCC_MICRO_SUPPORT_CARD_REVISION); - - if (revision >= 0x67) { - printf("(DCC CPLD version 3.%d.%d)\n", - revision >> 4, revision & 0xf); - return 0; - } else { - printf("(DCC CPLD unknown version)\n"); - return -1; - } -} -#endif int check_support_card(void) { @@ -146,28 +101,11 @@ static int mem_is_flash(const struct memory_bank *mem) return ret; } -#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) - /* {address, size} */ -static const struct memory_bank memory_banks_boot_swap_off[] = { +/* {address, size} */ +static const struct memory_bank memory_banks[] = { {0x02000000, 0x01f00000}, }; -static const struct memory_bank memory_banks_boot_swap_on[] = { - {0x00000000, 0x01f00000}, -}; -#endif - -#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD) -static const struct memory_bank memory_banks_boot_swap_off[] = { - {0x04000000, 0x02000000}, -}; - -static const struct memory_bank memory_banks_boot_swap_on[] = { - {0x00000000, 0x02000000}, - {0x04000000, 0x02000000}, -}; -#endif - static const struct memory_bank *flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS_DETECT]; @@ -187,13 +125,8 @@ static void detect_num_flash_banks(void) cfi_flash_num_flash_banks = 0; - if (boot_is_swapped()) { - memory_bank = memory_banks_boot_swap_on; - end = memory_bank + ARRAY_SIZE(memory_banks_boot_swap_on); - } else { - memory_bank = memory_banks_boot_swap_off; - end = memory_bank + ARRAY_SIZE(memory_banks_boot_swap_off); - } + memory_bank = memory_banks; + end = memory_bank + ARRAY_SIZE(memory_banks); for (; memory_bank < end; memory_bank++) { if (cfi_flash_num_flash_banks >= diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 13b124b661e..e9744a3483b 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_MACH_PH1_LD4=y -CONFIG_PFC_MICRO_SUPPORT_CARD=y +CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref" CONFIG_HUSH_PARSER=y diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 0982d9141a3..1b3092dbe74 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_PFC_MICRO_SUPPORT_CARD=y +CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref" CONFIG_HUSH_PARSER=y diff --git a/configs/ph1_sld3_defconfig b/configs/ph1_sld3_defconfig index d49513251e3..df908e260b5 100644 --- a/configs/ph1_sld3_defconfig +++ b/configs/ph1_sld3_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_MACH_PH1_SLD3=y -CONFIG_PFC_MICRO_SUPPORT_CARD=y +CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld3-ref" CONFIG_HUSH_PARSER=y diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 584c41ab9f6..81515628578 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_MACH_PH1_SLD8=y -CONFIG_PFC_MICRO_SUPPORT_CARD=y +CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref" CONFIG_HUSH_PARSER=y diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index d59564bafd0..7316046952e 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -62,19 +62,10 @@ /* * Support card address map */ -#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) -# define CONFIG_SUPPORT_CARD_BASE 0x03f00000 -# define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000) -# define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00090000) -# define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x000b0000) -#endif - -#if defined(CONFIG_DCC_MICRO_SUPPORT_CARD) -# define CONFIG_SUPPORT_CARD_BASE 0x08000000 -# define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000) -# define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00401630) -# define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00200000) -#endif +#define CONFIG_SUPPORT_CARD_BASE 0x03f00000 +#define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000) +#define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00090000) +#define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x000b0000) #ifdef CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550 @@ -140,7 +131,7 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2 +#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 /* serial console configuration */ #define CONFIG_BAUDRATE 115200 From 4ef542efd54e24c523506df174c4d1978800ef9c Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:46 +0900 Subject: [PATCH 15/33] ARM: uniphier: enable setexpr command This command will be used in the next commit to calculate base-offseted addresses. Signed-off-by: Masahiro Yamada --- configs/ph1_ld4_defconfig | 1 - configs/ph1_pro4_defconfig | 1 - configs/ph1_sld3_defconfig | 1 - configs/ph1_sld8_defconfig | 1 - 4 files changed, 4 deletions(-) diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index e9744a3483b..899a7238f38 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -12,7 +12,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 1b3092dbe74..139767a6ee3 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -11,7 +11,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y diff --git a/configs/ph1_sld3_defconfig b/configs/ph1_sld3_defconfig index df908e260b5..79ce0e28cde 100644 --- a/configs/ph1_sld3_defconfig +++ b/configs/ph1_sld3_defconfig @@ -11,7 +11,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 81515628578..216d49be124 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -12,7 +12,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y From d5ed8c5727f6985505ceb6e8640528e7e08e9670 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:47 +0900 Subject: [PATCH 16/33] ARM: uniphier: change the external bus address mapping In UniPhier SoCs before ProXstream2 and PH1-LD6b, two address spaces 0x00000000 - 0x0fffffff 0x40000000 - 0x4fffffff are both mapped to the external bus (also called system bus), so either was OK. In the newest two SoCs, the former (0x00000000 - 0x0fffffff) is assigned for the serial NOR interface. Going forward, use the latter for the external bus. Signed-off-by: Masahiro Yamada Reviewed-by: Simon Glass --- arch/arm/mach-uniphier/ph1-ld4/sbc_init.c | 12 ++++++------ arch/arm/mach-uniphier/ph1-pro4/sbc_init.c | 12 ++++++------ arch/arm/mach-uniphier/ph1-sld3/sbc_init.c | 12 ++++++------ arch/arm/mach-uniphier/support_card.c | 2 +- include/configs/uniphier.h | 7 ++++++- 5 files changed, 25 insertions(+), 20 deletions(-) diff --git a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c index 8e25792b501..4435a47e73c 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c @@ -30,18 +30,18 @@ void sbc_init(void) if (boot_is_swapped()) { /* * Boot Swap On: boot from external NOR/SRAM - * 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff. + * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff. * - * 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank - * 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals + * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank + * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals */ writel(0x0000bc01, SBBASE0); } else { /* * Boot Swap Off: boot from mask ROM - * 0x00000000-0x01ffffff: mask ROM - * 0x02000000-0x03efffff: memory bank (31MB) - * 0x03f00000-0x03ffffff: peripherals (1MB) + * 0x40000000-0x41ffffff: mask ROM + * 0x42000000-0x43efffff: memory bank (31MB) + * 0x43f00000-0x43ffffff: peripherals (1MB) */ writel(0x0000be01, SBBASE0); /* dummy */ writel(0x0200be01, SBBASE1); diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c index 533739c364d..685f9c736c9 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c @@ -23,18 +23,18 @@ void sbc_init(void) if (boot_is_swapped()) { /* * Boot Swap On: boot from external NOR/SRAM - * 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff. + * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff. * - * 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank - * 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals + * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank + * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals */ writel(0x0000bc01, SBBASE0); } else { /* * Boot Swap Off: boot from mask ROM - * 0x00000000-0x01ffffff: mask ROM - * 0x02000000-0x03efffff: memory bank (31MB) - * 0x03f00000-0x03ffffff: peripherals (1MB) + * 0x40000000-0x41ffffff: mask ROM + * 0x42000000-0x43efffff: memory bank (31MB) + * 0x43f00000-0x43ffffff: peripherals (1MB) */ writel(0x0000be01, SBBASE0); /* dummy */ writel(0x0200be01, SBBASE1); diff --git a/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c b/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c index d66f89ea51f..bafab4b0e66 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c @@ -24,18 +24,18 @@ void sbc_init(void) if (boot_is_swapped()) { /* * Boot Swap On: boot from external NOR/SRAM - * 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff. + * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff. * - * 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank - * 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals + * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank + * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals */ writel(0x0000bc01, SBBASE0); } else { /* * Boot Swap Off: boot from mask ROM - * 0x00000000-0x01ffffff: mask ROM - * 0x02000000-0x03efffff: memory bank (31MB) - * 0x03f00000-0x03ffffff: peripherals (1MB) + * 0x40000000-0x41ffffff: mask ROM + * 0x42000000-0x43efffff: memory bank (31MB) + * 0x43f00000-0x43ffffff: peripherals (1MB) */ writel(0x0000be01, SBBASE0); /* dummy */ writel(0x0200be01, SBBASE1); diff --git a/arch/arm/mach-uniphier/support_card.c b/arch/arm/mach-uniphier/support_card.c index 4ca6ffea2dc..ef4576de432 100644 --- a/arch/arm/mach-uniphier/support_card.c +++ b/arch/arm/mach-uniphier/support_card.c @@ -103,7 +103,7 @@ static int mem_is_flash(const struct memory_bank *mem) /* {address, size} */ static const struct memory_bank memory_banks[] = { - {0x02000000, 0x01f00000}, + {0x42000000, 0x01f00000}, }; static const struct memory_bank diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 7316046952e..45b39c075e5 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -62,7 +62,7 @@ /* * Support card address map */ -#define CONFIG_SUPPORT_CARD_BASE 0x03f00000 +#define CONFIG_SUPPORT_CARD_BASE 0x43f00000 #define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000) #define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00090000) #define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x000b0000) @@ -240,6 +240,7 @@ "fit_addr_r=0x84100000\0" \ "fit_size=0x00f00000\0" \ "norboot=run add_default_bootargs &&" \ + "setexpr fit_addr $nor_base + $fit_addr &&" \ "bootm $fit_addr\0" \ "nandboot=run add_default_bootargs &&" \ "nand read $fit_addr_r $fit_addr $fit_size &&" \ @@ -262,6 +263,9 @@ "ramdisk_size=0x00600000\0" \ "ramdisk_file=rootfs.cpio.uboot\0" \ "norboot=run add_default_bootargs &&" \ + "setexpr kernel_addr $nor_base + $kernel_addr &&" \ + "setexpr ramdisk_addr $nor_base + $ramdisk_addr &&" \ + "setexpr fdt_addr $nor_base + $fdt_addr &&" \ "bootm $kernel_addr $ramdisk_addr $fdt_addr\0" \ "nandboot=run add_default_bootargs &&" \ "nand read $kernel_addr_r $kernel_addr $kernel_size &&" \ @@ -278,6 +282,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "verify=n\0" \ + "norbase=0x42000000\0" \ "nandupdate=nand erase 0 0x00100000 &&" \ "tftpboot u-boot-spl-dtb.bin &&" \ "nand write $loadaddr 0 0x00010000 &&" \ From 9628afa7f5cd6d752adc7bb77ea14fd639a66d03 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:48 +0900 Subject: [PATCH 17/33] ARM: uniphier: remove ifdef CONFIG_{SOC} conditionals from sg-regs.h To achieve the complete run-time configuration by device trees, ifdef conditionals in header files are not preferable. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/include/mach/sg-regs.h | 40 ++++++--------- .../mach-uniphier/ph1-ld4/lowlevel_debug.S | 4 +- arch/arm/mach-uniphier/ph1-ld4/pinctrl.c | 46 ++++++++--------- .../mach-uniphier/ph1-pro4/lowlevel_debug.S | 4 +- arch/arm/mach-uniphier/ph1-pro4/pinctrl.c | 50 +++++++++---------- .../mach-uniphier/ph1-sld3/early_pinctrl.c | 12 ++--- .../mach-uniphier/ph1-sld3/lowlevel_debug.S | 4 +- arch/arm/mach-uniphier/ph1-sld3/pinctrl.c | 16 +++--- arch/arm/mach-uniphier/ph1-sld3/sbc_init.c | 2 +- .../mach-uniphier/ph1-sld8/lowlevel_debug.S | 4 +- arch/arm/mach-uniphier/ph1-sld8/pinctrl.c | 46 ++++++++--------- 11 files changed, 109 insertions(+), 119 deletions(-) diff --git a/arch/arm/mach-uniphier/include/mach/sg-regs.h b/arch/arm/mach-uniphier/include/mach/sg-regs.h index 43a6c35339c..c886e1c6555 100644 --- a/arch/arm/mach-uniphier/include/mach/sg-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sg-regs.h @@ -53,24 +53,6 @@ /* Pin Control */ #define SG_PINCTRL_BASE (SG_CTRL_BASE | 0x1000) -#if defined(CONFIG_MACH_PH1_PRO4) -# define SG_PINCTRL(n) (SG_PINCTRL_BASE + (n) * 8) -#elif defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \ - defined(CONFIG_MACH_PH1_SLD8) -# define SG_PINCTRL(n) (SG_PINCTRL_BASE + (n) * 4) -#endif - -#if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_PRO4) -#define SG_PINSELBITS 4 -#elif defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8) -#define SG_PINSELBITS 8 -#endif - -#define SG_PINSEL_ADDR(n) (SG_PINCTRL((n) * (SG_PINSELBITS) / 32)) -#define SG_PINSEL_MASK(n) (~(((1 << (SG_PINSELBITS)) - 1) << \ - ((n) * (SG_PINSELBITS) % 32))) -#define SG_PINSEL_MODE(n, mode) ((mode) << ((n) * (SG_PINSELBITS) % 32)) - /* Only for PH1-Pro4 */ #define SG_LOADPINCTRL (SG_CTRL_BASE | 0x1700) @@ -98,11 +80,11 @@ #ifdef __ASSEMBLY__ - .macro set_pinsel, n, value, ra, rd - ldr \ra, =SG_PINSEL_ADDR(\n) + .macro sg_set_pinsel, pin, muxval, mux_bits, reg_stride, ra, rd + ldr \ra, =(SG_PINCTRL_BASE + \pin * \mux_bits / 32 * \reg_stride) ldr \rd, [\ra] - and \rd, \rd, #SG_PINSEL_MASK(\n) - orr \rd, \rd, #SG_PINSEL_MODE(\n, \value) + and \rd, \rd, #~(((1 << \mux_bits) - 1) << (\pin * \mux_bits % 32)) + orr \rd, \rd, #(\muxval << (\pin * \mux_bits % 32)) str \rd, [\ra] .endm @@ -111,10 +93,18 @@ #include #include -static inline void sg_set_pinsel(int n, int value) +static inline void sg_set_pinsel(unsigned pin, unsigned muxval, + unsigned mux_bits, unsigned reg_stride) { - writel((readl(SG_PINSEL_ADDR(n)) & SG_PINSEL_MASK(n)) - | SG_PINSEL_MODE(n, value), SG_PINSEL_ADDR(n)); + unsigned shift = pin * mux_bits % 32; + unsigned reg = SG_PINCTRL_BASE + pin * mux_bits / 32 * reg_stride; + u32 mask = (1U << mux_bits) - 1; + u32 tmp; + + tmp = readl(reg); + tmp &= ~(mask << shift); + tmp |= (mask & muxval) << shift; + writel(tmp, reg); } #endif /* __ASSEMBLY__ */ diff --git a/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S index 7928c5c87cc..fd393dcfb3c 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S @@ -17,8 +17,8 @@ ENTRY(setup_lowlevel_debug) init_debug_uart r0, r1, r2 /* UART Port 0 */ - set_pinsel 85, 1, r0, r1 - set_pinsel 88, 1, r0, r1 + sg_set_pinsel 85, 1, 8, 4, r0, r1 + sg_set_pinsel 88, 1, 8, 4, r0, r1 ldr r0, =SG_IECTRL ldr r1, [r0] diff --git a/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c b/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c index 20cc7b30c4d..293a6ab4234 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c +++ b/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c @@ -14,32 +14,32 @@ void pin_init(void) /* Comment format: PAD Name -> Function Name */ #ifdef CONFIG_NAND_DENALI - sg_set_pinsel(158, 0); /* XNFRE -> XNFRE_GB */ - sg_set_pinsel(159, 0); /* XNFWE -> XNFWE_GB */ - sg_set_pinsel(160, 0); /* XFALE -> NFALE_GB */ - sg_set_pinsel(161, 0); /* XFCLE -> NFCLE_GB */ - sg_set_pinsel(162, 0); /* XNFWP -> XFNWP_GB */ - sg_set_pinsel(163, 0); /* XNFCE0 -> XNFCE0_GB */ - sg_set_pinsel(164, 0); /* NANDRYBY0 -> NANDRYBY0_GB */ - sg_set_pinsel(22, 0); /* MMCCLK -> XFNCE1_GB */ - sg_set_pinsel(23, 0); /* MMCCMD -> NANDRYBY1_GB */ - sg_set_pinsel(24, 0); /* MMCDAT0 -> NFD0_GB */ - sg_set_pinsel(25, 0); /* MMCDAT1 -> NFD1_GB */ - sg_set_pinsel(26, 0); /* MMCDAT2 -> NFD2_GB */ - sg_set_pinsel(27, 0); /* MMCDAT3 -> NFD3_GB */ - sg_set_pinsel(28, 0); /* MMCDAT4 -> NFD4_GB */ - sg_set_pinsel(29, 0); /* MMCDAT5 -> NFD5_GB */ - sg_set_pinsel(30, 0); /* MMCDAT6 -> NFD6_GB */ - sg_set_pinsel(31, 0); /* MMCDAT7 -> NFD7_GB */ + sg_set_pinsel(158, 0, 8, 4); /* XNFRE -> XNFRE_GB */ + sg_set_pinsel(159, 0, 8, 4); /* XNFWE -> XNFWE_GB */ + sg_set_pinsel(160, 0, 8, 4); /* XFALE -> NFALE_GB */ + sg_set_pinsel(161, 0, 8, 4); /* XFCLE -> NFCLE_GB */ + sg_set_pinsel(162, 0, 8, 4); /* XNFWP -> XFNWP_GB */ + sg_set_pinsel(163, 0, 8, 4); /* XNFCE0 -> XNFCE0_GB */ + sg_set_pinsel(164, 0, 8, 4); /* NANDRYBY0 -> NANDRYBY0_GB */ + sg_set_pinsel(22, 0, 8, 4); /* MMCCLK -> XFNCE1_GB */ + sg_set_pinsel(23, 0, 8, 4); /* MMCCMD -> NANDRYBY1_GB */ + sg_set_pinsel(24, 0, 8, 4); /* MMCDAT0 -> NFD0_GB */ + sg_set_pinsel(25, 0, 8, 4); /* MMCDAT1 -> NFD1_GB */ + sg_set_pinsel(26, 0, 8, 4); /* MMCDAT2 -> NFD2_GB */ + sg_set_pinsel(27, 0, 8, 4); /* MMCDAT3 -> NFD3_GB */ + sg_set_pinsel(28, 0, 8, 4); /* MMCDAT4 -> NFD4_GB */ + sg_set_pinsel(29, 0, 8, 4); /* MMCDAT5 -> NFD5_GB */ + sg_set_pinsel(30, 0, 8, 4); /* MMCDAT6 -> NFD6_GB */ + sg_set_pinsel(31, 0, 8, 4); /* MMCDAT7 -> NFD7_GB */ #endif #ifdef CONFIG_USB_EHCI_UNIPHIER - sg_set_pinsel(53, 0); /* USB0VBUS -> USB0VBUS */ - sg_set_pinsel(54, 0); /* USB0OD -> USB0OD */ - sg_set_pinsel(55, 0); /* USB1VBUS -> USB1VBUS */ - sg_set_pinsel(56, 0); /* USB1OD -> USB1OD */ - /* sg_set_pinsel(67, 23); */ /* PCOE -> USB2VBUS */ - /* sg_set_pinsel(68, 23); */ /* PCWAIT -> USB2OD */ + sg_set_pinsel(53, 0, 8, 4); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(54, 0, 8, 4); /* USB0OD -> USB0OD */ + sg_set_pinsel(55, 0, 8, 4); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(56, 0, 8, 4); /* USB1OD -> USB1OD */ + /* sg_set_pinsel(67, 23, 8, 4); */ /* PCOE -> USB2VBUS */ + /* sg_set_pinsel(68, 23, 8, 4); */ /* PCWAIT -> USB2OD */ #endif tmp = readl(SG_IECTRL); diff --git a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S index fcaf6d12d8d..19bef2a1575 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S @@ -23,8 +23,8 @@ ENTRY(setup_lowlevel_debug) init_debug_uart r0, r1, r2 /* UART Port 0 */ - set_pinsel 127, 0, r0, r1 - set_pinsel 128, 0, r0, r1 + sg_set_pinsel 127, 0, 4, 8, r0, r1 + sg_set_pinsel 128, 0, 4, 8, r0, r1 ldr r0, =SG_LOADPINCTRL mov r1, #1 diff --git a/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c b/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c index 2a5a296f882..bfaff4fea9a 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c +++ b/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c @@ -12,37 +12,37 @@ void pin_init(void) /* Comment format: PAD Name -> Function Name */ #ifdef CONFIG_NAND_DENALI - sg_set_pinsel(40, 0); /* NFD0 -> NFD0 */ - sg_set_pinsel(41, 0); /* NFD1 -> NFD1 */ - sg_set_pinsel(42, 0); /* NFD2 -> NFD2 */ - sg_set_pinsel(43, 0); /* NFD3 -> NFD3 */ - sg_set_pinsel(44, 0); /* NFD4 -> NFD4 */ - sg_set_pinsel(45, 0); /* NFD5 -> NFD5 */ - sg_set_pinsel(46, 0); /* NFD6 -> NFD6 */ - sg_set_pinsel(47, 0); /* NFD7 -> NFD7 */ - sg_set_pinsel(48, 0); /* NFALE -> NFALE */ - sg_set_pinsel(49, 0); /* NFCLE -> NFCLE */ - sg_set_pinsel(50, 0); /* XNFRE -> XNFRE */ - sg_set_pinsel(51, 0); /* XNFWE -> XNFWE */ - sg_set_pinsel(52, 0); /* XNFWP -> XNFWP */ - sg_set_pinsel(53, 0); /* XNFCE0 -> XNFCE0 */ - sg_set_pinsel(54, 0); /* NRYBY0 -> NRYBY0 */ - /* sg_set_pinsel(131, 1); */ /* RXD2 -> NRYBY1 */ - /* sg_set_pinsel(132, 1); */ /* TXD2 -> XNFCE1 */ + sg_set_pinsel(40, 0, 4, 8); /* NFD0 -> NFD0 */ + sg_set_pinsel(41, 0, 4, 8); /* NFD1 -> NFD1 */ + sg_set_pinsel(42, 0, 4, 8); /* NFD2 -> NFD2 */ + sg_set_pinsel(43, 0, 4, 8); /* NFD3 -> NFD3 */ + sg_set_pinsel(44, 0, 4, 8); /* NFD4 -> NFD4 */ + sg_set_pinsel(45, 0, 4, 8); /* NFD5 -> NFD5 */ + sg_set_pinsel(46, 0, 4, 8); /* NFD6 -> NFD6 */ + sg_set_pinsel(47, 0, 4, 8); /* NFD7 -> NFD7 */ + sg_set_pinsel(48, 0, 4, 8); /* NFALE -> NFALE */ + sg_set_pinsel(49, 0, 4, 8); /* NFCLE -> NFCLE */ + sg_set_pinsel(50, 0, 4, 8); /* XNFRE -> XNFRE */ + sg_set_pinsel(51, 0, 4, 8); /* XNFWE -> XNFWE */ + sg_set_pinsel(52, 0, 4, 8); /* XNFWP -> XNFWP */ + sg_set_pinsel(53, 0, 4, 8); /* XNFCE0 -> XNFCE0 */ + sg_set_pinsel(54, 0, 4, 8); /* NRYBY0 -> NRYBY0 */ + /* sg_set_pinsel(131, 1, 4, 8); */ /* RXD2 -> NRYBY1 */ + /* sg_set_pinsel(132, 1, 4, 8); */ /* TXD2 -> XNFCE1 */ #endif #ifdef CONFIG_USB_XHCI_UNIPHIER - sg_set_pinsel(180, 0); /* USB0VBUS -> USB0VBUS */ - sg_set_pinsel(181, 0); /* USB0OD -> USB0OD */ - sg_set_pinsel(182, 0); /* USB1VBUS -> USB1VBUS */ - sg_set_pinsel(183, 0); /* USB1OD -> USB1OD */ + sg_set_pinsel(180, 0, 4, 8); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(181, 0, 4, 8); /* USB0OD -> USB0OD */ + sg_set_pinsel(182, 0, 4, 8); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(183, 0, 4, 8); /* USB1OD -> USB1OD */ #endif #ifdef CONFIG_USB_EHCI_UNIPHIER - sg_set_pinsel(184, 0); /* USB2VBUS -> USB2VBUS */ - sg_set_pinsel(185, 0); /* USB2OD -> USB2OD */ - sg_set_pinsel(187, 0); /* USB3VBUS -> USB3VBUS */ - sg_set_pinsel(188, 0); /* USB3OD -> USB3OD */ + sg_set_pinsel(184, 0, 4, 8); /* USB2VBUS -> USB2VBUS */ + sg_set_pinsel(185, 0, 4, 8); /* USB2OD -> USB2OD */ + sg_set_pinsel(187, 0, 4, 8); /* USB3VBUS -> USB3VBUS */ + sg_set_pinsel(188, 0, 4, 8); /* USB3OD -> USB3OD */ #endif writel(1, SG_LOADPINCTRL); diff --git a/arch/arm/mach-uniphier/ph1-sld3/early_pinctrl.c b/arch/arm/mach-uniphier/ph1-sld3/early_pinctrl.c index f113e658d8e..f6ceef5f1c0 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/early_pinctrl.c +++ b/arch/arm/mach-uniphier/ph1-sld3/early_pinctrl.c @@ -11,13 +11,13 @@ void early_pin_init(void) /* Comment format: PAD Name -> Function Name */ #ifdef CONFIG_UNIPHIER_SERIAL - sg_set_pinsel(63, 0); /* RXD0 */ - sg_set_pinsel(64, 1); /* TXD0 */ + sg_set_pinsel(63, 0, 4, 4); /* RXD0 */ + sg_set_pinsel(64, 1, 4, 4); /* TXD0 */ - sg_set_pinsel(65, 0); /* RXD1 */ - sg_set_pinsel(66, 1); /* TXD1 */ + sg_set_pinsel(65, 0, 4, 4); /* RXD1 */ + sg_set_pinsel(66, 1, 4, 4); /* TXD1 */ - sg_set_pinsel(96, 2); /* RXD2 */ - sg_set_pinsel(102, 2); /* TXD2 */ + sg_set_pinsel(96, 2, 4, 4); /* RXD2 */ + sg_set_pinsel(102, 2, 4, 4); /* TXD2 */ #endif } diff --git a/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S index 41f67b7a8fa..ee2eae6bf7e 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S @@ -26,8 +26,8 @@ ENTRY(setup_lowlevel_debug) init_debug_uart r0, r1, r2 - set_pinsel 63, 0, r0, r1 - set_pinsel 64, 1, r0, r1 + sg_set_pinsel 63, 0, 4, 4, r0, r1 + sg_set_pinsel 64, 1, 4, 4, r0, r1 mov pc, lr ENDPROC(setup_lowlevel_debug) diff --git a/arch/arm/mach-uniphier/ph1-sld3/pinctrl.c b/arch/arm/mach-uniphier/ph1-sld3/pinctrl.c index 5ecbe4cca3f..dea938ed2fa 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/pinctrl.c +++ b/arch/arm/mach-uniphier/ph1-sld3/pinctrl.c @@ -9,16 +9,16 @@ void pin_init(void) { #ifdef CONFIG_USB_EHCI_UNIPHIER - sg_set_pinsel(13, 0); /* USB0OC */ - sg_set_pinsel(14, 1); /* USB0VBUS */ + sg_set_pinsel(13, 0, 4, 4); /* USB0OC */ + sg_set_pinsel(14, 1, 4, 4); /* USB0VBUS */ - sg_set_pinsel(15, 0); /* USB1OC */ - sg_set_pinsel(16, 1); /* USB1VBUS */ + sg_set_pinsel(15, 0, 4, 4); /* USB1OC */ + sg_set_pinsel(16, 1, 4, 4); /* USB1VBUS */ - sg_set_pinsel(17, 0); /* USB2OC */ - sg_set_pinsel(18, 1); /* USB2VBUS */ + sg_set_pinsel(17, 0, 4, 4); /* USB2OC */ + sg_set_pinsel(18, 1, 4, 4); /* USB2VBUS */ - sg_set_pinsel(19, 0); /* USB3OC */ - sg_set_pinsel(20, 1); /* USB3VBUS */ + sg_set_pinsel(19, 0, 4, 4); /* USB3OC */ + sg_set_pinsel(20, 1, 4, 4); /* USB3VBUS */ #endif } diff --git a/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c b/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c index bafab4b0e66..3e62121ba95 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c @@ -41,5 +41,5 @@ void sbc_init(void) writel(0x0200be01, SBBASE1); } - sg_set_pinsel(99, 1); /* GPIO26 -> EA24 */ + sg_set_pinsel(99, 1, 4, 4); /* GPIO26 -> EA24 */ } diff --git a/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S index 73f0f63eba5..3ada4c99481 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S @@ -17,8 +17,8 @@ ENTRY(setup_lowlevel_debug) init_debug_uart r0, r1, r2 /* UART Port 0 */ - set_pinsel 70, 3, r0, r1 - set_pinsel 71, 3, r0, r1 + sg_set_pinsel 70, 3, 8, 4, r0, r1 + sg_set_pinsel 71, 3, 8, 4, r0, r1 ldr r0, =SG_IECTRL ldr r1, [r0] diff --git a/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c b/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c index 98da1f9fe9b..1b64414553b 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c +++ b/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c @@ -12,31 +12,31 @@ void pin_init(void) /* Comment format: PAD Name -> Function Name */ #ifdef CONFIG_NAND_DENALI - sg_set_pinsel(15, 0); /* XNFRE_GB -> XNFRE_GB */ - sg_set_pinsel(16, 0); /* XNFWE_GB -> XNFWE_GB */ - sg_set_pinsel(17, 0); /* XFALE_GB -> NFALE_GB */ - sg_set_pinsel(18, 0); /* XFCLE_GB -> NFCLE_GB */ - sg_set_pinsel(19, 0); /* XNFWP_GB -> XFNWP_GB */ - sg_set_pinsel(20, 0); /* XNFCE0_GB -> XNFCE0_GB */ - sg_set_pinsel(21, 0); /* NANDRYBY0_GB -> NANDRYBY0_GB */ - sg_set_pinsel(22, 0); /* XFNCE1_GB -> XFNCE1_GB */ - sg_set_pinsel(23, 0); /* NANDRYBY1_GB -> NANDRYBY1_GB */ - sg_set_pinsel(24, 0); /* NFD0_GB -> NFD0_GB */ - sg_set_pinsel(25, 0); /* NFD1_GB -> NFD1_GB */ - sg_set_pinsel(26, 0); /* NFD2_GB -> NFD2_GB */ - sg_set_pinsel(27, 0); /* NFD3_GB -> NFD3_GB */ - sg_set_pinsel(28, 0); /* NFD4_GB -> NFD4_GB */ - sg_set_pinsel(29, 0); /* NFD5_GB -> NFD5_GB */ - sg_set_pinsel(30, 0); /* NFD6_GB -> NFD6_GB */ - sg_set_pinsel(31, 0); /* NFD7_GB -> NFD7_GB */ + sg_set_pinsel(15, 0, 8, 4); /* XNFRE_GB -> XNFRE_GB */ + sg_set_pinsel(16, 0, 8, 4); /* XNFWE_GB -> XNFWE_GB */ + sg_set_pinsel(17, 0, 8, 4); /* XFALE_GB -> NFALE_GB */ + sg_set_pinsel(18, 0, 8, 4); /* XFCLE_GB -> NFCLE_GB */ + sg_set_pinsel(19, 0, 8, 4); /* XNFWP_GB -> XFNWP_GB */ + sg_set_pinsel(20, 0, 8, 4); /* XNFCE0_GB -> XNFCE0_GB */ + sg_set_pinsel(21, 0, 8, 4); /* NANDRYBY0_GB -> NANDRYBY0_GB */ + sg_set_pinsel(22, 0, 8, 4); /* XFNCE1_GB -> XFNCE1_GB */ + sg_set_pinsel(23, 0, 8, 4); /* NANDRYBY1_GB -> NANDRYBY1_GB */ + sg_set_pinsel(24, 0, 8, 4); /* NFD0_GB -> NFD0_GB */ + sg_set_pinsel(25, 0, 8, 4); /* NFD1_GB -> NFD1_GB */ + sg_set_pinsel(26, 0, 8, 4); /* NFD2_GB -> NFD2_GB */ + sg_set_pinsel(27, 0, 8, 4); /* NFD3_GB -> NFD3_GB */ + sg_set_pinsel(28, 0, 8, 4); /* NFD4_GB -> NFD4_GB */ + sg_set_pinsel(29, 0, 8, 4); /* NFD5_GB -> NFD5_GB */ + sg_set_pinsel(30, 0, 8, 4); /* NFD6_GB -> NFD6_GB */ + sg_set_pinsel(31, 0, 8, 4); /* NFD7_GB -> NFD7_GB */ #endif #ifdef CONFIG_USB_EHCI_UNIPHIER - sg_set_pinsel(41, 0); /* USB0VBUS -> USB0VBUS */ - sg_set_pinsel(42, 0); /* USB0OD -> USB0OD */ - sg_set_pinsel(43, 0); /* USB1VBUS -> USB1VBUS */ - sg_set_pinsel(44, 0); /* USB1OD -> USB1OD */ - /* sg_set_pinsel(114, 1); */ /* TXD1 -> USB2VBUS (shared with UART) */ - /* sg_set_pinsel(115, 1); */ /* RXD1 -> USB2OD */ + sg_set_pinsel(41, 0, 8, 4); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(42, 0, 8, 4); /* USB0OD -> USB0OD */ + sg_set_pinsel(43, 0, 8, 4); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(44, 0, 8, 4); /* USB1OD -> USB1OD */ + /* sg_set_pinsel(114, 1, 8, 4); */ /* TXD1 -> USB2VBUS (shared with UART) */ + /* sg_set_pinsel(115, 1, 8, 4); */ /* RXD1 -> USB2OD */ #endif } From cf88affab6c46bc728d47fe2590c465734d78efb Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 11 Sep 2015 20:17:49 +0900 Subject: [PATCH 18/33] ARM: uniphier: parse device tree to determine DRAM base and size Device tree specifies the available memory ranges in its "/memory" node. Use it to simplify the CONFIG defines. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_common.c | 12 ------- arch/arm/mach-uniphier/dram_init.c | 51 ++++++++++++++++++++++++--- include/configs/uniphier.h | 11 +----- 3 files changed, 48 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-uniphier/board_common.c b/arch/arm/mach-uniphier/board_common.c index 5f2d5f6f5b9..967fa6c0865 100644 --- a/arch/arm/mach-uniphier/board_common.c +++ b/arch/arm/mach-uniphier/board_common.c @@ -18,15 +18,3 @@ int board_init(void) return 0; } - -#if CONFIG_NR_DRAM_BANKS >= 2 -void dram_init_banksize(void) -{ - DECLARE_GLOBAL_DATA_PTR; - - gd->bd->bi_dram[0].start = CONFIG_SDRAM0_BASE; - gd->bd->bi_dram[0].size = CONFIG_SDRAM0_SIZE; - gd->bd->bi_dram[1].start = CONFIG_SDRAM1_BASE; - gd->bd->bi_dram[1].size = CONFIG_SDRAM1_SIZE; -} -#endif diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index 4b8c938b5ea..32cc448aeb5 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -1,16 +1,59 @@ /* - * Copyright (C) 2012-2015 Panasonic Corporation - * Author: Masahiro Yamada + * Copyright (C) 2012-2015 Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ #include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +static const void *get_memory_reg_prop(const void *fdt, int *lenp) +{ + int offset; + + offset = fdt_path_offset(fdt, "/memory"); + if (offset < 0) + return NULL; + + return fdt_getprop(fdt, offset, "reg", lenp); +} int dram_init(void) { - DECLARE_GLOBAL_DATA_PTR; - gd->ram_size = CONFIG_SYS_SDRAM_SIZE; + const fdt32_t *val; + int len; + + val = get_memory_reg_prop(gd->fdt_blob, &len); + if (len < sizeof(*val)) + return -EINVAL; + + gd->ram_size = fdt32_to_cpu(*(val + 1)); + + debug("DRAM size = %08lx\n", gd->ram_size); return 0; } + +void dram_init_banksize(void) +{ + const fdt32_t *val; + int len, i; + + val = get_memory_reg_prop(gd->fdt_blob, &len); + if (len < 0) + return; + + len /= sizeof(*val); + len /= 2; + + for (i = 0; i < len; i++) { + gd->bd->bi_dram[i].start = fdt32_to_cpu(*val++); + gd->bd->bi_dram[i].size = fdt32_to_cpu(*val++); + + debug("DRAM bank %d: start = %08lx, size = %08lx\n", + i, gd->bd->bi_dram[i].start, gd->bd->bi_dram[i].size); + } +} diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 45b39c075e5..a15838b1725 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -295,17 +295,8 @@ /* Open Firmware flat tree */ #define CONFIG_OF_LIBFDT -/* Memory Size & Mapping */ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SDRAM0_BASE - -#if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE >= CONFIG_SDRAM1_BASE -/* Thre is no memory hole */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE + CONFIG_SDRAM1_SIZE) -#else +#define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_NR_DRAM_BANKS 2 -#define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE) -#endif #if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \ defined(CONFIG_MACH_PH1_SLD8) From f1378cabc0d340393bc7e0312f5e1f70d5d19434 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:29 +0900 Subject: [PATCH 19/33] ARM: uniphier: remove unused header file This has been unused since commit f4e190e317b8 ("ARM: uniphier: enable SPL_OF_CONTROL"). Signed-off-by: Masahiro Yamada --- .../mach-uniphier/include/mach/platdevice.h | 24 ------------------- 1 file changed, 24 deletions(-) delete mode 100644 arch/arm/mach-uniphier/include/mach/platdevice.h diff --git a/arch/arm/mach-uniphier/include/mach/platdevice.h b/arch/arm/mach-uniphier/include/mach/platdevice.h deleted file mode 100644 index cdf7d132d44..00000000000 --- a/arch/arm/mach-uniphier/include/mach/platdevice.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (C) 2014 Panasonic Corporation - * Author: Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef ARCH_PLATDEVICE_H -#define ARCH_PLATDEVICE_H - -#include -#include - -#define SERIAL_DEVICE(n, ba, clk) \ -static struct uniphier_serial_platform_data serial_device##n = { \ - .base = ba, \ - .uartclk = clk \ -}; \ -U_BOOT_DEVICE(serial##n) = { \ - .name = DRIVER_NAME, \ - .platdata = &serial_device##n \ -}; - -#endif /* ARCH_PLATDEVICE_H */ From 0b198670c6525392337462282efeaefe459e14cd Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:30 +0900 Subject: [PATCH 20/33] ARM: uniphier: remove useless wrapper functions The wrapper functions, uniphier_board_*, are just making function calls complex. Remove them. Also, use empty inline functions in case CONFIG_MICRO_SUPPORT_CARD is disabled, so that prototype checking works. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_early_init_r.c | 5 ++-- arch/arm/mach-uniphier/include/mach/board.h | 30 +++++++++------------ arch/arm/mach-uniphier/spl.c | 4 +-- 3 files changed, 16 insertions(+), 23 deletions(-) diff --git a/arch/arm/mach-uniphier/board_early_init_r.c b/arch/arm/mach-uniphier/board_early_init_r.c index 579fe70463b..7d4830a3a82 100644 --- a/arch/arm/mach-uniphier/board_early_init_r.c +++ b/arch/arm/mach-uniphier/board_early_init_r.c @@ -1,6 +1,5 @@ /* - * Copyright (C) 2014 Panasonic Corporation - * Author: Masahiro Yamada + * Copyright (C) 2014-2015 Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ @@ -10,6 +9,6 @@ int board_early_init_r(void) { - uniphier_board_late_init(); + support_card_late_init(); return 0; } diff --git a/arch/arm/mach-uniphier/include/mach/board.h b/arch/arm/mach-uniphier/include/mach/board.h index c039d807f4d..5b9af222ae1 100644 --- a/arch/arm/mach-uniphier/include/mach/board.h +++ b/arch/arm/mach-uniphier/include/mach/board.h @@ -13,28 +13,22 @@ void support_card_init(void); void support_card_late_init(void); int check_support_card(void); #else -#define support_card_reset() do {} while (0) -#define support_card_init() do {} while (0) -#define support_card_late_init() do {} while (0) +static inline void support_card_reset(void) +{ +} + +static inline void support_card_init(void) +{ +} + +static inline void support_card_late_init(void) +{ +} + static inline int check_support_card(void) { return 0; } #endif -static inline void uniphier_board_reset(void) -{ - support_card_reset(); -} - -static inline void uniphier_board_init(void) -{ - support_card_init(); -} - -static inline void uniphier_board_late_init(void) -{ - support_card_late_init(); -} - #endif /* ARCH_BOARD_H */ diff --git a/arch/arm/mach-uniphier/spl.c b/arch/arm/mach-uniphier/spl.c index 78534fc41ce..661d73ae4a4 100644 --- a/arch/arm/mach-uniphier/spl.c +++ b/arch/arm/mach-uniphier/spl.c @@ -40,11 +40,11 @@ void spl_board_init(void) sg_init(); - uniphier_board_reset(); + support_card_reset(); pll_init(); - uniphier_board_init(); + support_card_init(); led_write(L, 0, , ); From 8469700b6c9cf31e4e2df7a005f5f5385c5be5d4 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:31 +0900 Subject: [PATCH 21/33] ARM: uniphier: refactor LED function The macro, led_write(), is now only used in C sources. There is no more reason to keep the tricky assembly macro. Replace it with a new C function led_puts(). Also, rename board.h to micro-support-card.h. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_common.c | 11 +- arch/arm/mach-uniphier/board_early_init_f.c | 12 +-- arch/arm/mach-uniphier/board_early_init_r.c | 2 +- arch/arm/mach-uniphier/include/mach/led.h | 100 ------------------ .../mach/{board.h => micro-support-card.h} | 5 + arch/arm/mach-uniphier/lowlevel_init.S | 1 - arch/arm/mach-uniphier/print_misc_info.c | 2 +- arch/arm/mach-uniphier/spl.c | 18 ++-- arch/arm/mach-uniphier/support_card.c | 73 ++++++++++++- 9 files changed, 96 insertions(+), 128 deletions(-) delete mode 100644 arch/arm/mach-uniphier/include/mach/led.h rename arch/arm/mach-uniphier/include/mach/{board.h => micro-support-card.h} (88%) diff --git a/arch/arm/mach-uniphier/board_common.c b/arch/arm/mach-uniphier/board_common.c index 967fa6c0865..198004b59b0 100644 --- a/arch/arm/mach-uniphier/board_common.c +++ b/arch/arm/mach-uniphier/board_common.c @@ -1,20 +1,15 @@ /* - * Copyright (C) 2012-2014 Panasonic Corporation - * Author: Masahiro Yamada + * Copyright (C) 2012-2015 Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ #include -#include +#include -/* - * Routine: board_init - * Description: Early hardware init. - */ int board_init(void) { - led_write(U, B, O, O); + led_puts("Uboo"); return 0; } diff --git a/arch/arm/mach-uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c index 71087404084..45f5cea4334 100644 --- a/arch/arm/mach-uniphier/board_early_init_f.c +++ b/arch/arm/mach-uniphier/board_early_init_f.c @@ -1,27 +1,25 @@ /* - * Copyright (C) 2012-2015 Panasonic Corporation - * Author: Masahiro Yamada + * Copyright (C) 2012-2015 Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ -#include -#include +#include void pin_init(void); void clkrst_init(void); int board_early_init_f(void) { - led_write(U, 0, , ); + led_puts("U0"); pin_init(); - led_write(U, 1, , ); + led_puts("U1"); clkrst_init(); - led_write(U, 2, , ); + led_puts("U2"); return 0; } diff --git a/arch/arm/mach-uniphier/board_early_init_r.c b/arch/arm/mach-uniphier/board_early_init_r.c index 7d4830a3a82..28c7f822287 100644 --- a/arch/arm/mach-uniphier/board_early_init_r.c +++ b/arch/arm/mach-uniphier/board_early_init_r.c @@ -5,7 +5,7 @@ */ #include -#include +#include int board_early_init_r(void) { diff --git a/arch/arm/mach-uniphier/include/mach/led.h b/arch/arm/mach-uniphier/include/mach/led.h deleted file mode 100644 index f7749b48601..00000000000 --- a/arch/arm/mach-uniphier/include/mach/led.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Copyright (C) 2012-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef ARCH_LED_H -#define ARCH_LED_H - -#include - -#define LED_CHAR_0 0x7e -#define LED_CHAR_1 0x0c -#define LED_CHAR_2 0xb6 -#define LED_CHAR_3 0x9e -#define LED_CHAR_4 0xcc -#define LED_CHAR_5 0xda -#define LED_CHAR_6 0xfa -#define LED_CHAR_7 0x4e -#define LED_CHAR_8 0xfe -#define LED_CHAR_9 0xde - -#define LED_CHAR_A 0xee -#define LED_CHAR_B 0xf8 -#define LED_CHAR_C 0x72 -#define LED_CHAR_D 0xbc -#define LED_CHAR_E 0xf2 -#define LED_CHAR_F 0xe2 -#define LED_CHAR_G 0x7a -#define LED_CHAR_H 0xe8 -#define LED_CHAR_I 0x08 -#define LED_CHAR_J 0x3c -#define LED_CHAR_K 0xea -#define LED_CHAR_L 0x70 -#define LED_CHAR_M 0x6e -#define LED_CHAR_N 0xa8 -#define LED_CHAR_O 0xb8 -#define LED_CHAR_P 0xe6 -#define LED_CHAR_Q 0xce -#define LED_CHAR_R 0xa0 -#define LED_CHAR_S 0xc8 -#define LED_CHAR_T 0x8c -#define LED_CHAR_U 0x7c -#define LED_CHAR_V 0x54 -#define LED_CHAR_W 0xfc -#define LED_CHAR_X 0xec -#define LED_CHAR_Y 0xdc -#define LED_CHAR_Z 0xa4 - -#define LED_CHAR_SPACE 0x00 -#define LED_CHAR_DOT 0x01 - -#define LED_CHAR_ (LED_CHAR_SPACE) - -/** Macro to translate 4 characters into integer to display led */ -#define LED_C2I(C0, C1, C2, C3) \ - (~( \ - (LED_CHAR_##C0 << 24) | \ - (LED_CHAR_##C1 << 16) | \ - (LED_CHAR_##C2 << 8) | \ - (LED_CHAR_##C3) \ - )) - -#if defined(CONFIG_SUPPORT_CARD_LED_BASE) - -#define LED_ADDR CONFIG_SUPPORT_CARD_LED_BASE - -#ifdef __ASSEMBLY__ - -#define led_write(C0, C1, C2, C3) raw_led_write LED_C2I(C0, C1, C2, C3) -.macro raw_led_write data - ldr r0, =\data - ldr r1, =LED_ADDR - str r0, [r1] -.endm - -#else /* __ASSEMBLY__ */ - -#include - -#define led_write(C0, C1, C2, C3) \ -do { \ - raw_led_write(LED_C2I(C0, C1, C2, C3)); \ -} while (0) - -static inline void raw_led_write(u32 data) -{ - writel(data, LED_ADDR); -} - -#endif /* __ASSEMBLY__ */ - -#else /* CONFIG_SUPPORT_CARD_LED_BASE */ - -#define led_write(C0, C1, C2, C3) -#define raw_led_write(x) - -#endif /* CONFIG_SUPPORT_CARD_LED_BASE */ - -#endif /* ARCH_LED_H */ diff --git a/arch/arm/mach-uniphier/include/mach/board.h b/arch/arm/mach-uniphier/include/mach/micro-support-card.h similarity index 88% rename from arch/arm/mach-uniphier/include/mach/board.h rename to arch/arm/mach-uniphier/include/mach/micro-support-card.h index 5b9af222ae1..5da0ada7261 100644 --- a/arch/arm/mach-uniphier/include/mach/board.h +++ b/arch/arm/mach-uniphier/include/mach/micro-support-card.h @@ -12,6 +12,7 @@ void support_card_reset(void); void support_card_init(void); void support_card_late_init(void); int check_support_card(void); +void led_puts(const char *s); #else static inline void support_card_reset(void) { @@ -29,6 +30,10 @@ static inline int check_support_card(void) { return 0; } + +static inline void led_puts(const char *s) +{ +} #endif #endif /* ARCH_BOARD_H */ diff --git a/arch/arm/mach-uniphier/lowlevel_init.S b/arch/arm/mach-uniphier/lowlevel_init.S index fd34a4a3219..9259bafed03 100644 --- a/arch/arm/mach-uniphier/lowlevel_init.S +++ b/arch/arm/mach-uniphier/lowlevel_init.S @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-uniphier/print_misc_info.c b/arch/arm/mach-uniphier/print_misc_info.c index 22ea5122852..5140b0c4383 100644 --- a/arch/arm/mach-uniphier/print_misc_info.c +++ b/arch/arm/mach-uniphier/print_misc_info.c @@ -5,7 +5,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include +#include int misc_init_f(void) { diff --git a/arch/arm/mach-uniphier/spl.c b/arch/arm/mach-uniphier/spl.c index 661d73ae4a4..f0df9b1e4e8 100644 --- a/arch/arm/mach-uniphier/spl.c +++ b/arch/arm/mach-uniphier/spl.c @@ -7,8 +7,7 @@ #include #include #include -#include -#include +#include void __weak bcu_init(void) { @@ -46,25 +45,25 @@ void spl_board_init(void) support_card_init(); - led_write(L, 0, , ); + led_puts("L0"); memconf_init(); - led_write(L, 1, , ); + led_puts("L1"); early_clkrst_init(); - led_write(L, 2, , ); + led_puts("L2"); early_pin_init(); - led_write(L, 3, , ); + led_puts("L3"); #ifdef CONFIG_SPL_SERIAL_SUPPORT preloader_console_init(); #endif - led_write(L, 4, , ); + led_puts("L4"); { int res; @@ -75,9 +74,10 @@ void spl_board_init(void) ; } } - led_write(L, 5, , ); + + led_puts("L5"); enable_dpll_ssc(); - led_write(L, 6, , ); + led_puts("L6"); } diff --git a/arch/arm/mach-uniphier/support_card.c b/arch/arm/mach-uniphier/support_card.c index ef4576de432..f8333060301 100644 --- a/arch/arm/mach-uniphier/support_card.c +++ b/arch/arm/mach-uniphier/support_card.c @@ -5,8 +5,9 @@ */ #include +#include #include -#include +#include #define MICRO_SUPPORT_CARD_RESET \ ((CONFIG_SUPPORT_CARD_BASE) + 0x000D0034) @@ -155,3 +156,73 @@ void support_card_late_init(void) { detect_num_flash_banks(); } + +static const u8 ledval_num[] = { + 0x7e, /* 0 */ + 0x0c, /* 1 */ + 0xb6, /* 2 */ + 0x9e, /* 3 */ + 0xcc, /* 4 */ + 0xda, /* 5 */ + 0xfa, /* 6 */ + 0x4e, /* 7 */ + 0xfe, /* 8 */ + 0xde, /* 9 */ +}; + +static const u8 ledval_alpha[] = { + 0xee, /* A */ + 0xf8, /* B */ + 0x72, /* C */ + 0xbc, /* D */ + 0xf2, /* E */ + 0xe2, /* F */ + 0x7a, /* G */ + 0xe8, /* H */ + 0x08, /* I */ + 0x3c, /* J */ + 0xea, /* K */ + 0x70, /* L */ + 0x6e, /* M */ + 0xa8, /* N */ + 0xb8, /* O */ + 0xe6, /* P */ + 0xce, /* Q */ + 0xa0, /* R */ + 0xc8, /* S */ + 0x8c, /* T */ + 0x7c, /* U */ + 0x54, /* V */ + 0xfc, /* W */ + 0xec, /* X */ + 0xdc, /* Y */ + 0xa4, /* Z */ +}; + +static u8 char2ledval(char c) +{ + if (isdigit(c)) + return ledval_num[c - '0']; + else if (isalpha(c)) + return ledval_alpha[toupper(c) - 'A']; + + return 0; +} + +void led_puts(const char *s) +{ + int i; + u32 val = 0; + + if (!s) + return; + + for (i = 0; i < 4; i++) { + val <<= 8; + val |= char2ledval(*s); + if (*s != '\0') + s++; + } + + writel(~val, CONFIG_SUPPORT_CARD_LED_BASE); +} From d7728aa408b478f83ec7f39ad80abf1046d71e39 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:32 +0900 Subject: [PATCH 22/33] ARM: uniphier: move CONFIG_SUPPORT_CARD_* macros to local file It is no longer necessary to define CONFIG_SUPPORT_CARD_* globally. Move them to a C file as local macros. Also, rename the C file. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/Makefile | 2 +- .../{support_card.c => micro-support-card.c} | 15 +++++++++------ include/configs/uniphier.h | 11 ++--------- 3 files changed, 12 insertions(+), 16 deletions(-) rename arch/arm/mach-uniphier/{support_card.c => micro-support-card.c} (90%) diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 5f175575e86..df6a569b9a4 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -29,7 +29,7 @@ endif obj-y += timer.o -obj-$(CONFIG_MICRO_SUPPORT_CARD) += support_card.o +obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o obj-$(CONFIG_MACH_PH1_SLD3) += ph1-sld3/ obj-$(CONFIG_MACH_PH1_LD4) += ph1-ld4/ diff --git a/arch/arm/mach-uniphier/support_card.c b/arch/arm/mach-uniphier/micro-support-card.c similarity index 90% rename from arch/arm/mach-uniphier/support_card.c rename to arch/arm/mach-uniphier/micro-support-card.c index f8333060301..4c34748c25c 100644 --- a/arch/arm/mach-uniphier/support_card.c +++ b/arch/arm/mach-uniphier/micro-support-card.c @@ -9,10 +9,13 @@ #include #include -#define MICRO_SUPPORT_CARD_RESET \ - ((CONFIG_SUPPORT_CARD_BASE) + 0x000D0034) -#define MICRO_SUPPORT_CARD_REVISION \ - ((CONFIG_SUPPORT_CARD_BASE) + 0x000D00E0) +#define MICRO_SUPPORT_CARD_BASE 0x43f00000 +#define SMC911X_BASE ((MICRO_SUPPORT_CARD_BASE) + 0x00000) +#define LED_BASE ((MICRO_SUPPORT_CARD_BASE) + 0x90000) +#define NS16550A_BASE ((MICRO_SUPPORT_CARD_BASE) + 0xb0000) +#define MICRO_SUPPORT_CARD_RESET ((MICRO_SUPPORT_CARD_BASE) + 0xd0034) +#define MICRO_SUPPORT_CARD_REVISION ((MICRO_SUPPORT_CARD_BASE) + 0xd00E0) + /* * 0: reset deassert, 1: reset * @@ -60,7 +63,7 @@ void support_card_init(void) int board_eth_init(bd_t *bis) { - return smc911x_initialize(0, CONFIG_SMC911X_BASE); + return smc911x_initialize(0, SMC911X_BASE); } #endif @@ -224,5 +227,5 @@ void led_puts(const char *s) s++; } - writel(~val, CONFIG_SUPPORT_CARD_LED_BASE); + writel(~val, LED_BASE); } diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index a15838b1725..64059612f32 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -59,14 +59,6 @@ #define CONFIG_I2C_EEPROM #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 -/* - * Support card address map - */ -#define CONFIG_SUPPORT_CARD_BASE 0x43f00000 -#define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000) -#define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00090000) -#define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x000b0000) - #ifdef CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_COM1 CONFIG_SUPPORT_CARD_UART_BASE @@ -81,7 +73,8 @@ #define CONFIG_SMC911X -#define CONFIG_SMC911X_BASE CONFIG_SUPPORT_CARD_ETHER_BASE +/* dummy: referenced by examples/standalone/smc911x_eeprom.c */ +#define CONFIG_SMC911X_BASE 0 #define CONFIG_SMC911X_32_BIT /*----------------------------------------------------------------------- From c8df23cf33571eda2cc22277a8f448e6221f8409 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:33 +0900 Subject: [PATCH 23/33] ARM: uniphier: allow to disable CONFIG_MICRO_SUPPORT_CARD Without this, build fails if CONFIG_MICRO_SUPPORT_CARD is disabled. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/spl.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-uniphier/spl.c b/arch/arm/mach-uniphier/spl.c index f0df9b1e4e8..4c3cad3b88b 100644 --- a/arch/arm/mach-uniphier/spl.c +++ b/arch/arm/mach-uniphier/spl.c @@ -13,6 +13,10 @@ void __weak bcu_init(void) { }; +void __weak sbc_init(void) +{ +}; + void __weak sg_init(void) { }; From 8497ccc4c23beae38130489d85c97ae38058f20b Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:34 +0900 Subject: [PATCH 24/33] ARM: uniphier: rename CONFIG_MACH_* to CONFIG_ARCH_UNIPHIER_* I want these prefixed with CONFIG_ARCH_UNIPHIER_ to clarify they belong to UniPhier SoC family. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/Kconfig | 14 +++++++------- arch/arm/mach-uniphier/Makefile | 8 ++++---- .../mach-uniphier/include/mach/ddrphy-regs.h | 3 ++- arch/arm/mach-uniphier/include/mach/sc-regs.h | 2 +- arch/arm/mach-uniphier/ph1-pro4/pll_init.c | 2 -- configs/ph1_ld4_defconfig | 2 +- configs/ph1_sld3_defconfig | 2 +- configs/ph1_sld8_defconfig | 2 +- drivers/pinctrl/uniphier/Kconfig | 12 ++++++------ include/configs/uniphier.h | 17 +++++++++-------- 10 files changed, 32 insertions(+), 32 deletions(-) diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 28d574fbb80..d7a19c6772c 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -8,20 +8,20 @@ config UNIPHIER_SMP choice prompt "UniPhier SoC select" - default MACH_PH1_PRO4 + default ARCH_UNIPHIER_PH1_PRO4 -config MACH_PH1_SLD3 +config ARCH_UNIPHIER_PH1_SLD3 bool "PH1-sLD3" select UNIPHIER_SMP -config MACH_PH1_LD4 +config ARCH_UNIPHIER_PH1_LD4 bool "PH1-LD4" -config MACH_PH1_PRO4 +config ARCH_UNIPHIER_PH1_PRO4 bool "PH1-Pro4" select UNIPHIER_SMP -config MACH_PH1_SLD8 +config ARCH_UNIPHIER_PH1_SLD8 bool "PH1-sLD8" endchoice @@ -53,11 +53,11 @@ choice config DDR_FREQ_1600 bool "DDR3 1600" - depends on MACH_PH1_SLD3 || MACH_PH1_LD4 || MACH_PH1_PRO4 + depends on ARCH_UNIPHIER_PH1_SLD3 || ARCH_UNIPHIER_PH1_LD4 || ARCH_UNIPHIER_PH1_PRO4 config DDR_FREQ_1333 bool "DDR3 1333" - depends on MACH_PH1_SLD3 || MACH_PH1_LD4 || MACH_PH1_SLD8 + depends on ARCH_UNIPHIER_PH1_SLD3 || ARCH_UNIPHIER_PH1_LD4 || ARCH_UNIPHIER_PH1_SLD8 endchoice diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index df6a569b9a4..d30cc27009b 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -31,7 +31,7 @@ obj-y += timer.o obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o -obj-$(CONFIG_MACH_PH1_SLD3) += ph1-sld3/ -obj-$(CONFIG_MACH_PH1_LD4) += ph1-ld4/ -obj-$(CONFIG_MACH_PH1_PRO4) += ph1-pro4/ -obj-$(CONFIG_MACH_PH1_SLD8) += ph1-sld8/ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += ph1-sld3/ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += ph1-ld4/ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += ph1-pro4/ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += ph1-sld8/ diff --git a/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h index fce0c01246b..01f5c52c9c4 100644 --- a/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h +++ b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h @@ -156,7 +156,8 @@ struct ddrphy { /* SoC-specific parameters */ #define NR_DATX8_PER_DDRPHY 2 -#if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8) +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ + defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) #define NR_DDRPHY_PER_CH 1 #else #define NR_DDRPHY_PER_CH 2 diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h index df502940779..9d697b16ee6 100644 --- a/arch/arm/mach-uniphier/include/mach/sc-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h @@ -9,7 +9,7 @@ #ifndef ARCH_SC_REGS_H #define ARCH_SC_REGS_H -#if defined(CONFIG_MACH_PH1_SLD3) +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) #define SC_BASE_ADDR 0xf1840000 #else #define SC_BASE_ADDR 0x61840000 diff --git a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c index d693368816c..8ae8ed65b87 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c @@ -54,12 +54,10 @@ static void vpll_init(void) tmp = readl(SG_PINMON0); clk_mode_axosel = tmp & SG_PINMON0_CLK_MODE_AXOSEL_MASK; -#if defined(CONFIG_MACH_PH1_PRO4) /* 25MHz or 6.25MHz is default for Pro4R, no need to set VPLLA/B */ if (clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ || clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_6250KHZ) return; -#endif /* Disable write protect of VPLL27ACTRL[2-7]*, VPLL27BCTRL[2-8] */ tmp = readl(SC_VPLL27ACTRL); diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index 899a7238f38..e1665c090c8 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_MACH_PH1_LD4=y +CONFIG_ARCH_UNIPHIER_PH1_LD4=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref" diff --git a/configs/ph1_sld3_defconfig b/configs/ph1_sld3_defconfig index 79ce0e28cde..4b871d0ebd5 100644 --- a/configs/ph1_sld3_defconfig +++ b/configs/ph1_sld3_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y -CONFIG_MACH_PH1_SLD3=y +CONFIG_ARCH_UNIPHIER_PH1_SLD3=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld3-ref" diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 216d49be124..00917fbc515 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_MACH_PH1_SLD8=y +CONFIG_ARCH_UNIPHIER_PH1_SLD8=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref" diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 757edce178f..2ff616e9463 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -5,37 +5,37 @@ config PINCTRL_UNIPHIER_CORE config PINCTRL_UNIPHIER_PH1_LD4 bool "UniPhier PH1-LD4 SoC pinctrl driver" - depends on MACH_PH1_LD4 + depends on ARCH_UNIPHIER_PH1_LD4 default y select PINCTRL_UNIPHIER_CORE config PINCTRL_UNIPHIER_PH1_PRO4 bool "UniPhier PH1-Pro4 SoC pinctrl driver" - depends on MACH_PH1_PRO4 + depends on ARCH_UNIPHIER_PH1_PRO4 default y select PINCTRL_UNIPHIER_CORE config PINCTRL_UNIPHIER_PH1_SLD8 bool "UniPhier PH1-sLD8 SoC pinctrl driver" - depends on MACH_PH1_SLD8 + depends on ARCH_UNIPHIER_PH1_SLD8 default y select PINCTRL_UNIPHIER_CORE config PINCTRL_UNIPHIER_PH1_PRO5 bool "UniPhier PH1-Pro5 SoC pinctrl driver" - depends on MACH_PH1_PRO5 + depends on ARCH_UNIPHIER_PH1_PRO5 default y select PINCTRL_UNIPHIER_CORE config PINCTRL_UNIPHIER_PROXSTREAM2 bool "UniPhier ProXstream2 SoC pinctrl driver" - depends on MACH_PROXSTREAM2 + depends on ARCH_UNIPHIER_PROXSTREAM2 default y select PINCTRL_UNIPHIER_CORE config PINCTRL_UNIPHIER_PH1_LD6B bool "UniPhier PH1-LD6b SoC pinctrl driver" - depends on MACH_PH1_LD6B + depends on ARCH_UNIPHIER_PH1_LD6B default y select PINCTRL_UNIPHIER_CORE diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 64059612f32..bd0769e6d92 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -9,7 +9,7 @@ #ifndef __CONFIG_UNIPHIER_COMMON_H__ #define __CONFIG_UNIPHIER_COMMON_H__ -#if defined(CONFIG_MACH_PH1_SLD3) +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) #define CONFIG_DDR_NUM_CH0 2 #define CONFIG_DDR_NUM_CH1 1 #define CONFIG_DDR_NUM_CH2 1 @@ -23,7 +23,7 @@ #define CONFIG_SDRAM2_SIZE 0x10000000 #endif -#if defined(CONFIG_MACH_PH1_LD4) +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) #define CONFIG_DDR_NUM_CH0 1 #define CONFIG_DDR_NUM_CH1 1 @@ -34,7 +34,7 @@ #define CONFIG_SDRAM1_SIZE 0x10000000 #endif -#if defined(CONFIG_MACH_PH1_PRO4) +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) #define CONFIG_DDR_NUM_CH0 2 #define CONFIG_DDR_NUM_CH1 2 @@ -45,7 +45,7 @@ #define CONFIG_SDRAM1_SIZE 0x20000000 #endif -#if defined(CONFIG_MACH_PH1_SLD8) +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) #define CONFIG_DDR_NUM_CH0 1 #define CONFIG_DDR_NUM_CH1 1 @@ -175,7 +175,7 @@ #define CONFIG_NAND_DENALI_ECC_SIZE 1024 -#ifdef CONFIG_MACH_PH1_SLD3 +#ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD3 #define CONFIG_SYS_NAND_REGS_BASE 0xf8100000 #define CONFIG_SYS_NAND_DATA_BASE 0xf8000000 #else @@ -291,11 +291,12 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_NR_DRAM_BANKS 2 -#if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \ - defined(CONFIG_MACH_PH1_SLD8) +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) || \ + defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ + defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) #define CONFIG_SPL_TEXT_BASE 0x00040000 #endif -#if defined(CONFIG_MACH_PH1_PRO4) +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) #define CONFIG_SPL_TEXT_BASE 0x00100000 #endif From 257b11f32d0ba451b8b7eba72f0db5e182d425dd Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:35 +0900 Subject: [PATCH 25/33] ARM: uniphier: delete unneeded input enable for low-level debug The UART I/O ports for PH1-Pro4 has no input enable controlling. This code is useless. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S index 19bef2a1575..ce5dd4b15d5 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S @@ -30,10 +30,5 @@ ENTRY(setup_lowlevel_debug) mov r1, #1 str r1, [r0] - ldr r0, =SG_IECTRL - ldr r1, [r0] - orr r1, r1, #1 - str r1, [r0] - mov pc, lr ENDPROC(setup_lowlevel_debug) From fcbcd59730255018dbe78af9294598273a85a0de Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:36 +0900 Subject: [PATCH 26/33] ARM: uniphier: fix glitch signal problem for low-level debug Currently, IECTRL is enabled after pin-mux settings for the low-level debugging for PH1-LD4 and PH1-sLD8. While IECTRL is disabled, input signals are pulled-down, i.e. glitch signal (Low to High transition) problem occurs if pin-mux is set up first. As a result, one invalid character is input to the UART block and the auto-boot counting is terminated immediately. The correct initialization procedure is: [1] Enable IECTRL (if IECTRL exists for the pins) [2] Set up pin-muxing [3] Deassert the reset of the hardware block Currently, the low-level debugging is working for PH1-sLD3 and PH1-Pro4, but just in case, follow the sequence for all the SoCs. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S | 12 ++++++------ arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S | 14 +++++++------- arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S | 6 +++--- arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S | 12 ++++++------ 4 files changed, 22 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S index fd393dcfb3c..c0f14e08b18 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S @@ -14,16 +14,16 @@ #include ENTRY(setup_lowlevel_debug) - init_debug_uart r0, r1, r2 - - /* UART Port 0 */ - sg_set_pinsel 85, 1, 8, 4, r0, r1 - sg_set_pinsel 88, 1, 8, 4, r0, r1 - ldr r0, =SG_IECTRL ldr r1, [r0] orr r1, r1, #1 str r1, [r0] + /* UART Port 0 */ + sg_set_pinsel 85, 1, 8, 4, r0, r1 + sg_set_pinsel 88, 1, 8, 4, r0, r1 + + init_debug_uart r0, r1, r2 + mov pc, lr ENDPROC(setup_lowlevel_debug) diff --git a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S index ce5dd4b15d5..56f38510439 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S @@ -15,13 +15,6 @@ #include ENTRY(setup_lowlevel_debug) - ldr r0, =SC_CLKCTRL - ldr r1, [r0] - orr r1, r1, #SC_CLKCTRL_CEN_PERI - str r1, [r0] - - init_debug_uart r0, r1, r2 - /* UART Port 0 */ sg_set_pinsel 127, 0, 4, 8, r0, r1 sg_set_pinsel 128, 0, 4, 8, r0, r1 @@ -30,5 +23,12 @@ ENTRY(setup_lowlevel_debug) mov r1, #1 str r1, [r0] + ldr r0, =SC_CLKCTRL + ldr r1, [r0] + orr r1, r1, #SC_CLKCTRL_CEN_PERI + str r1, [r0] + + init_debug_uart r0, r1, r2 + mov pc, lr ENDPROC(setup_lowlevel_debug) diff --git a/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S index ee2eae6bf7e..f4eccb46123 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S @@ -15,6 +15,9 @@ #include ENTRY(setup_lowlevel_debug) + sg_set_pinsel 63, 0, 4, 4, r0, r1 + sg_set_pinsel 64, 1, 4, 4, r0, r1 + ldr r0, =BCSCR5 ldr r1, =0x24440000 str r1, [r0] @@ -26,8 +29,5 @@ ENTRY(setup_lowlevel_debug) init_debug_uart r0, r1, r2 - sg_set_pinsel 63, 0, 4, 4, r0, r1 - sg_set_pinsel 64, 1, 4, 4, r0, r1 - mov pc, lr ENDPROC(setup_lowlevel_debug) diff --git a/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S index 3ada4c99481..571ce60698b 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S @@ -14,16 +14,16 @@ #include ENTRY(setup_lowlevel_debug) - init_debug_uart r0, r1, r2 - - /* UART Port 0 */ - sg_set_pinsel 70, 3, 8, 4, r0, r1 - sg_set_pinsel 71, 3, 8, 4, r0, r1 - ldr r0, =SG_IECTRL ldr r1, [r0] orr r1, r1, #1 str r1, [r0] + /* UART Port 0 */ + sg_set_pinsel 70, 3, 8, 4, r0, r1 + sg_set_pinsel 71, 3, 8, 4, r0, r1 + + init_debug_uart r0, r1, r2 + mov pc, lr ENDPROC(setup_lowlevel_debug) From e6eecca54ffb99ee6877c0e29b0b389a481fcd85 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:37 +0900 Subject: [PATCH 27/33] ARM: uniphier: unify low-level debug init code Move init code of low-level debug into a single file. This is helpful to create an image that runs on multiple SoCs. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/Makefile | 2 + arch/arm/mach-uniphier/debug_ll.S | 112 ++++++++++++++++++ .../mach-uniphier/include/mach/debug-uart.S | 23 ---- arch/arm/mach-uniphier/lowlevel_init.S | 2 +- arch/arm/mach-uniphier/ph1-ld4/Makefile | 1 - .../mach-uniphier/ph1-ld4/lowlevel_debug.S | 29 ----- arch/arm/mach-uniphier/ph1-pro4/Makefile | 1 - .../mach-uniphier/ph1-pro4/lowlevel_debug.S | 34 ------ arch/arm/mach-uniphier/ph1-sld3/Makefile | 1 - .../mach-uniphier/ph1-sld3/lowlevel_debug.S | 33 ------ .../mach-uniphier/ph1-sld8/lowlevel_debug.S | 29 ----- 11 files changed, 115 insertions(+), 152 deletions(-) create mode 100644 arch/arm/mach-uniphier/debug_ll.S delete mode 100644 arch/arm/mach-uniphier/include/mach/debug-uart.S delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S delete mode 100644 arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S delete mode 100644 arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index d30cc27009b..5c2ccbd7a88 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -10,6 +10,8 @@ obj-y += spl.o obj-y += memconf.o obj-y += ddrphy_training.o +obj-$(CONFIG_DEBUG_LL) += debug_ll.o + else obj-y += late_lowlevel_init.o diff --git a/arch/arm/mach-uniphier/debug_ll.S b/arch/arm/mach-uniphier/debug_ll.S new file mode 100644 index 00000000000..d5ccad3244c --- /dev/null +++ b/arch/arm/mach-uniphier/debug_ll.S @@ -0,0 +1,112 @@ +/* + * On-chip UART initializaion for low-level debugging + * + * Copyright (C) 2014-2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +#if !defined(CONFIG_DEBUG_SEMIHOSTING) +#include CONFIG_DEBUG_LL_INCLUDE +#endif + +#define BAUDRATE 115200 +#define DIV_ROUND(x, d) (((x) + ((d) / 2)) / (d)) + +ENTRY(debug_ll_init) + ldr r0, =SG_REVISION + ldr r1, [r0] + and r1, r1, #SG_REVISION_TYPE_MASK + mov r1, r1, lsr #SG_REVISION_TYPE_SHIFT + +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) +#define PH1_SLD3_UART_CLK 36864000 + cmp r1, #0x25 + bne ph1_sld3_end + + sg_set_pinsel 64, 1, 4, 4, r0, r1 @ TXD0 -> TXD0 + + ldr r0, =BCSCR5 + ldr r1, =0x24440000 + str r1, [r0] + + ldr r0, =SC_CLKCTRL + ldr r1, [r0] + orr r1, r1, #SC_CLKCTRL_CEN_PERI + str r1, [r0] + + ldr r3, =DIV_ROUND(PH1_SLD3_UART_CLK, 16 * BAUDRATE) + + b init_uart +ph1_sld3_end: +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) +#define PH1_LD4_UART_CLK 36864000 + cmp r1, #0x26 + bne ph1_ld4_end + + ldr r0, =SG_IECTRL + ldr r1, [r0] + orr r1, r1, #1 + str r1, [r0] + + sg_set_pinsel 88, 1, 8, 4, r0, r1 @ HSDOUT6 -> TXD0 + + ldr r3, =DIV_ROUND(PH1_LD4_UART_CLK, 16 * BAUDRATE) + + b init_uart +ph1_ld4_end: +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) +#define PH1_PRO4_UART_CLK 73728000 + cmp r1, #0x28 + bne ph1_pro4_end + + sg_set_pinsel 128, 0, 4, 8, r0, r1 @ TXD0 -> TXD0 + + ldr r0, =SG_LOADPINCTRL + mov r1, #1 + str r1, [r0] + + ldr r0, =SC_CLKCTRL + ldr r1, [r0] + orr r1, r1, #SC_CLKCTRL_CEN_PERI + str r1, [r0] + + ldr r3, =DIV_ROUND(PH1_PRO4_UART_CLK, 16 * BAUDRATE) + + b init_uart +ph1_pro4_end: +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) +#define PH1_SLD8_UART_CLK 80000000 + cmp r1, #0x29 + bne ph1_sld8_end + + ldr r0, =SG_IECTRL + ldr r1, [r0] + orr r1, r1, #1 + str r1, [r0] + + sg_set_pinsel 70, 3, 8, 4, r0, r1 @ HSDOUT0 -> TXD0 + + ldr r3, =DIV_ROUND(PH1_SLD8_UART_CLK, 16 * BAUDRATE) + + b init_uart +ph1_sld8_end: +#endif + +init_uart: + addruart r0, r1, r2 + mov r1, #UART_LCR_WLEN8 << 8 + str r1, [r0, #0x10] + str r3, [r0, #0x24] + + mov pc, lr +ENDPROC(debug_ll_init) diff --git a/arch/arm/mach-uniphier/include/mach/debug-uart.S b/arch/arm/mach-uniphier/include/mach/debug-uart.S deleted file mode 100644 index d2b431f5443..00000000000 --- a/arch/arm/mach-uniphier/include/mach/debug-uart.S +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (C) 2014-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include - -#if !defined(CONFIG_DEBUG_SEMIHOSTING) -#include CONFIG_DEBUG_LL_INCLUDE -#endif - -#define BAUDRATE 115200 -#define DIV_ROUND(x, d) (((x) + ((d) / 2)) / (d)) -#define DIVISOR DIV_ROUND(UART_CLK, 16 * BAUDRATE) - - .macro init_debug_uart, ra, rb, rc - addruart \ra, \rb, \rc - mov \rb, #UART_LCR_WLEN8 << 8 - str \rb, [\ra, #0x10] - ldr \rb, =DIVISOR - str \rb, [\ra, #0x24] - .endm diff --git a/arch/arm/mach-uniphier/lowlevel_init.S b/arch/arm/mach-uniphier/lowlevel_init.S index 9259bafed03..66cad42ddeb 100644 --- a/arch/arm/mach-uniphier/lowlevel_init.S +++ b/arch/arm/mach-uniphier/lowlevel_init.S @@ -27,7 +27,7 @@ ENTRY(lowlevel_init) mcr p15, 0, r0, c1, c0, 0 #ifdef CONFIG_DEBUG_LL - bl setup_lowlevel_debug + bl debug_ll_init #endif /* diff --git a/arch/arm/mach-uniphier/ph1-ld4/Makefile b/arch/arm/mach-uniphier/ph1-ld4/Makefile index 4a2c944aeef..4b9fe91fb03 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/Makefile +++ b/arch/arm/mach-uniphier/ph1-ld4/Makefile @@ -3,7 +3,6 @@ # ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += bcu_init.o pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o diff --git a/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S deleted file mode 100644 index c0f14e08b18..00000000000 --- a/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S +++ /dev/null @@ -1,29 +0,0 @@ -/* - * On-chip UART initializaion for low-level debugging - * - * Copyright (C) 2014 Panasonic Corporation - * Author: Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -#define UART_CLK 36864000 -#include - -ENTRY(setup_lowlevel_debug) - ldr r0, =SG_IECTRL - ldr r1, [r0] - orr r1, r1, #1 - str r1, [r0] - - /* UART Port 0 */ - sg_set_pinsel 85, 1, 8, 4, r0, r1 - sg_set_pinsel 88, 1, 8, 4, r0, r1 - - init_debug_uart r0, r1, r2 - - mov pc, lr -ENDPROC(setup_lowlevel_debug) diff --git a/arch/arm/mach-uniphier/ph1-pro4/Makefile b/arch/arm/mach-uniphier/ph1-pro4/Makefile index a52b5aa5565..e8b2c9e8ac2 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/Makefile +++ b/arch/arm/mach-uniphier/ph1-pro4/Makefile @@ -3,7 +3,6 @@ # ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o diff --git a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S deleted file mode 100644 index 56f38510439..00000000000 --- a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S +++ /dev/null @@ -1,34 +0,0 @@ -/* - * On-chip UART initializaion for low-level debugging - * - * Copyright (C) 2014 Panasonic Corporation - * Author: Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -#define UART_CLK 73728000 -#include - -ENTRY(setup_lowlevel_debug) - /* UART Port 0 */ - sg_set_pinsel 127, 0, 4, 8, r0, r1 - sg_set_pinsel 128, 0, 4, 8, r0, r1 - - ldr r0, =SG_LOADPINCTRL - mov r1, #1 - str r1, [r0] - - ldr r0, =SC_CLKCTRL - ldr r1, [r0] - orr r1, r1, #SC_CLKCTRL_CEN_PERI - str r1, [r0] - - init_debug_uart r0, r1, r2 - - mov pc, lr -ENDPROC(setup_lowlevel_debug) diff --git a/arch/arm/mach-uniphier/ph1-sld3/Makefile b/arch/arm/mach-uniphier/ph1-sld3/Makefile index e3cb39fa50d..48a3756c1d0 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/Makefile +++ b/arch/arm/mach-uniphier/ph1-sld3/Makefile @@ -3,7 +3,6 @@ # ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o obj-y += bcu_init.o memconf.o sg_init.o pll_init.o early_clkrst_init.o \ early_pinctrl.o pll_spectrum.o umc_init.o obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o diff --git a/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S deleted file mode 100644 index f4eccb46123..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S +++ /dev/null @@ -1,33 +0,0 @@ -/* - * On-chip UART initializaion for low-level debugging - * - * Copyright (C) 2014-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -#define UART_CLK 36864000 -#include - -ENTRY(setup_lowlevel_debug) - sg_set_pinsel 63, 0, 4, 4, r0, r1 - sg_set_pinsel 64, 1, 4, 4, r0, r1 - - ldr r0, =BCSCR5 - ldr r1, =0x24440000 - str r1, [r0] - - ldr r0, =SC_CLKCTRL - ldr r1, [r0] - orr r1, r1, #SC_CLKCTRL_CEN_PERI - str r1, [r0] - - init_debug_uart r0, r1, r2 - - mov pc, lr -ENDPROC(setup_lowlevel_debug) diff --git a/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S deleted file mode 100644 index 571ce60698b..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S +++ /dev/null @@ -1,29 +0,0 @@ -/* - * On-chip UART initializaion for low-level debugging - * - * Copyright (C) 2014 Panasonic Corporation - * Author: Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -#define UART_CLK 80000000 -#include - -ENTRY(setup_lowlevel_debug) - ldr r0, =SG_IECTRL - ldr r1, [r0] - orr r1, r1, #1 - str r1, [r0] - - /* UART Port 0 */ - sg_set_pinsel 70, 3, 8, 4, r0, r1 - sg_set_pinsel 71, 3, 8, 4, r0, r1 - - init_debug_uart r0, r1, r2 - - mov pc, lr -ENDPROC(setup_lowlevel_debug) From 5451b777de392043c03626f6cbbc3940c49c3417 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:38 +0900 Subject: [PATCH 28/33] ARM: uniphier: remove kernel parameter settings from environment Currently, console=ttyS0 is hard-coded in CONFIG_EXTRA_ENV_SETTINGS and it replaces the bootargs in the chosen node of the device tree passed to the kernel. This is not preferable because I am going to add some boards whose console is not ttyS0. Drop bootargs settings from U-Boot's environment and use the one in device tree by default. Signed-off-by: Masahiro Yamada --- include/configs/uniphier.h | 22 ++++++---------------- 1 file changed, 6 insertions(+), 16 deletions(-) diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index bd0769e6d92..f44c58bf9d0 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -224,22 +224,17 @@ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ "tftpboot; bootm;" -#define CONFIG_BOOTARGS " earlyprintk loglevel=8" - #ifdef CONFIG_FIT #define CONFIG_BOOTFILE "fitImage" #define LINUXBOOT_ENV_SETTINGS \ "fit_addr=0x00100000\0" \ "fit_addr_r=0x84100000\0" \ "fit_size=0x00f00000\0" \ - "norboot=run add_default_bootargs &&" \ - "setexpr fit_addr $nor_base + $fit_addr &&" \ + "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \ "bootm $fit_addr\0" \ - "nandboot=run add_default_bootargs &&" \ - "nand read $fit_addr_r $fit_addr $fit_size &&" \ + "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \ "bootm $fit_addr_r\0" \ - "tftpboot=run add_default_bootargs &&" \ - "tftpboot $fit_addr_r $bootfile &&" \ + "tftpboot=tftpboot $fit_addr_r $bootfile &&" \ "bootm $fit_addr_r\0" #else #define CONFIG_BOOTFILE "uImage" @@ -255,18 +250,15 @@ "ramdisk_addr_r=0x84a00000\0" \ "ramdisk_size=0x00600000\0" \ "ramdisk_file=rootfs.cpio.uboot\0" \ - "norboot=run add_default_bootargs &&" \ - "setexpr kernel_addr $nor_base + $kernel_addr &&" \ + "norboot=setexpr kernel_addr $nor_base + $kernel_addr &&" \ "setexpr ramdisk_addr $nor_base + $ramdisk_addr &&" \ "setexpr fdt_addr $nor_base + $fdt_addr &&" \ "bootm $kernel_addr $ramdisk_addr $fdt_addr\0" \ - "nandboot=run add_default_bootargs &&" \ - "nand read $kernel_addr_r $kernel_addr $kernel_size &&" \ + "nandboot=nand read $kernel_addr_r $kernel_addr $kernel_size &&" \ "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \ "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \ "bootm $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ - "tftpboot=run add_default_bootargs &&" \ - "tftpboot $kernel_addr_r $bootfile &&" \ + "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \ "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ "tftpboot $fdt_addr_r $fdt_file &&" \ "bootm $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" @@ -281,8 +273,6 @@ "nand write $loadaddr 0 0x00010000 &&" \ "tftpboot u-boot-dtb.img &&" \ "nand write $loadaddr 0x00010000 0x000f0000\0" \ - "add_default_bootargs=setenv bootargs $bootargs" \ - " console=ttyS0,$baudrate\0" \ LINUXBOOT_ENV_SETTINGS /* Open Firmware flat tree */ From 323d1f9d5bebfe55e97e23c8094055685665afef Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:39 +0900 Subject: [PATCH 29/33] ARM: uniphier: allow to enable multiple SoCs Before this commit, the Kconfig menu in mach-uniphier only allowed us to choose one SoC to be compiled. Each SoC has its own defconfig file for the build-test coverage. Consequently, some defconfig files are duplicated with only the difference in CONFIG_DEFAULT_DEVICE_TREE and CONFIG_{SOC_NAME}=y. Now, most of board-specific parameters have been moved to device trees, so it makes sense to include init code of multiple SoCs into a single image as long as the SoCs have similar architecture. In fact, some SoCs of UniPhier family are very similar: - PH1-LD4 and PH1-sLD8 - PH1-LD6b and ProXstream2 (will be added in the upcoming commit) This commit will be helpful to merge some defconfig files for better maintainability. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/Kconfig | 45 +++----- arch/arm/mach-uniphier/Makefile | 16 +-- arch/arm/mach-uniphier/bcu/Makefile | 3 + .../{ph1-ld4/bcu_init.c => bcu/bcu-ph1-ld4.c} | 8 +- .../bcu_init.c => bcu/bcu-ph1-sld3.c} | 8 +- arch/arm/mach-uniphier/board_early_init_f.c | 42 +++++-- arch/arm/mach-uniphier/boards.c | 93 ++++++++++++++++ arch/arm/mach-uniphier/boot-mode/Makefile | 6 + .../boot-mode-ph1-ld4.c} | 21 +++- .../boot-mode-ph1-sld3.c} | 23 ++-- arch/arm/mach-uniphier/boot-mode/boot-mode.c | 35 ++++++ arch/arm/mach-uniphier/clk/Makefile | 4 + .../clkrst_init.c => clk/clk-ph1-ld4.c} | 3 +- .../clkrst_init.c => clk/clk-ph1-pro4.c} | 3 +- arch/arm/mach-uniphier/cmd_pinmon.c | 31 ++++-- arch/arm/mach-uniphier/ddrphy/Makefile | 3 + .../ddrphy_init.c => ddrphy/ddrphy-ph1-ld4.c} | 4 +- .../ddrphy-ph1-pro4.c} | 4 +- .../ddrphy-ph1-sld8.c} | 4 +- .../ddrphy-training.c} | 0 arch/arm/mach-uniphier/early-clk/Makefile | 4 + .../early-clk-ph1-ld4.c} | 5 +- arch/arm/mach-uniphier/early-pinctrl/Makefile | 1 + .../early-pinctrl-ph1-sld3.c} | 5 +- .../mach-uniphier/include/mach/boot-device.h | 11 +- .../mach-uniphier/include/mach/ddrphy-regs.h | 4 +- arch/arm/mach-uniphier/include/mach/init.h | 83 ++++++++++++++ arch/arm/mach-uniphier/include/mach/sg-regs.h | 6 + .../arm/mach-uniphier/include/mach/soc_info.h | 63 +++++++++++ arch/arm/mach-uniphier/init/Makefile | 6 + .../{spl.c => init/init-ph1-ld4.c} | 49 ++------- arch/arm/mach-uniphier/init/init-ph1-pro4.c | 58 ++++++++++ arch/arm/mach-uniphier/init/init-ph1-sld3.c | 53 +++++++++ arch/arm/mach-uniphier/init/init-ph1-sld8.c | 60 ++++++++++ arch/arm/mach-uniphier/init/init.c | 46 ++++++++ arch/arm/mach-uniphier/memconf.c | 103 ----------------- arch/arm/mach-uniphier/memconf/Makefile | 2 + .../mach-uniphier/memconf/memconf-ph1-sld3.c | 59 ++++++++++ arch/arm/mach-uniphier/memconf/memconf.c | 104 ++++++++++++++++++ arch/arm/mach-uniphier/ph1-ld4/Makefile | 13 --- arch/arm/mach-uniphier/ph1-ld4/boot-mode.c | 1 - .../mach-uniphier/ph1-ld4/early_clkrst_init.c | 1 - arch/arm/mach-uniphier/ph1-ld4/pll_spectrum.c | 1 - arch/arm/mach-uniphier/ph1-pro4/Makefile | 13 --- arch/arm/mach-uniphier/ph1-sld3/Makefile | 13 --- arch/arm/mach-uniphier/ph1-sld3/clkrst_init.c | 1 - .../ph1-sld3/early_clkrst_init.c | 1 - arch/arm/mach-uniphier/ph1-sld3/memconf.c | 52 --------- arch/arm/mach-uniphier/ph1-sld3/sg_init.c | 9 -- arch/arm/mach-uniphier/ph1-sld3/umc_init.c | 15 --- arch/arm/mach-uniphier/ph1-sld8/Makefile | 1 - arch/arm/mach-uniphier/ph1-sld8/bcu_init.c | 1 - arch/arm/mach-uniphier/ph1-sld8/boot-mode.c | 1 - arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c | 1 - .../ph1-sld8/early_clkrst_init.c | 1 - .../arm/mach-uniphier/ph1-sld8/pll_spectrum.c | 1 - arch/arm/mach-uniphier/ph1-sld8/sbc_init.c | 1 - arch/arm/mach-uniphier/pinctrl/Makefile | 4 + .../pinctrl.c => pinctrl/pinctrl-ph1-ld4.c} | 3 +- .../pinctrl.c => pinctrl/pinctrl-ph1-pro4.c} | 3 +- .../pinctrl.c => pinctrl/pinctrl-ph1-sld3.c} | 3 +- .../pinctrl.c => pinctrl/pinctrl-ph1-sld8.c} | 3 +- arch/arm/mach-uniphier/pll/Makefile | 8 ++ .../pll_init.c => pll/pll-init-ph1-ld4.c} | 34 ++++-- .../pll_init.c => pll/pll-init-ph1-pro4.c} | 34 ++++-- .../pll_init.c => pll/pll-init-ph1-sld3.c} | 5 +- .../pll_init.c => pll/pll-init-ph1-sld8.c} | 5 +- .../pll-spectrum-ph1-ld4.c} | 6 +- .../pll-spectrum-ph1-sld3.c} | 5 +- arch/arm/mach-uniphier/sbc/Makefile | 4 + .../{ph1-ld4/sbc_init.c => sbc/sbc-ph1-ld4.c} | 5 +- .../sbc_init.c => sbc/sbc-ph1-pro4.c} | 5 +- .../sbc_init.c => sbc/sbc-ph1-sld3.c} | 5 +- arch/arm/mach-uniphier/soc_info.c | 61 ++++++++++ arch/arm/mach-uniphier/umc/Makefile | 3 + .../{ph1-ld4/umc_init.c => umc/umc-ph1-ld4.c} | 30 ++--- .../umc_init.c => umc/umc-ph1-pro4.c} | 36 +++--- .../umc_init.c => umc/umc-ph1-sld8.c} | 30 ++--- configs/ph1_pro4_defconfig | 1 + include/configs/uniphier.h | 50 +-------- 80 files changed, 1070 insertions(+), 478 deletions(-) create mode 100644 arch/arm/mach-uniphier/bcu/Makefile rename arch/arm/mach-uniphier/{ph1-ld4/bcu_init.c => bcu/bcu-ph1-ld4.c} (84%) rename arch/arm/mach-uniphier/{ph1-sld3/bcu_init.c => bcu/bcu-ph1-sld3.c} (84%) create mode 100644 arch/arm/mach-uniphier/boards.c create mode 100644 arch/arm/mach-uniphier/boot-mode/Makefile rename arch/arm/mach-uniphier/{ph1-pro4/boot-mode.c => boot-mode/boot-mode-ph1-ld4.c} (88%) rename arch/arm/mach-uniphier/{ph1-sld3/boot-mode.c => boot-mode/boot-mode-ph1-sld3.c} (89%) create mode 100644 arch/arm/mach-uniphier/boot-mode/boot-mode.c create mode 100644 arch/arm/mach-uniphier/clk/Makefile rename arch/arm/mach-uniphier/{ph1-ld4/clkrst_init.c => clk/clk-ph1-ld4.c} (94%) rename arch/arm/mach-uniphier/{ph1-pro4/clkrst_init.c => clk/clk-ph1-pro4.c} (96%) create mode 100644 arch/arm/mach-uniphier/ddrphy/Makefile rename arch/arm/mach-uniphier/{ph1-ld4/ddrphy_init.c => ddrphy/ddrphy-ph1-ld4.c} (95%) rename arch/arm/mach-uniphier/{ph1-pro4/ddrphy_init.c => ddrphy/ddrphy-ph1-pro4.c} (95%) rename arch/arm/mach-uniphier/{ph1-sld8/ddrphy_init.c => ddrphy/ddrphy-ph1-sld8.c} (95%) rename arch/arm/mach-uniphier/{ddrphy_training.c => ddrphy/ddrphy-training.c} (100%) create mode 100644 arch/arm/mach-uniphier/early-clk/Makefile rename arch/arm/mach-uniphier/{ph1-pro4/early_clkrst_init.c => early-clk/early-clk-ph1-ld4.c} (86%) create mode 100644 arch/arm/mach-uniphier/early-pinctrl/Makefile rename arch/arm/mach-uniphier/{ph1-sld3/early_pinctrl.c => early-pinctrl/early-pinctrl-ph1-sld3.c} (82%) create mode 100644 arch/arm/mach-uniphier/include/mach/init.h create mode 100644 arch/arm/mach-uniphier/include/mach/soc_info.h create mode 100644 arch/arm/mach-uniphier/init/Makefile rename arch/arm/mach-uniphier/{spl.c => init/init-ph1-ld4.c} (50%) create mode 100644 arch/arm/mach-uniphier/init/init-ph1-pro4.c create mode 100644 arch/arm/mach-uniphier/init/init-ph1-sld3.c create mode 100644 arch/arm/mach-uniphier/init/init-ph1-sld8.c create mode 100644 arch/arm/mach-uniphier/init/init.c delete mode 100644 arch/arm/mach-uniphier/memconf.c create mode 100644 arch/arm/mach-uniphier/memconf/Makefile create mode 100644 arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c create mode 100644 arch/arm/mach-uniphier/memconf/memconf.c delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/Makefile delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/boot-mode.c delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/early_clkrst_init.c delete mode 100644 arch/arm/mach-uniphier/ph1-ld4/pll_spectrum.c delete mode 100644 arch/arm/mach-uniphier/ph1-pro4/Makefile delete mode 100644 arch/arm/mach-uniphier/ph1-sld3/Makefile delete mode 100644 arch/arm/mach-uniphier/ph1-sld3/clkrst_init.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld3/early_clkrst_init.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld3/memconf.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld3/sg_init.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld3/umc_init.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/Makefile delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/bcu_init.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/boot-mode.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/early_clkrst_init.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/pll_spectrum.c delete mode 100644 arch/arm/mach-uniphier/ph1-sld8/sbc_init.c create mode 100644 arch/arm/mach-uniphier/pinctrl/Makefile rename arch/arm/mach-uniphier/{ph1-ld4/pinctrl.c => pinctrl/pinctrl-ph1-ld4.c} (97%) rename arch/arm/mach-uniphier/{ph1-pro4/pinctrl.c => pinctrl/pinctrl-ph1-pro4.c} (97%) rename arch/arm/mach-uniphier/{ph1-sld3/pinctrl.c => pinctrl/pinctrl-ph1-sld3.c} (91%) rename arch/arm/mach-uniphier/{ph1-sld8/pinctrl.c => pinctrl/pinctrl-ph1-sld8.c} (96%) create mode 100644 arch/arm/mach-uniphier/pll/Makefile rename arch/arm/mach-uniphier/{ph1-ld4/pll_init.c => pll/pll-init-ph1-ld4.c} (90%) rename arch/arm/mach-uniphier/{ph1-pro4/pll_init.c => pll/pll-init-ph1-pro4.c} (88%) rename arch/arm/mach-uniphier/{ph1-sld3/pll_init.c => pll/pll-init-ph1-sld3.c} (62%) rename arch/arm/mach-uniphier/{ph1-sld8/pll_init.c => pll/pll-init-ph1-sld8.c} (97%) rename arch/arm/mach-uniphier/{ph1-pro4/pll_spectrum.c => pll/pll-spectrum-ph1-ld4.c} (72%) rename arch/arm/mach-uniphier/{ph1-sld3/pll_spectrum.c => pll/pll-spectrum-ph1-sld3.c} (73%) create mode 100644 arch/arm/mach-uniphier/sbc/Makefile rename arch/arm/mach-uniphier/{ph1-ld4/sbc_init.c => sbc/sbc-ph1-ld4.c} (92%) rename arch/arm/mach-uniphier/{ph1-pro4/sbc_init.c => sbc/sbc-ph1-pro4.c} (91%) rename arch/arm/mach-uniphier/{ph1-sld3/sbc_init.c => sbc/sbc-ph1-sld3.c} (92%) create mode 100644 arch/arm/mach-uniphier/soc_info.c create mode 100644 arch/arm/mach-uniphier/umc/Makefile rename arch/arm/mach-uniphier/{ph1-ld4/umc_init.c => umc/umc-ph1-ld4.c} (88%) rename arch/arm/mach-uniphier/{ph1-pro4/umc_init.c => umc/umc-ph1-pro4.c} (85%) rename arch/arm/mach-uniphier/{ph1-sld8/umc_init.c => umc/umc-ph1-sld8.c} (87%) diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index d7a19c6772c..2cc5dac0700 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -6,25 +6,32 @@ config SYS_CONFIG_NAME config UNIPHIER_SMP bool -choice - prompt "UniPhier SoC select" - default ARCH_UNIPHIER_PH1_PRO4 - config ARCH_UNIPHIER_PH1_SLD3 - bool "PH1-sLD3" + bool "UniPhier PH1-sLD3 SoC" select UNIPHIER_SMP + help + This enables support for UniPhier PH1-sLD3 SoC. config ARCH_UNIPHIER_PH1_LD4 - bool "PH1-LD4" + bool "UniPhier PH1-LD4 SoC" + depends on !ARCH_UNIPHIER_PH1_SLD3 + help + This enables support for UniPhier PH1-LD4 SoC. config ARCH_UNIPHIER_PH1_PRO4 - bool "PH1-Pro4" + bool "UniPhier PH1-Pro4 SoC" select UNIPHIER_SMP + depends on !ARCH_UNIPHIER_PH1_SLD3 && \ + !ARCH_UNIPHIER_PH1_LD4 && \ + !ARCH_UNIPHIER_PH1_SLD8 + help + This enables support for UniPhier PH1-Pro4 SoC. config ARCH_UNIPHIER_PH1_SLD8 - bool "PH1-sLD8" - -endchoice + bool "UniPhier PH1-sLD8 SoC" + depends on !ARCH_UNIPHIER_PH1_SLD3 + help + This enables support for UniPhier PH1-sLD8 SoC. config MICRO_SUPPORT_CARD bool "Use Micro Support Card" @@ -48,22 +55,4 @@ config CMD_DDRPHY_DUMP The command "ddrphy" shows the resulting parameters of DDR PHY training; it is useful for the evaluation of DDR PHY training. -choice - prompt "DDR3 Frequency select" - -config DDR_FREQ_1600 - bool "DDR3 1600" - depends on ARCH_UNIPHIER_PH1_SLD3 || ARCH_UNIPHIER_PH1_LD4 || ARCH_UNIPHIER_PH1_PRO4 - -config DDR_FREQ_1333 - bool "DDR3 1333" - depends on ARCH_UNIPHIER_PH1_SLD3 || ARCH_UNIPHIER_PH1_LD4 || ARCH_UNIPHIER_PH1_SLD8 - -endchoice - -config DDR_FREQ - int - default 1333 if DDR_FREQ_1333 - default 1600 if DDR_FREQ_1600 - endif diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 5c2ccbd7a88..b597a1352c2 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -6,9 +6,10 @@ ifdef CONFIG_SPL_BUILD obj-y += lowlevel_init.o obj-y += init_page_table.o -obj-y += spl.o -obj-y += memconf.o -obj-y += ddrphy_training.o +obj-y += boards.o + +obj-y += init/ bcu/ memconf/ pll/ early-clk/ early-pinctrl/ umc/ ddrphy/ +obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/ obj-$(CONFIG_DEBUG_LL) += debug_ll.o @@ -27,13 +28,12 @@ obj-y += cache_uniphier.o obj-$(CONFIG_CMD_PINMON) += cmd_pinmon.o obj-$(CONFIG_CMD_DDRPHY_DUMP) += cmd_ddrphy.o +obj-y += pinctrl/ clk/ + endif obj-y += timer.o +obj-y += soc_info.o +obj-y += boot-mode/ obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o - -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += ph1-sld3/ -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += ph1-ld4/ -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += ph1-pro4/ -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += ph1-sld8/ diff --git a/arch/arm/mach-uniphier/bcu/Makefile b/arch/arm/mach-uniphier/bcu/Makefile new file mode 100644 index 00000000000..5b95bdad957 --- /dev/null +++ b/arch/arm/mach-uniphier/bcu/Makefile @@ -0,0 +1,3 @@ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += bcu-ph1-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += bcu-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += bcu-ph1-ld4.o diff --git a/arch/arm/mach-uniphier/ph1-ld4/bcu_init.c b/arch/arm/mach-uniphier/bcu/bcu-ph1-ld4.c similarity index 84% rename from arch/arm/mach-uniphier/ph1-ld4/bcu_init.c rename to arch/arm/mach-uniphier/bcu/bcu-ph1-ld4.c index a7bc15e7e06..e9d3761fde9 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/bcu_init.c +++ b/arch/arm/mach-uniphier/bcu/bcu-ph1-ld4.c @@ -4,13 +4,13 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include #include #include +#include #define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x)) -void bcu_init(void) +int ph1_ld4_bcu_init(const struct uniphier_board_data *bd) { int shift; @@ -21,7 +21,7 @@ void bcu_init(void) writel(0x11111111, BCSCR5); /* 0xe0000000-0Xffffffff: IPPC/IPPD-bus */ /* Specify DDR channel */ - shift = (CONFIG_SDRAM1_BASE - CONFIG_SDRAM0_BASE) / 0x04000000 * 4; + shift = (bd->dram_ch1_base - bd->dram_ch0_base) / 0x04000000 * 4; writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */ shift -= 32; @@ -29,4 +29,6 @@ void bcu_init(void) shift -= 32; writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */ + + return 0; } diff --git a/arch/arm/mach-uniphier/ph1-sld3/bcu_init.c b/arch/arm/mach-uniphier/bcu/bcu-ph1-sld3.c similarity index 84% rename from arch/arm/mach-uniphier/ph1-sld3/bcu_init.c rename to arch/arm/mach-uniphier/bcu/bcu-ph1-sld3.c index ccc6897d0ad..cb6f8627211 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/bcu_init.c +++ b/arch/arm/mach-uniphier/bcu/bcu-ph1-sld3.c @@ -4,13 +4,13 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include #include #include +#include #define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x)) -void bcu_init(void) +int ph1_sld3_bcu_init(const struct uniphier_board_data *bd) { int shift; @@ -25,7 +25,7 @@ void bcu_init(void) writel(0x24440000, BCSCR5); /* Specify DDR channel */ - shift = (CONFIG_SDRAM1_BASE - CONFIG_SDRAM0_BASE) / 0x04000000 * 4; + shift = (bd->dram_ch1_base - bd->dram_ch0_base) / 0x04000000 * 4; writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */ shift -= 32; @@ -33,4 +33,6 @@ void bcu_init(void) shift -= 32; writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */ + + return 0; } diff --git a/arch/arm/mach-uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c index 45f5cea4334..cd516c3121a 100644 --- a/arch/arm/mach-uniphier/board_early_init_f.c +++ b/arch/arm/mach-uniphier/board_early_init_f.c @@ -4,20 +4,46 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include - -void pin_init(void); -void clkrst_init(void); +#include int board_early_init_f(void) { led_puts("U0"); - pin_init(); - - led_puts("U1"); - - clkrst_init(); + switch (uniphier_get_soc_type()) { +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) + case SOC_UNIPHIER_PH1_SLD3: + ph1_sld3_pin_init(); + led_puts("U1"); + ph1_ld4_clk_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) + case SOC_UNIPHIER_PH1_LD4: + ph1_ld4_pin_init(); + led_puts("U1"); + ph1_ld4_clk_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) + case SOC_UNIPHIER_PH1_PRO4: + ph1_pro4_pin_init(); + led_puts("U1"); + ph1_pro4_clk_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) + case SOC_UNIPHIER_PH1_SLD8: + ph1_sld8_pin_init(); + led_puts("U1"); + ph1_ld4_clk_init(); + break; +#endif + default: + break; + } led_puts("U2"); diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c new file mode 100644 index 00000000000..6a5ea2e585f --- /dev/null +++ b/arch/arm/mach-uniphier/boards.c @@ -0,0 +1,93 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) +static const struct uniphier_board_data ph1_sld3_data = { + .dram_ch0_base = 0x80000000, + .dram_ch0_size = 0x20000000, + .dram_ch0_width = 32, + .dram_ch1_base = 0xc0000000, + .dram_ch1_size = 0x20000000, + .dram_ch1_width = 16, + .dram_ch2_base = 0xc0000000, + .dram_ch2_size = 0x10000000, + .dram_ch2_width = 16, + .dram_freq = 1600, +}; +#endif + +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) +static const struct uniphier_board_data ph1_ld4_data = { + .dram_ch0_base = 0x80000000, + .dram_ch0_size = 0x10000000, + .dram_ch0_width = 16, + .dram_ch1_base = 0x90000000, + .dram_ch1_size = 0x10000000, + .dram_ch1_width = 16, + .dram_freq = 1600, +}; +#endif + +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) +static const struct uniphier_board_data ph1_pro4_data = { + .dram_ch0_base = 0x80000000, + .dram_ch0_size = 0x20000000, + .dram_ch0_width = 32, + .dram_ch1_base = 0xa0000000, + .dram_ch1_size = 0x20000000, + .dram_ch1_width = 32, + .dram_freq = 1600, +}; +#endif + +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) +static const struct uniphier_board_data ph1_sld8_data = { + .dram_ch0_base = 0x80000000, + .dram_ch0_size = 0x10000000, + .dram_ch0_width = 16, + .dram_ch1_base = 0x90000000, + .dram_ch1_size = 0x10000000, + .dram_ch1_width = 16, + .dram_freq = 1333, +}; +#endif + +struct uniphier_board_id { + const char *compatible; + const struct uniphier_board_data *param; +}; + +static const struct uniphier_board_id uniphier_boards[] = { +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) + { "socionext,ph1-sld3", &ph1_sld3_data, }, +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) + { "socionext,ph1-ld4", &ph1_ld4_data, }, +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) + { "socionext,ph1-pro4", &ph1_pro4_data, }, +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) + { "socionext,ph1-sld8", &ph1_sld8_data, }, +#endif +}; + +const struct uniphier_board_data *uniphier_get_board_param(const void *fdt) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(uniphier_boards); i++) { + if (!fdt_node_check_compatible(fdt, 0, + uniphier_boards[i].compatible)) + return uniphier_boards[i].param; + } + + return NULL; +} diff --git a/arch/arm/mach-uniphier/boot-mode/Makefile b/arch/arm/mach-uniphier/boot-mode/Makefile new file mode 100644 index 00000000000..bd6d0a3d7c9 --- /dev/null +++ b/arch/arm/mach-uniphier/boot-mode/Makefile @@ -0,0 +1,6 @@ +obj-y += boot-mode.o + +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += boot-mode-ph1-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += boot-mode-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += boot-mode-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += boot-mode-ph1-ld4.o diff --git a/arch/arm/mach-uniphier/ph1-pro4/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-ld4.c similarity index 88% rename from arch/arm/mach-uniphier/ph1-pro4/boot-mode.c rename to arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-ld4.c index 54a2510b97f..f974d9f08d1 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/boot-mode.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-ld4.c @@ -44,22 +44,31 @@ struct boot_device_info boot_device_table[] = { {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, - { /* sentinel */ } }; -int get_boot_mode_sel(void) +static int get_boot_mode_sel(void) { return (readl(SG_PINMON0) >> 1) & 0x1f; } -u32 spl_boot_device(void) +u32 ph1_ld4_boot_device(void) { int boot_mode; - if (boot_is_swapped()) - return BOOT_DEVICE_NOR; - boot_mode = get_boot_mode_sel(); return boot_device_table[boot_mode].type; } + +void ph1_ld4_boot_mode_show(void) +{ + int mode_sel, i; + + mode_sel = get_boot_mode_sel(); + + puts("Boot Mode Pin:\n"); + + for (i = 0; i < ARRAY_SIZE(boot_device_table); i++) + printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i, + boot_device_table[i].info); +} diff --git a/arch/arm/mach-uniphier/ph1-sld3/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-sld3.c similarity index 89% rename from arch/arm/mach-uniphier/ph1-sld3/boot-mode.c rename to arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-sld3.c index 40000afe741..c943e12db15 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/boot-mode.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-sld3.c @@ -11,7 +11,7 @@ #include #include -struct boot_device_info boot_device_table[] = { +static struct boot_device_info boot_device_table[] = { {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "External Master"}, {BOOT_DEVICE_NONE, "Reserved"}, @@ -76,22 +76,31 @@ struct boot_device_info boot_device_table[] = { {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, - { /* sentinel */ } }; -int get_boot_mode_sel(void) +static int get_boot_mode_sel(void) { return readl(SG_PINMON0) & 0x3f; } -u32 spl_boot_device(void) +u32 ph1_sld3_boot_device(void) { int boot_mode; - if (boot_is_swapped()) - return BOOT_DEVICE_NOR; - boot_mode = get_boot_mode_sel(); return boot_device_table[boot_mode].type; } + +void ph1_sld3_boot_mode_show(void) +{ + int mode_sel, i; + + mode_sel = get_boot_mode_sel(); + + puts("Boot Mode Pin:\n"); + + for (i = 0; i < ARRAY_SIZE(boot_device_table); i++) + printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i, + boot_device_table[i].info); +} diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c new file mode 100644 index 00000000000..71abdef1f4d --- /dev/null +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +u32 spl_boot_device(void) +{ + if (boot_is_swapped()) + return BOOT_DEVICE_NOR; + + switch (uniphier_get_soc_type()) { +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) + case SOC_UNIPHIER_PH1_SLD3: + return ph1_sld3_boot_device(); +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ + defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) || \ + defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) + case SOC_UNIPHIER_PH1_LD4: + case SOC_UNIPHIER_PH1_PRO4: + case SOC_UNIPHIER_PH1_SLD8: + return ph1_ld4_boot_device(); +#endif + default: + return BOOT_DEVICE_NONE; + } +} diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile new file mode 100644 index 00000000000..e6931d6461b --- /dev/null +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -0,0 +1,4 @@ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += clk-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += clk-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += clk-ph1-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += clk-ph1-ld4.o diff --git a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c b/arch/arm/mach-uniphier/clk/clk-ph1-ld4.c similarity index 94% rename from arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c rename to arch/arm/mach-uniphier/clk/clk-ph1-ld4.c index 2de81f0a560..8b95fbb008a 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c +++ b/arch/arm/mach-uniphier/clk/clk-ph1-ld4.c @@ -5,9 +5,10 @@ */ #include +#include #include -void clkrst_init(void) +void ph1_ld4_clk_init(void) { u32 tmp; diff --git a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c b/arch/arm/mach-uniphier/clk/clk-ph1-pro4.c similarity index 96% rename from arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c rename to arch/arm/mach-uniphier/clk/clk-ph1-pro4.c index 46cace77e54..2e1b20a423c 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c +++ b/arch/arm/mach-uniphier/clk/clk-ph1-pro4.c @@ -5,9 +5,10 @@ */ #include +#include #include -void clkrst_init(void) +void ph1_pro4_clk_init(void) { u32 tmp; diff --git a/arch/arm/mach-uniphier/cmd_pinmon.c b/arch/arm/mach-uniphier/cmd_pinmon.c index 8be2ed4fe63..a61d40e6c5a 100644 --- a/arch/arm/mach-uniphier/cmd_pinmon.c +++ b/arch/arm/mach-uniphier/cmd_pinmon.c @@ -1,6 +1,5 @@ /* - * Copyright (C) 2014 Panasonic Corporation - * Author: Masahiro Yamada + * Copyright (C) 2014-2015 Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ @@ -8,20 +7,30 @@ #include #include #include +#include static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - int mode_sel, i; - printf("Boot Swap: %s\n\n", boot_is_swapped() ? "ON" : "OFF"); - mode_sel = get_boot_mode_sel(); - - puts("Boot Mode Pin:\n"); - - for (i = 0; boot_device_table[i].info; i++) - printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i, - boot_device_table[i].info); + switch (uniphier_get_soc_type()) { +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) + case SOC_UNIPHIER_PH1_SLD3: + ph1_sld3_boot_mode_show(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ + defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) || \ + defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) + case SOC_UNIPHIER_PH1_LD4: + case SOC_UNIPHIER_PH1_PRO4: + case SOC_UNIPHIER_PH1_SLD8: + ph1_ld4_boot_mode_show(); + break; +#endif + default: + break; + } return 0; } diff --git a/arch/arm/mach-uniphier/ddrphy/Makefile b/arch/arm/mach-uniphier/ddrphy/Makefile new file mode 100644 index 00000000000..e2d109df57a --- /dev/null +++ b/arch/arm/mach-uniphier/ddrphy/Makefile @@ -0,0 +1,3 @@ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += ddrphy-training.o ddrphy-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += ddrphy-training.o ddrphy-ph1-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += ddrphy-training.o ddrphy-ph1-sld8.o diff --git a/arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c b/arch/arm/mach-uniphier/ddrphy/ddrphy-ph1-ld4.c similarity index 95% rename from arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c rename to arch/arm/mach-uniphier/ddrphy/ddrphy-ph1-ld4.c index 2add8fa691f..991d9294fd0 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c +++ b/arch/arm/mach-uniphier/ddrphy/ddrphy-ph1-ld4.c @@ -8,7 +8,7 @@ #include #include -void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size) +int ph1_ld4_ddrphy_init(struct ddrphy __iomem *phy, int freq, int size) { u32 tmp; @@ -67,4 +67,6 @@ void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size) writel(0x0300C473, &phy->pgcr[1]); writel(0x0000005D, &phy->zq[0].cr[1]); + + return 0; } diff --git a/arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c b/arch/arm/mach-uniphier/ddrphy/ddrphy-ph1-pro4.c similarity index 95% rename from arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c rename to arch/arm/mach-uniphier/ddrphy/ddrphy-ph1-pro4.c index 61ddcf4ec63..bc47ba3280d 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c +++ b/arch/arm/mach-uniphier/ddrphy/ddrphy-ph1-pro4.c @@ -8,7 +8,7 @@ #include #include -void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size) +int ph1_pro4_ddrphy_init(struct ddrphy __iomem *phy, int freq, int size) { u32 tmp; @@ -67,4 +67,6 @@ void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size) writel(0x0300C473, &phy->pgcr[1]); writel(0x0000005D, &phy->zq[0].cr[1]); + + return 0; } diff --git a/arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c b/arch/arm/mach-uniphier/ddrphy/ddrphy-ph1-sld8.c similarity index 95% rename from arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c rename to arch/arm/mach-uniphier/ddrphy/ddrphy-ph1-sld8.c index 21efe62da6b..39024a09d5e 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c +++ b/arch/arm/mach-uniphier/ddrphy/ddrphy-ph1-sld8.c @@ -9,7 +9,7 @@ #include #include -void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size) +int ph1_sld8_ddrphy_init(struct ddrphy __iomem *phy, int freq, int size) { u32 tmp; @@ -72,4 +72,6 @@ void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size) writel(0x0300C473, &phy->pgcr[1]); writel(0x0000005D, &phy->zq[0].cr[1]); + + return 0; } diff --git a/arch/arm/mach-uniphier/ddrphy_training.c b/arch/arm/mach-uniphier/ddrphy/ddrphy-training.c similarity index 100% rename from arch/arm/mach-uniphier/ddrphy_training.c rename to arch/arm/mach-uniphier/ddrphy/ddrphy-training.c diff --git a/arch/arm/mach-uniphier/early-clk/Makefile b/arch/arm/mach-uniphier/early-clk/Makefile new file mode 100644 index 00000000000..58af1add582 --- /dev/null +++ b/arch/arm/mach-uniphier/early-clk/Makefile @@ -0,0 +1,4 @@ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += early-clk-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += early-clk-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += early-clk-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += early-clk-ph1-ld4.o diff --git a/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c b/arch/arm/mach-uniphier/early-clk/early-clk-ph1-ld4.c similarity index 86% rename from arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c rename to arch/arm/mach-uniphier/early-clk/early-clk-ph1-ld4.c index 60204b53ba5..f646c9b7df9 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c +++ b/arch/arm/mach-uniphier/early-clk/early-clk-ph1-ld4.c @@ -7,9 +7,10 @@ #include #include #include +#include #include -void early_clkrst_init(void) +int ph1_ld4_early_clk_init(const struct uniphier_board_data *bd) { u32 tmp; @@ -27,4 +28,6 @@ void early_clkrst_init(void) tmp |= SC_CLKCTRL_CEN_UMC | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; writel(tmp, SC_CLKCTRL); readl(SC_CLKCTRL); /* dummy read */ + + return 0; } diff --git a/arch/arm/mach-uniphier/early-pinctrl/Makefile b/arch/arm/mach-uniphier/early-pinctrl/Makefile new file mode 100644 index 00000000000..e497d28f792 --- /dev/null +++ b/arch/arm/mach-uniphier/early-pinctrl/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += early-pinctrl-ph1-sld3.o diff --git a/arch/arm/mach-uniphier/ph1-sld3/early_pinctrl.c b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ph1-sld3.c similarity index 82% rename from arch/arm/mach-uniphier/ph1-sld3/early_pinctrl.c rename to arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ph1-sld3.c index f6ceef5f1c0..1bb9375016d 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/early_pinctrl.c +++ b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ph1-sld3.c @@ -4,9 +4,10 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include -void early_pin_init(void) +int ph1_sld3_early_pin_init(const struct uniphier_board_data *bd) { /* Comment format: PAD Name -> Function Name */ @@ -20,4 +21,6 @@ void early_pin_init(void) sg_set_pinsel(96, 2, 4, 4); /* RXD2 */ sg_set_pinsel(102, 2, 4, 4); /* TXD2 */ #endif + + return 0; } diff --git a/arch/arm/mach-uniphier/include/mach/boot-device.h b/arch/arm/mach-uniphier/include/mach/boot-device.h index 7a10f1c5b2c..eddb25ffa45 100644 --- a/arch/arm/mach-uniphier/include/mach/boot-device.h +++ b/arch/arm/mach-uniphier/include/mach/boot-device.h @@ -1,6 +1,5 @@ /* - * Copyright (C) 2011-2014 Panasonic Corporation - * Author: Masahiro Yamada + * Copyright (C) 2011-2015 Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ @@ -8,13 +7,15 @@ #ifndef _ASM_BOOT_DEVICE_H_ #define _ASM_BOOT_DEVICE_H_ -int get_boot_mode_sel(void); - struct boot_device_info { u32 type; char *info; }; -extern struct boot_device_info boot_device_table[]; +u32 ph1_sld3_boot_device(void); +u32 ph1_ld4_boot_device(void); + +void ph1_sld3_boot_mode_show(void); +void ph1_ld4_boot_mode_show(void); #endif /* _ASM_BOOT_DEVICE_H_ */ diff --git a/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h index 01f5c52c9c4..adcc972877e 100644 --- a/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h +++ b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h @@ -168,7 +168,9 @@ struct ddrphy { #define DDRPHY_BASE(ch, phy) (0x5bc01000 + 0x200000 * (ch) + 0x1000 * (phy)) #ifndef __ASSEMBLY__ -void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size); +int ph1_ld4_ddrphy_init(struct ddrphy __iomem *phy, int freq, int size); +int ph1_pro4_ddrphy_init(struct ddrphy __iomem *phy, int freq, int size); +int ph1_sld8_ddrphy_init(struct ddrphy __iomem *phy, int freq, int size); void ddrphy_prepare_training(struct ddrphy __iomem *phy, int rank); int ddrphy_training(struct ddrphy __iomem *phy); #endif diff --git a/arch/arm/mach-uniphier/include/mach/init.h b/arch/arm/mach-uniphier/include/mach/init.h new file mode 100644 index 00000000000..228cbb1a195 --- /dev/null +++ b/arch/arm/mach-uniphier/include/mach/init.h @@ -0,0 +1,83 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MACH_INIT_H +#define __MACH_INIT_H + +struct uniphier_board_data { + unsigned long dram_ch0_base; + unsigned long dram_ch0_size; + unsigned long dram_ch0_width; + unsigned long dram_ch1_base; + unsigned long dram_ch1_size; + unsigned long dram_ch1_width; + unsigned long dram_ch2_base; + unsigned long dram_ch2_size; + unsigned long dram_ch2_width; + unsigned int dram_freq; +}; + +const struct uniphier_board_data *uniphier_get_board_param(const void *fdt); + +int ph1_sld3_init(const struct uniphier_board_data *bd); +int ph1_ld4_init(const struct uniphier_board_data *bd); +int ph1_pro4_init(const struct uniphier_board_data *bd); +int ph1_sld8_init(const struct uniphier_board_data *bd); + +#if defined(CONFIG_MICRO_SUPPORT_CARD) +int ph1_sld3_sbc_init(const struct uniphier_board_data *bd); +int ph1_ld4_sbc_init(const struct uniphier_board_data *bd); +int ph1_pro4_sbc_init(const struct uniphier_board_data *bd); +#else +static inline int ph1_sld3_sbc_init(const struct uniphier_board_data *bd) +{ + return 0; +} + +static inline int ph1_ld4_sbc_init(const struct uniphier_board_data *bd) +{ + return 0; +} + +static inline int ph1_pro4_sbc_init(const struct uniphier_board_data *bd) +{ + return 0; +} +#endif + +int ph1_sld3_bcu_init(const struct uniphier_board_data *bd); +int ph1_ld4_bcu_init(const struct uniphier_board_data *bd); + +int memconf_init(const struct uniphier_board_data *bd); +int ph1_sld3_memconf_init(const struct uniphier_board_data *bd); + +int ph1_sld3_pll_init(const struct uniphier_board_data *bd); +int ph1_ld4_pll_init(const struct uniphier_board_data *bd); +int ph1_pro4_pll_init(const struct uniphier_board_data *bd); +int ph1_sld8_pll_init(const struct uniphier_board_data *bd); + +int ph1_sld3_enable_dpll_ssc(const struct uniphier_board_data *bd); +int ph1_ld4_enable_dpll_ssc(const struct uniphier_board_data *bd); + +int ph1_ld4_early_clk_init(const struct uniphier_board_data *bd); + +int ph1_sld3_early_pin_init(const struct uniphier_board_data *bd); + +int ph1_ld4_umc_init(const struct uniphier_board_data *bd); +int ph1_pro4_umc_init(const struct uniphier_board_data *bd); +int ph1_sld8_umc_init(const struct uniphier_board_data *bd); + +void ph1_sld3_pin_init(void); +void ph1_ld4_pin_init(void); +void ph1_pro4_pin_init(void); +void ph1_sld8_pin_init(void); + +void ph1_ld4_clk_init(void); +void ph1_pro4_clk_init(void); + +#define pr_err(fmt, args...) printf(fmt, ##args) + +#endif /* __MACH_INIT_H */ diff --git a/arch/arm/mach-uniphier/include/mach/sg-regs.h b/arch/arm/mach-uniphier/include/mach/sg-regs.h index c886e1c6555..d8239f28bc5 100644 --- a/arch/arm/mach-uniphier/include/mach/sg-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sg-regs.h @@ -25,26 +25,32 @@ /* Memory Configuration */ #define SG_MEMCONF (SG_CTRL_BASE | 0x0400) +#define SG_MEMCONF_CH0_SZ_MASK ((0x1 << 10) | (0x03 << 0)) #define SG_MEMCONF_CH0_SZ_64M ((0x0 << 10) | (0x01 << 0)) #define SG_MEMCONF_CH0_SZ_128M ((0x0 << 10) | (0x02 << 0)) #define SG_MEMCONF_CH0_SZ_256M ((0x0 << 10) | (0x03 << 0)) #define SG_MEMCONF_CH0_SZ_512M ((0x1 << 10) | (0x00 << 0)) #define SG_MEMCONF_CH0_SZ_1G ((0x1 << 10) | (0x01 << 0)) +#define SG_MEMCONF_CH0_NUM_MASK (0x1 << 8) #define SG_MEMCONF_CH0_NUM_1 (0x1 << 8) #define SG_MEMCONF_CH0_NUM_2 (0x0 << 8) +#define SG_MEMCONF_CH1_SZ_MASK ((0x1 << 11) | (0x03 << 2)) #define SG_MEMCONF_CH1_SZ_64M ((0x0 << 11) | (0x01 << 2)) #define SG_MEMCONF_CH1_SZ_128M ((0x0 << 11) | (0x02 << 2)) #define SG_MEMCONF_CH1_SZ_256M ((0x0 << 11) | (0x03 << 2)) #define SG_MEMCONF_CH1_SZ_512M ((0x1 << 11) | (0x00 << 2)) #define SG_MEMCONF_CH1_SZ_1G ((0x1 << 11) | (0x01 << 2)) +#define SG_MEMCONF_CH1_NUM_MASK (0x1 << 9) #define SG_MEMCONF_CH1_NUM_1 (0x1 << 9) #define SG_MEMCONF_CH1_NUM_2 (0x0 << 9) +#define SG_MEMCONF_CH2_SZ_MASK ((0x1 << 26) | (0x03 << 16)) #define SG_MEMCONF_CH2_SZ_64M ((0x0 << 26) | (0x01 << 16)) #define SG_MEMCONF_CH2_SZ_128M ((0x0 << 26) | (0x02 << 16)) #define SG_MEMCONF_CH2_SZ_256M ((0x0 << 26) | (0x03 << 16)) #define SG_MEMCONF_CH2_SZ_512M ((0x1 << 26) | (0x00 << 16)) +#define SG_MEMCONF_CH2_NUM_MASK (0x1 << 24) #define SG_MEMCONF_CH2_NUM_1 (0x1 << 24) #define SG_MEMCONF_CH2_NUM_2 (0x0 << 24) diff --git a/arch/arm/mach-uniphier/include/mach/soc_info.h b/arch/arm/mach-uniphier/include/mach/soc_info.h new file mode 100644 index 00000000000..623e7ef20ee --- /dev/null +++ b/arch/arm/mach-uniphier/include/mach/soc_info.h @@ -0,0 +1,63 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MACH_SOC_INFO_H__ +#define __MACH_SOC_INFO_H__ + +enum uniphier_soc_id { + SOC_UNIPHIER_PH1_SLD3, + SOC_UNIPHIER_PH1_LD4, + SOC_UNIPHIER_PH1_PRO4, + SOC_UNIPHIER_PH1_SLD8, + SOC_UNIPHIER_PH1_PRO5, + SOC_UNIPHIER_PROXSTREAM2, + SOC_UNIPHIER_PH1_LD6B, + SOC_UNIPHIER_UNKNOWN, +}; + +#define UNIPHIER_NR_ENABLED_SOCS \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_SLD3) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_LD4) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_PRO4) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_SLD8) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_PRO5) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_LD6B) + +#define UNIPHIER_MULTI_SOC ((UNIPHIER_NR_ENABLED_SOCS) > 1) + +#if UNIPHIER_MULTI_SOC +enum uniphier_soc_id uniphier_get_soc_type(void); +#else +static inline enum uniphier_soc_id uniphier_get_soc_type(void) +{ +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) + return SOC_UNIPHIER_PH1_SLD3; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) + return SOC_UNIPHIER_PH1_LD4; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) + return SOC_UNIPHIER_PH1_PRO4; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) + return SOC_UNIPHIER_PH1_SLD8; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) + return SOC_UNIPHIER_PH1_PRO5; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) + return SOC_UNIPHIER_PROXSTREAM2; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) + return SOC_UNIPHIER_PH1_LD6B; +#endif + + return SOC_UNIPHIER_UNKNOWN; +} +#endif + +#endif /* __MACH_SOC_INFO_H__ */ diff --git a/arch/arm/mach-uniphier/init/Makefile b/arch/arm/mach-uniphier/init/Makefile new file mode 100644 index 00000000000..dd9804d33b5 --- /dev/null +++ b/arch/arm/mach-uniphier/init/Makefile @@ -0,0 +1,6 @@ +obj-y += init.o + +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += init-ph1-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += init-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += init-ph1-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += init-ph1-sld8.o diff --git a/arch/arm/mach-uniphier/spl.c b/arch/arm/mach-uniphier/init/init-ph1-ld4.c similarity index 50% rename from arch/arm/mach-uniphier/spl.c rename to arch/arm/mach-uniphier/init/init-ph1-ld4.c index 4c3cad3b88b..8d0ef0389e1 100644 --- a/arch/arm/mach-uniphier/spl.c +++ b/arch/arm/mach-uniphier/init/init-ph1-ld4.c @@ -7,60 +7,31 @@ #include #include #include +#include #include -void __weak bcu_init(void) +int ph1_ld4_init(const struct uniphier_board_data *bd) { -}; + ph1_ld4_bcu_init(bd); -void __weak sbc_init(void) -{ -}; - -void __weak sg_init(void) -{ -}; - -void __weak early_pin_init(void) -{ -}; - -void sbc_init(void); -void sg_init(void); -void pll_init(void); -void pin_init(void); -void memconf_init(void); -void early_clkrst_init(void); -void early_pin_init(void); -int umc_init(void); -void enable_dpll_ssc(void); - -void spl_board_init(void) -{ - bcu_init(); - - sbc_init(); - - sg_init(); + ph1_ld4_sbc_init(bd); support_card_reset(); - pll_init(); + ph1_ld4_pll_init(bd); support_card_init(); led_puts("L0"); - memconf_init(); + memconf_init(bd); led_puts("L1"); - early_clkrst_init(); + ph1_ld4_early_clk_init(bd); led_puts("L2"); - early_pin_init(); - led_puts("L3"); #ifdef CONFIG_SPL_SERIAL_SUPPORT @@ -72,7 +43,7 @@ void spl_board_init(void) { int res; - res = umc_init(); + res = ph1_ld4_umc_init(bd); if (res < 0) { while (1) ; @@ -81,7 +52,9 @@ void spl_board_init(void) led_puts("L5"); - enable_dpll_ssc(); + ph1_ld4_enable_dpll_ssc(bd); led_puts("L6"); + + return 0; } diff --git a/arch/arm/mach-uniphier/init/init-ph1-pro4.c b/arch/arm/mach-uniphier/init/init-ph1-pro4.c new file mode 100644 index 00000000000..b9ce08d88f9 --- /dev/null +++ b/arch/arm/mach-uniphier/init/init-ph1-pro4.c @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2013-2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +int ph1_pro4_init(const struct uniphier_board_data *bd) +{ + ph1_pro4_sbc_init(bd); + + support_card_reset(); + + ph1_pro4_pll_init(bd); + + support_card_init(); + + led_puts("L0"); + + memconf_init(bd); + + led_puts("L1"); + + ph1_ld4_early_clk_init(bd); + + led_puts("L2"); + + led_puts("L3"); + +#ifdef CONFIG_SPL_SERIAL_SUPPORT + preloader_console_init(); +#endif + + led_puts("L4"); + + { + int res; + + res = ph1_pro4_umc_init(bd); + if (res < 0) { + while (1) + ; + } + } + + led_puts("L5"); + + ph1_ld4_enable_dpll_ssc(bd); + + led_puts("L6"); + + return 0; +} diff --git a/arch/arm/mach-uniphier/init/init-ph1-sld3.c b/arch/arm/mach-uniphier/init/init-ph1-sld3.c new file mode 100644 index 00000000000..1146fdab977 --- /dev/null +++ b/arch/arm/mach-uniphier/init/init-ph1-sld3.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2013-2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +int ph1_sld3_init(const struct uniphier_board_data *bd) +{ + ph1_sld3_bcu_init(bd); + + ph1_sld3_sbc_init(bd); + + support_card_reset(); + + ph1_sld3_pll_init(bd); + + support_card_init(); + + led_puts("L0"); + + memconf_init(bd); + ph1_sld3_memconf_init(bd); + + led_puts("L1"); + + ph1_ld4_early_clk_init(bd); + + led_puts("L2"); + + ph1_sld3_early_pin_init(bd); + + led_puts("L3"); + +#ifdef CONFIG_SPL_SERIAL_SUPPORT + preloader_console_init(); +#endif + + led_puts("L4"); + + led_puts("L5"); + + ph1_sld3_enable_dpll_ssc(bd); + + led_puts("L6"); + + return 0; +} diff --git a/arch/arm/mach-uniphier/init/init-ph1-sld8.c b/arch/arm/mach-uniphier/init/init-ph1-sld8.c new file mode 100644 index 00000000000..741e88c212f --- /dev/null +++ b/arch/arm/mach-uniphier/init/init-ph1-sld8.c @@ -0,0 +1,60 @@ +/* + * Copyright (C) 2013-2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +int ph1_sld8_init(const struct uniphier_board_data *bd) +{ + ph1_ld4_bcu_init(bd); + + ph1_ld4_sbc_init(bd); + + support_card_reset(); + + ph1_sld8_pll_init(bd); + + support_card_init(); + + led_puts("L0"); + + memconf_init(bd); + + led_puts("L1"); + + ph1_ld4_early_clk_init(bd); + + led_puts("L2"); + + led_puts("L3"); + +#ifdef CONFIG_SPL_SERIAL_SUPPORT + preloader_console_init(); +#endif + + led_puts("L4"); + + { + int res; + + res = ph1_sld8_umc_init(bd); + if (res < 0) { + while (1) + ; + } + } + + led_puts("L5"); + + ph1_ld4_enable_dpll_ssc(bd); + + led_puts("L6"); + + return 0; +} diff --git a/arch/arm/mach-uniphier/init/init.c b/arch/arm/mach-uniphier/init/init.c new file mode 100644 index 00000000000..316be029ae6 --- /dev/null +++ b/arch/arm/mach-uniphier/init/init.c @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +void spl_board_init(void) +{ + const struct uniphier_board_data *param; + + param = uniphier_get_board_param(gd->fdt_blob); + if (!param) + hang(); + + switch (uniphier_get_soc_type()) { +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) + case SOC_UNIPHIER_PH1_SLD3: + ph1_sld3_init(param); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) + case SOC_UNIPHIER_PH1_LD4: + ph1_ld4_init(param); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) + case SOC_UNIPHIER_PH1_PRO4: + ph1_pro4_init(param); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) + case SOC_UNIPHIER_PH1_SLD8: + ph1_sld8_init(param); + break; +#endif + default: + break; + } +} diff --git a/arch/arm/mach-uniphier/memconf.c b/arch/arm/mach-uniphier/memconf.c deleted file mode 100644 index 59ed0b5dd8f..00000000000 --- a/arch/arm/mach-uniphier/memconf.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -static inline u32 sg_memconf_val_ch0(unsigned long size, int num) -{ - int size_mb = size / num; - u32 ret; - - switch (size_mb) { - case SZ_64M: - ret = SG_MEMCONF_CH0_SZ_64M; - break; - case SZ_128M: - ret = SG_MEMCONF_CH0_SZ_128M; - break; - case SZ_256M: - ret = SG_MEMCONF_CH0_SZ_256M; - break; - case SZ_512M: - ret = SG_MEMCONF_CH0_SZ_512M; - break; - case SZ_1G: - ret = SG_MEMCONF_CH0_SZ_1G; - break; - default: - BUG(); - break; - } - - switch (num) { - case 1: - ret |= SG_MEMCONF_CH0_NUM_1; - break; - case 2: - ret |= SG_MEMCONF_CH0_NUM_2; - break; - default: - BUG(); - break; - } - return ret; -} - -static inline u32 sg_memconf_val_ch1(unsigned long size, int num) -{ - int size_mb = size / num; - u32 ret; - - switch (size_mb) { - case SZ_64M: - ret = SG_MEMCONF_CH1_SZ_64M; - break; - case SZ_128M: - ret = SG_MEMCONF_CH1_SZ_128M; - break; - case SZ_256M: - ret = SG_MEMCONF_CH1_SZ_256M; - break; - case SZ_512M: - ret = SG_MEMCONF_CH1_SZ_512M; - break; - case SZ_1G: - ret = SG_MEMCONF_CH1_SZ_1G; - break; - default: - BUG(); - break; - } - - switch (num) { - case 1: - ret |= SG_MEMCONF_CH1_NUM_1; - break; - case 2: - ret |= SG_MEMCONF_CH1_NUM_2; - break; - default: - BUG(); - break; - } - return ret; -} - -void memconf_init(void) -{ - u32 tmp; - - /* Set DDR size */ - tmp = sg_memconf_val_ch0(CONFIG_SDRAM0_SIZE, CONFIG_DDR_NUM_CH0); - tmp |= sg_memconf_val_ch1(CONFIG_SDRAM1_SIZE, CONFIG_DDR_NUM_CH1); -#if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE < CONFIG_SDRAM1_BASE - tmp |= SG_MEMCONF_SPARSEMEM; -#endif - writel(tmp, SG_MEMCONF); -} diff --git a/arch/arm/mach-uniphier/memconf/Makefile b/arch/arm/mach-uniphier/memconf/Makefile new file mode 100644 index 00000000000..1a718f31fae --- /dev/null +++ b/arch/arm/mach-uniphier/memconf/Makefile @@ -0,0 +1,2 @@ +obj-y += memconf.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += memconf-ph1-sld3.o diff --git a/arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c b/arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c new file mode 100644 index 00000000000..e13f56d1dcb --- /dev/null +++ b/arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +int ph1_sld3_memconf_init(const struct uniphier_board_data *bd) +{ + u32 tmp; + unsigned long size_per_word; + + tmp = readl(SG_MEMCONF); + + tmp &= ~(SG_MEMCONF_CH2_SZ_MASK | SG_MEMCONF_CH2_NUM_MASK); + + switch (bd->dram_ch2_width) { + case 16: + tmp |= SG_MEMCONF_CH2_NUM_1; + size_per_word = bd->dram_ch2_size; + break; + case 32: + tmp |= SG_MEMCONF_CH2_NUM_2; + size_per_word = bd->dram_ch2_size >> 1; + break; + default: + pr_err("error: unsupported DRAM Ch2 width\n"); + return -EINVAL; + } + + /* Set DDR size */ + switch (size_per_word) { + case SZ_64M: + tmp |= SG_MEMCONF_CH2_SZ_64M; + break; + case SZ_128M: + tmp |= SG_MEMCONF_CH2_SZ_128M; + break; + case SZ_256M: + tmp |= SG_MEMCONF_CH2_SZ_256M; + break; + case SZ_512M: + tmp |= SG_MEMCONF_CH2_SZ_512M; + break; + default: + pr_err("error: unsupported DRAM Ch2 size\n"); + return -EINVAL; + } + + writel(tmp, SG_MEMCONF); + + return 0; +} diff --git a/arch/arm/mach-uniphier/memconf/memconf.c b/arch/arm/mach-uniphier/memconf/memconf.c new file mode 100644 index 00000000000..d490736fa43 --- /dev/null +++ b/arch/arm/mach-uniphier/memconf/memconf.c @@ -0,0 +1,104 @@ +/* + * Copyright (C) 2011-2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +int memconf_init(const struct uniphier_board_data *bd) +{ + u32 tmp = 0; + unsigned long size_per_word; + + tmp = readl(SG_MEMCONF); + + tmp &= ~(SG_MEMCONF_CH0_SZ_MASK | SG_MEMCONF_CH0_NUM_MASK); + + switch (bd->dram_ch0_width) { + case 16: + tmp |= SG_MEMCONF_CH0_NUM_1; + size_per_word = bd->dram_ch0_size; + break; + case 32: + tmp |= SG_MEMCONF_CH0_NUM_2; + size_per_word = bd->dram_ch0_size >> 1; + break; + default: + pr_err("error: unsupported DRAM Ch0 width\n"); + return -EINVAL; + } + + /* Set DDR size */ + switch (size_per_word) { + case SZ_64M: + tmp |= SG_MEMCONF_CH0_SZ_64M; + break; + case SZ_128M: + tmp |= SG_MEMCONF_CH0_SZ_128M; + break; + case SZ_256M: + tmp |= SG_MEMCONF_CH0_SZ_256M; + break; + case SZ_512M: + tmp |= SG_MEMCONF_CH0_SZ_512M; + break; + case SZ_1G: + tmp |= SG_MEMCONF_CH0_SZ_1G; + break; + default: + pr_err("error: unsupported DRAM Ch0 size\n"); + return -EINVAL; + } + + tmp &= ~(SG_MEMCONF_CH1_SZ_MASK | SG_MEMCONF_CH1_NUM_MASK); + + switch (bd->dram_ch1_width) { + case 16: + tmp |= SG_MEMCONF_CH1_NUM_1; + size_per_word = bd->dram_ch1_size; + break; + case 32: + tmp |= SG_MEMCONF_CH1_NUM_2; + size_per_word = bd->dram_ch1_size >> 1; + break; + default: + pr_err("error: unsupported DRAM Ch1 width\n"); + return -EINVAL; + } + + switch (size_per_word) { + case SZ_64M: + tmp |= SG_MEMCONF_CH1_SZ_64M; + break; + case SZ_128M: + tmp |= SG_MEMCONF_CH1_SZ_128M; + break; + case SZ_256M: + tmp |= SG_MEMCONF_CH1_SZ_256M; + break; + case SZ_512M: + tmp |= SG_MEMCONF_CH1_SZ_512M; + break; + case SZ_1G: + tmp |= SG_MEMCONF_CH1_SZ_1G; + break; + default: + pr_err("error: unsupported DRAM Ch1 size\n"); + return -EINVAL; + } + + if (bd->dram_ch0_base + bd->dram_ch0_size < bd->dram_ch1_base) + tmp |= SG_MEMCONF_SPARSEMEM; + else + tmp &= ~SG_MEMCONF_SPARSEMEM; + + writel(tmp, SG_MEMCONF); + + return 0; +} diff --git a/arch/arm/mach-uniphier/ph1-ld4/Makefile b/arch/arm/mach-uniphier/ph1-ld4/Makefile deleted file mode 100644 index 4b9fe91fb03..00000000000 --- a/arch/arm/mach-uniphier/ph1-ld4/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# SPDX-License-Identifier: GPL-2.0+ -# - -ifdef CONFIG_SPL_BUILD -obj-y += bcu_init.o pll_init.o early_clkrst_init.o \ - pll_spectrum.o umc_init.o ddrphy_init.o -obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o -else -obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o -endif - -obj-y += boot-mode.o diff --git a/arch/arm/mach-uniphier/ph1-ld4/boot-mode.c b/arch/arm/mach-uniphier/ph1-ld4/boot-mode.c deleted file mode 100644 index d359b562919..00000000000 --- a/arch/arm/mach-uniphier/ph1-ld4/boot-mode.c +++ /dev/null @@ -1 +0,0 @@ -#include "../ph1-pro4/boot-mode.c" diff --git a/arch/arm/mach-uniphier/ph1-ld4/early_clkrst_init.c b/arch/arm/mach-uniphier/ph1-ld4/early_clkrst_init.c deleted file mode 100644 index d7ef16b10a1..00000000000 --- a/arch/arm/mach-uniphier/ph1-ld4/early_clkrst_init.c +++ /dev/null @@ -1 +0,0 @@ -#include "../ph1-pro4/early_clkrst_init.c" diff --git a/arch/arm/mach-uniphier/ph1-ld4/pll_spectrum.c b/arch/arm/mach-uniphier/ph1-ld4/pll_spectrum.c deleted file mode 100644 index 837b2a891b7..00000000000 --- a/arch/arm/mach-uniphier/ph1-ld4/pll_spectrum.c +++ /dev/null @@ -1 +0,0 @@ -#include "../ph1-pro4/pll_spectrum.c" diff --git a/arch/arm/mach-uniphier/ph1-pro4/Makefile b/arch/arm/mach-uniphier/ph1-pro4/Makefile deleted file mode 100644 index e8b2c9e8ac2..00000000000 --- a/arch/arm/mach-uniphier/ph1-pro4/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# SPDX-License-Identifier: GPL-2.0+ -# - -ifdef CONFIG_SPL_BUILD -obj-y += pll_init.o early_clkrst_init.o \ - pll_spectrum.o umc_init.o ddrphy_init.o -obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o -else -obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o -endif - -obj-y += boot-mode.o diff --git a/arch/arm/mach-uniphier/ph1-sld3/Makefile b/arch/arm/mach-uniphier/ph1-sld3/Makefile deleted file mode 100644 index 48a3756c1d0..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld3/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# -# SPDX-License-Identifier: GPL-2.0+ -# - -ifdef CONFIG_SPL_BUILD -obj-y += bcu_init.o memconf.o sg_init.o pll_init.o early_clkrst_init.o \ - early_pinctrl.o pll_spectrum.o umc_init.o -obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o -else -obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o -endif - -obj-y += boot-mode.o diff --git a/arch/arm/mach-uniphier/ph1-sld3/clkrst_init.c b/arch/arm/mach-uniphier/ph1-sld3/clkrst_init.c deleted file mode 100644 index 3a3dab7a153..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld3/clkrst_init.c +++ /dev/null @@ -1 +0,0 @@ -#include "../ph1-pro4/clkrst_init.c" diff --git a/arch/arm/mach-uniphier/ph1-sld3/early_clkrst_init.c b/arch/arm/mach-uniphier/ph1-sld3/early_clkrst_init.c deleted file mode 100644 index d7ef16b10a1..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld3/early_clkrst_init.c +++ /dev/null @@ -1 +0,0 @@ -#include "../ph1-pro4/early_clkrst_init.c" diff --git a/arch/arm/mach-uniphier/ph1-sld3/memconf.c b/arch/arm/mach-uniphier/ph1-sld3/memconf.c deleted file mode 100644 index 553a9e33844..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld3/memconf.c +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright (C) 2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -static inline u32 sg_memconf_val_ch2(unsigned long size, int num) -{ - int size_mb = size / num; - u32 ret; - - switch (size_mb) { - case SZ_64M: - ret = SG_MEMCONF_CH2_SZ_64M; - break; - case SZ_128M: - ret = SG_MEMCONF_CH2_SZ_128M; - break; - case SZ_256M: - ret = SG_MEMCONF_CH2_SZ_256M; - break; - case SZ_512M: - ret = SG_MEMCONF_CH2_SZ_512M; - break; - default: - BUG(); - break; - } - - switch (num) { - case 1: - ret |= SG_MEMCONF_CH2_NUM_1; - break; - case 2: - ret |= SG_MEMCONF_CH2_NUM_2; - break; - default: - BUG(); - break; - } - return ret; -} - -u32 memconf_additional_val(void) -{ - return sg_memconf_val_ch2(CONFIG_SDRAM2_SIZE, CONFIG_DDR_NUM_CH2); -} diff --git a/arch/arm/mach-uniphier/ph1-sld3/sg_init.c b/arch/arm/mach-uniphier/ph1-sld3/sg_init.c deleted file mode 100644 index ca3cb9c6b8e..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld3/sg_init.c +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -void sg_init(void) -{ -} diff --git a/arch/arm/mach-uniphier/ph1-sld3/umc_init.c b/arch/arm/mach-uniphier/ph1-sld3/umc_init.c deleted file mode 100644 index 91ee3de2827..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld3/umc_init.c +++ /dev/null @@ -1,15 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include - -int umc_init(void) -{ - /* add UMC init code here */ - printf("Implement memory init code\n"); - - return 0; -} diff --git a/arch/arm/mach-uniphier/ph1-sld8/Makefile b/arch/arm/mach-uniphier/ph1-sld8/Makefile deleted file mode 100644 index 8eb575e1d38..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld8/Makefile +++ /dev/null @@ -1 +0,0 @@ -include $(src)/../ph1-ld4/Makefile diff --git a/arch/arm/mach-uniphier/ph1-sld8/bcu_init.c b/arch/arm/mach-uniphier/ph1-sld8/bcu_init.c deleted file mode 100644 index 69b172e4e7b..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld8/bcu_init.c +++ /dev/null @@ -1 +0,0 @@ -#include "../ph1-ld4/bcu_init.c" diff --git a/arch/arm/mach-uniphier/ph1-sld8/boot-mode.c b/arch/arm/mach-uniphier/ph1-sld8/boot-mode.c deleted file mode 100644 index d359b562919..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld8/boot-mode.c +++ /dev/null @@ -1 +0,0 @@ -#include "../ph1-pro4/boot-mode.c" diff --git a/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c b/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c deleted file mode 100644 index 8d3435d6321..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c +++ /dev/null @@ -1 +0,0 @@ -#include "../ph1-ld4/clkrst_init.c" diff --git a/arch/arm/mach-uniphier/ph1-sld8/early_clkrst_init.c b/arch/arm/mach-uniphier/ph1-sld8/early_clkrst_init.c deleted file mode 100644 index dd236b7e500..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld8/early_clkrst_init.c +++ /dev/null @@ -1 +0,0 @@ -#include "../ph1-ld4/early_clkrst_init.c" diff --git a/arch/arm/mach-uniphier/ph1-sld8/pll_spectrum.c b/arch/arm/mach-uniphier/ph1-sld8/pll_spectrum.c deleted file mode 100644 index 9b8c4855e58..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld8/pll_spectrum.c +++ /dev/null @@ -1 +0,0 @@ -#include "../ph1-ld4/pll_spectrum.c" diff --git a/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c b/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c deleted file mode 100644 index 225c0d24de3..00000000000 --- a/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c +++ /dev/null @@ -1 +0,0 @@ -#include "../ph1-ld4/sbc_init.c" diff --git a/arch/arm/mach-uniphier/pinctrl/Makefile b/arch/arm/mach-uniphier/pinctrl/Makefile new file mode 100644 index 00000000000..542c670f978 --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/Makefile @@ -0,0 +1,4 @@ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += pinctrl-ph1-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o diff --git a/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c similarity index 97% rename from arch/arm/mach-uniphier/ph1-ld4/pinctrl.c rename to arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c index 293a6ab4234..160d3ef2991 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c @@ -5,9 +5,10 @@ */ #include +#include #include -void pin_init(void) +void ph1_ld4_pin_init(void) { u32 tmp; diff --git a/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c similarity index 97% rename from arch/arm/mach-uniphier/ph1-pro4/pinctrl.c rename to arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c index bfaff4fea9a..f50644c52bb 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c @@ -5,9 +5,10 @@ */ #include +#include #include -void pin_init(void) +void ph1_pro4_pin_init(void) { /* Comment format: PAD Name -> Function Name */ diff --git a/arch/arm/mach-uniphier/ph1-sld3/pinctrl.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c similarity index 91% rename from arch/arm/mach-uniphier/ph1-sld3/pinctrl.c rename to arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c index dea938ed2fa..f1b2bbbb4a2 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/pinctrl.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c @@ -4,9 +4,10 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include -void pin_init(void) +void ph1_sld3_pin_init(void) { #ifdef CONFIG_USB_EHCI_UNIPHIER sg_set_pinsel(13, 0, 4, 4); /* USB0OC */ diff --git a/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c similarity index 96% rename from arch/arm/mach-uniphier/ph1-sld8/pinctrl.c rename to arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c index 1b64414553b..f936a53d1f1 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c @@ -5,9 +5,10 @@ */ #include +#include #include -void pin_init(void) +void ph1_sld8_pin_init(void) { /* Comment format: PAD Name -> Function Name */ diff --git a/arch/arm/mach-uniphier/pll/Makefile b/arch/arm/mach-uniphier/pll/Makefile new file mode 100644 index 00000000000..d33f99e4461 --- /dev/null +++ b/arch/arm/mach-uniphier/pll/Makefile @@ -0,0 +1,8 @@ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += pll-init-ph1-sld3.o \ + pll-spectrum-ph1-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += pll-init-ph1-ld4.o \ + pll-spectrum-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += pll-init-ph1-pro4.o \ + pll-spectrum-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += pll-init-ph1-sld8.o \ + pll-spectrum-ph1-ld4.o diff --git a/arch/arm/mach-uniphier/ph1-ld4/pll_init.c b/arch/arm/mach-uniphier/pll/pll-init-ph1-ld4.c similarity index 90% rename from arch/arm/mach-uniphier/ph1-ld4/pll_init.c rename to arch/arm/mach-uniphier/pll/pll-init-ph1-ld4.c index f8ec2b61fb4..a272a900e11 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/pll_init.c +++ b/arch/arm/mach-uniphier/pll/pll-init-ph1-ld4.c @@ -5,13 +5,15 @@ */ #include +#include #include +#include #include #include #undef DPLL_SSC_RATE_1PER -static void dpll_init(void) +static int dpll_init(unsigned int dram_freq) { u32 tmp; @@ -22,13 +24,17 @@ static void dpll_init(void) */ tmp = readl(SC_DPLLCTRL); tmp &= ~0x000f0000; -#if CONFIG_DDR_FREQ == 1600 - tmp |= 0x000c0000; -#elif CONFIG_DDR_FREQ == 1333 - tmp |= 0x000d0000; -#else -# error "Unknown frequency" -#endif + switch (dram_freq) { + case 1333: + tmp |= 0x000d0000; + break; + case 1600: + tmp |= 0x000c0000; + break; + default: + pr_err("Unsupported frequency"); + return -EINVAL; + } #if defined(DPLL_SSC_RATE_1PER) tmp &= ~SC_DPLLCTRL_SSC_RATE; @@ -40,6 +46,8 @@ static void dpll_init(void) tmp = readl(SC_DPLLCTRL2); tmp |= SC_DPLLCTRL2_NRSTDS; writel(tmp, SC_DPLLCTRL2); + + return 0; } static void upll_init(void) @@ -174,9 +182,13 @@ static void vpll_init(void) writel(tmp, SC_VPLL27BCTRL); } -void pll_init(void) +int ph1_ld4_pll_init(const struct uniphier_board_data *bd) { - dpll_init(); + int ret; + + ret = dpll_init(bd->dram_freq); + if (ret) + return ret; upll_init(); vpll_init(); @@ -186,4 +198,6 @@ void pll_init(void) * so 20 usec can be saved here. */ udelay(480); + + return 0; } diff --git a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c b/arch/arm/mach-uniphier/pll/pll-init-ph1-pro4.c similarity index 88% rename from arch/arm/mach-uniphier/ph1-pro4/pll_init.c rename to arch/arm/mach-uniphier/pll/pll-init-ph1-pro4.c index 8ae8ed65b87..906c22f6c58 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c +++ b/arch/arm/mach-uniphier/pll/pll-init-ph1-pro4.c @@ -5,13 +5,15 @@ */ #include +#include #include +#include #include #include #undef DPLL_SSC_RATE_1PER -static void dpll_init(void) +static int dpll_init(unsigned int dram_freq) { u32 tmp; @@ -22,13 +24,17 @@ static void dpll_init(void) */ tmp = readl(SC_DPLLCTRL); tmp &= ~(0x000f0000); -#if CONFIG_DDR_FREQ == 1600 - tmp |= 0x000c0000; -#elif CONFIG_DDR_FREQ == 1333 - tmp |= 0x000d0000; -#else -# error "Unsupported frequency" -#endif + switch (dram_freq) { + case 1333: + tmp |= 0x000d0000; + break; + case 1600: + tmp |= 0x000c0000; + break; + default: + pr_err("Unsupported frequency"); + return -EINVAL; + } /* * Set Moduration rate @@ -44,6 +50,8 @@ static void dpll_init(void) tmp = readl(SC_DPLLCTRL2); tmp |= SC_DPLLCTRL2_NRSTDS; writel(tmp, SC_DPLLCTRL2); + + return 0; } static void vpll_init(void) @@ -136,9 +144,13 @@ static void vpll_init(void) writel(tmp, SC_VPLL27BCTRL); } -void pll_init(void) +int ph1_pro4_pll_init(const struct uniphier_board_data *bd) { - dpll_init(); + int ret; + + ret = dpll_init(bd->dram_freq); + if (ret) + return ret; vpll_init(); /* @@ -146,4 +158,6 @@ void pll_init(void) * We wait 1 usec in vpll_init() so 1 usec can be saved here. */ udelay(499); + + return 0; } diff --git a/arch/arm/mach-uniphier/ph1-sld3/pll_init.c b/arch/arm/mach-uniphier/pll/pll-init-ph1-sld3.c similarity index 62% rename from arch/arm/mach-uniphier/ph1-sld3/pll_init.c rename to arch/arm/mach-uniphier/pll/pll-init-ph1-sld3.c index ebd1c310b7a..6294a452c29 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/pll_init.c +++ b/arch/arm/mach-uniphier/pll/pll-init-ph1-sld3.c @@ -4,7 +4,10 @@ * SPDX-License-Identifier: GPL-2.0+ */ -void pll_init(void) +#include + +int ph1_sld3_pll_init(const struct uniphier_board_data *bd) { /* add pll init code here */ + return 0; } diff --git a/arch/arm/mach-uniphier/ph1-sld8/pll_init.c b/arch/arm/mach-uniphier/pll/pll-init-ph1-sld8.c similarity index 97% rename from arch/arm/mach-uniphier/ph1-sld8/pll_init.c rename to arch/arm/mach-uniphier/pll/pll-init-ph1-sld8.c index 109cb5fee08..f249abeeda3 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/pll_init.c +++ b/arch/arm/mach-uniphier/pll/pll-init-ph1-sld8.c @@ -6,6 +6,7 @@ #include #include +#include #include #include @@ -186,7 +187,7 @@ static void vpll_init(void) writel(tmp, SC_VPLL27BCTRL); } -void pll_init(void) +int ph1_sld8_pll_init(const struct uniphier_board_data *bd) { dpll_init(); upll_init(); @@ -198,4 +199,6 @@ void pll_init(void) * so 20 usec can be saved here. */ udelay(480); + + return 0; } diff --git a/arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c b/arch/arm/mach-uniphier/pll/pll-spectrum-ph1-ld4.c similarity index 72% rename from arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c rename to arch/arm/mach-uniphier/pll/pll-spectrum-ph1-ld4.c index fcf2ad282a7..cad0ed8cdd4 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c +++ b/arch/arm/mach-uniphier/pll/pll-spectrum-ph1-ld4.c @@ -4,15 +4,17 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include #include +#include #include -void enable_dpll_ssc(void) +int ph1_ld4_enable_dpll_ssc(const struct uniphier_board_data *bd) { u32 tmp; tmp = readl(SC_DPLLCTRL); tmp |= SC_DPLLCTRL_SSC_EN; writel(tmp, SC_DPLLCTRL); + + return 0; } diff --git a/arch/arm/mach-uniphier/ph1-sld3/pll_spectrum.c b/arch/arm/mach-uniphier/pll/pll-spectrum-ph1-sld3.c similarity index 73% rename from arch/arm/mach-uniphier/ph1-sld3/pll_spectrum.c rename to arch/arm/mach-uniphier/pll/pll-spectrum-ph1-sld3.c index fcf2ad282a7..43dc9736549 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/pll_spectrum.c +++ b/arch/arm/mach-uniphier/pll/pll-spectrum-ph1-sld3.c @@ -6,13 +6,16 @@ #include #include +#include #include -void enable_dpll_ssc(void) +int ph1_sld3_enable_dpll_ssc(const struct uniphier_board_data *bd) { u32 tmp; tmp = readl(SC_DPLLCTRL); tmp |= SC_DPLLCTRL_SSC_EN; writel(tmp, SC_DPLLCTRL); + + return 0; } diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile new file mode 100644 index 00000000000..68ffd1c626b --- /dev/null +++ b/arch/arm/mach-uniphier/sbc/Makefile @@ -0,0 +1,4 @@ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += sbc-ph1-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += sbc-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += sbc-ph1-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += sbc-ph1-ld4.o diff --git a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c b/arch/arm/mach-uniphier/sbc/sbc-ph1-ld4.c similarity index 92% rename from arch/arm/mach-uniphier/ph1-ld4/sbc_init.c rename to arch/arm/mach-uniphier/sbc/sbc-ph1-ld4.c index 4435a47e73c..929f50a883a 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c +++ b/arch/arm/mach-uniphier/sbc/sbc-ph1-ld4.c @@ -6,10 +6,11 @@ #include #include +#include #include #include -void sbc_init(void) +int ph1_ld4_sbc_init(const struct uniphier_board_data *bd) { u32 tmp; @@ -46,4 +47,6 @@ void sbc_init(void) writel(0x0000be01, SBBASE0); /* dummy */ writel(0x0200be01, SBBASE1); } + + return 0; } diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c b/arch/arm/mach-uniphier/sbc/sbc-ph1-pro4.c similarity index 91% rename from arch/arm/mach-uniphier/ph1-pro4/sbc_init.c rename to arch/arm/mach-uniphier/sbc/sbc-ph1-pro4.c index 685f9c736c9..1032c54e644 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c +++ b/arch/arm/mach-uniphier/sbc/sbc-ph1-pro4.c @@ -6,10 +6,11 @@ #include #include +#include #include #include -void sbc_init(void) +int ph1_pro4_sbc_init(const struct uniphier_board_data *bd) { /* * Only CS1 is connected to support card. @@ -39,4 +40,6 @@ void sbc_init(void) writel(0x0000be01, SBBASE0); /* dummy */ writel(0x0200be01, SBBASE1); } + + return 0; } diff --git a/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c b/arch/arm/mach-uniphier/sbc/sbc-ph1-sld3.c similarity index 92% rename from arch/arm/mach-uniphier/ph1-sld3/sbc_init.c rename to arch/arm/mach-uniphier/sbc/sbc-ph1-sld3.c index 3e62121ba95..fb707be83a2 100644 --- a/arch/arm/mach-uniphier/ph1-sld3/sbc_init.c +++ b/arch/arm/mach-uniphier/sbc/sbc-ph1-sld3.c @@ -6,10 +6,11 @@ #include #include +#include #include #include -void sbc_init(void) +int ph1_sld3_sbc_init(const struct uniphier_board_data *bd) { /* only address/data multiplex mode is supported */ @@ -42,4 +43,6 @@ void sbc_init(void) } sg_set_pinsel(99, 1, 4, 4); /* GPIO26 -> EA24 */ + + return 0; } diff --git a/arch/arm/mach-uniphier/soc_info.c b/arch/arm/mach-uniphier/soc_info.c new file mode 100644 index 00000000000..3e8e7f4ef33 --- /dev/null +++ b/arch/arm/mach-uniphier/soc_info.c @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#if UNIPHIER_MULTI_SOC +enum uniphier_soc_id uniphier_get_soc_type(void) +{ + u32 revision = readl(SG_REVISION); + enum uniphier_soc_id ret; + + switch ((revision & SG_REVISION_TYPE_MASK) >> SG_REVISION_TYPE_SHIFT) { +#ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD3 + case 0x25: + ret = SOC_UNIPHIER_PH1_SLD3; + break; +#endif +#ifdef CONFIG_ARCH_UNIPHIER_PH1_LD4 + case 0x26: + ret = SOC_UNIPHIER_PH1_LD4; + break; +#endif +#ifdef CONFIG_ARCH_UNIPHIER_PH1_PRO4 + case 0x28: + ret = SOC_UNIPHIER_PH1_PRO4; + break; +#endif +#ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD8 + case 0x29: + ret = SOC_UNIPHIER_PH1_SLD8; + break; +#endif +#ifdef CONFIG_ARCH_UNIPHIER_PH1_PRO5 + case 0x2A: + ret = SOC_UNIPHIER_PH1_PRO5; + break; +#endif +#ifdef CONFIG_ARCH_UNIPHIER_PROXSTREAM2 + case 0x2E: + ret = SOC_UNIPHIER_PROXSTREAM2; + break; +#endif +#ifdef CONFIG_ARCH_UNIPHIER_PH1_LD6B + case 0x2F: + ret = SOC_UNIPHIER_PH1_LD6B; + break; +#endif + default: + ret = SOC_UNIPHIER_UNKNOWN; + break; + } + + return ret; +} +#endif diff --git a/arch/arm/mach-uniphier/umc/Makefile b/arch/arm/mach-uniphier/umc/Makefile new file mode 100644 index 00000000000..dd35e77dab4 --- /dev/null +++ b/arch/arm/mach-uniphier/umc/Makefile @@ -0,0 +1,3 @@ +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += umc-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += umc-ph1-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += umc-ph1-sld8.o diff --git a/arch/arm/mach-uniphier/ph1-ld4/umc_init.c b/arch/arm/mach-uniphier/umc/umc-ph1-ld4.c similarity index 88% rename from arch/arm/mach-uniphier/ph1-ld4/umc_init.c rename to arch/arm/mach-uniphier/umc/umc-ph1-ld4.c index a7a4157e793..81246850b38 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/umc_init.c +++ b/arch/arm/mach-uniphier/umc/umc-ph1-ld4.c @@ -5,7 +5,10 @@ */ #include +#include #include +#include +#include #include #include @@ -136,14 +139,14 @@ static int umc_init_sub(int freq, int size_ch0, int size_ch1) writel(0x00000101, dramcont0 + UMC_DIOCTLA); - ddrphy_init(phy0_0, freq, size_ch0); + ph1_ld4_ddrphy_init(phy0_0, freq, size_ch0); ddrphy_prepare_training(phy0_0, 0); ddrphy_training(phy0_0); writel(0x00000101, dramcont1 + UMC_DIOCTLA); - ddrphy_init(phy1_0, freq, size_ch1); + ph1_ld4_ddrphy_init(phy1_0, freq, size_ch1); ddrphy_prepare_training(phy1_0, 1); ddrphy_training(phy1_0); @@ -156,16 +159,17 @@ static int umc_init_sub(int freq, int size_ch0, int size_ch1) return 0; } -int umc_init(void) +int ph1_ld4_umc_init(const struct uniphier_board_data *bd) { - return umc_init_sub(CONFIG_DDR_FREQ, CONFIG_SDRAM0_SIZE / 0x08000000, - CONFIG_SDRAM1_SIZE / 0x08000000); + if ((bd->dram_ch0_size == SZ_128M || bd->dram_ch0_size == SZ_256M) && + (bd->dram_ch1_size == SZ_128M || bd->dram_ch1_size == SZ_256M) && + (bd->dram_freq == 1333 || bd->dram_freq == 1600) && + bd->dram_ch0_width == 16 && bd->dram_ch1_width == 16) { + return umc_init_sub(bd->dram_freq, + bd->dram_ch0_size / SZ_128M, + bd->dram_ch1_size / SZ_128M); + } else { + pr_err("Unsupported DDR configuration\n"); + return -EINVAL; + } } - -#if (CONFIG_SDRAM0_SIZE == 0x08000000 || CONFIG_SDRAM0_SIZE == 0x10000000) && \ - (CONFIG_SDRAM1_SIZE == 0x08000000 || CONFIG_SDRAM1_SIZE == 0x10000000) && \ - CONFIG_DDR_NUM_CH0 == 1 && CONFIG_DDR_NUM_CH1 == 1 -/* OK */ -#else -#error Unsupported DDR configuration. -#endif diff --git a/arch/arm/mach-uniphier/ph1-pro4/umc_init.c b/arch/arm/mach-uniphier/umc/umc-ph1-pro4.c similarity index 85% rename from arch/arm/mach-uniphier/ph1-pro4/umc_init.c rename to arch/arm/mach-uniphier/umc/umc-ph1-pro4.c index bd8b9d83b2b..8c9f0579fc7 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/umc_init.c +++ b/arch/arm/mach-uniphier/umc/umc-ph1-pro4.c @@ -5,7 +5,10 @@ */ #include +#include #include +#include +#include #include #include @@ -107,28 +110,28 @@ static int umc_init_sub(int freq, int size_ch0, int size_ch1) writel(0x00000101, dramcont0 + UMC_DIOCTLA); - ddrphy_init(phy0_0, freq, size_ch0); + ph1_pro4_ddrphy_init(phy0_0, freq, size_ch0); ddrphy_prepare_training(phy0_0, 0); ddrphy_training(phy0_0); writel(0x00000103, dramcont0 + UMC_DIOCTLA); - ddrphy_init(phy0_1, freq, size_ch0); + ph1_pro4_ddrphy_init(phy0_1, freq, size_ch0); ddrphy_prepare_training(phy0_1, 1); ddrphy_training(phy0_1); writel(0x00000101, dramcont1 + UMC_DIOCTLA); - ddrphy_init(phy1_0, freq, size_ch1); + ph1_pro4_ddrphy_init(phy1_0, freq, size_ch1); ddrphy_prepare_training(phy1_0, 0); ddrphy_training(phy1_0); writel(0x00000103, dramcont1 + UMC_DIOCTLA); - ddrphy_init(phy1_1, freq, size_ch1); + ph1_pro4_ddrphy_init(phy1_1, freq, size_ch1); ddrphy_prepare_training(phy1_1, 1); ddrphy_training(phy1_1); @@ -141,17 +144,18 @@ static int umc_init_sub(int freq, int size_ch0, int size_ch1) return 0; } -int umc_init(void) +int ph1_pro4_umc_init(const struct uniphier_board_data *bd) { - return umc_init_sub(CONFIG_DDR_FREQ, CONFIG_SDRAM0_SIZE / 0x08000000, - CONFIG_SDRAM1_SIZE / 0x08000000); + if (((bd->dram_ch0_size == SZ_512M && bd->dram_ch0_width == 32) || + (bd->dram_ch0_size == SZ_256M && bd->dram_ch0_width == 16)) && + ((bd->dram_ch1_size == SZ_512M && bd->dram_ch1_width == 32) || + (bd->dram_ch1_size == SZ_256M && bd->dram_ch1_width == 16)) && + bd->dram_freq == 1600) { + return umc_init_sub(bd->dram_freq, + bd->dram_ch0_size / SZ_128M, + bd->dram_ch1_size / SZ_128M); + } else { + pr_err("Unsupported DDR configuration\n"); + return -EINVAL; + } } - -#if ((CONFIG_SDRAM0_SIZE == 0x20000000 && CONFIG_DDR_NUM_CH0 == 2) || \ - (CONFIG_SDRAM0_SIZE == 0x10000000 && CONFIG_DDR_NUM_CH0 == 1)) && \ - ((CONFIG_SDRAM1_SIZE == 0x20000000 && CONFIG_DDR_NUM_CH1 == 2) || \ - (CONFIG_SDRAM1_SIZE == 0x10000000 && CONFIG_DDR_NUM_CH1 == 1)) -/* OK */ -#else - #error Unsupported DDR configuration. -#endif diff --git a/arch/arm/mach-uniphier/ph1-sld8/umc_init.c b/arch/arm/mach-uniphier/umc/umc-ph1-sld8.c similarity index 87% rename from arch/arm/mach-uniphier/ph1-sld8/umc_init.c rename to arch/arm/mach-uniphier/umc/umc-ph1-sld8.c index 7baea7e8528..bc60a3472e1 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/umc_init.c +++ b/arch/arm/mach-uniphier/umc/umc-ph1-sld8.c @@ -5,7 +5,10 @@ */ #include +#include #include +#include +#include #include #include @@ -116,14 +119,14 @@ static int umc_init_sub(int freq, int size_ch0, int size_ch1) writel(0x00000101, dramcont0 + UMC_DIOCTLA); - ddrphy_init(phy0_0, freq, size_ch0); + ph1_sld8_ddrphy_init(phy0_0, freq, size_ch0); ddrphy_prepare_training(phy0_0, 0); ddrphy_training(phy0_0); writel(0x00000101, dramcont1 + UMC_DIOCTLA); - ddrphy_init(phy1_0, freq, size_ch1); + ph1_sld8_ddrphy_init(phy1_0, freq, size_ch1); ddrphy_prepare_training(phy1_0, 1); ddrphy_training(phy1_0); @@ -136,16 +139,17 @@ static int umc_init_sub(int freq, int size_ch0, int size_ch1) return 0; } -int umc_init(void) +int ph1_sld8_umc_init(const struct uniphier_board_data *bd) { - return umc_init_sub(CONFIG_DDR_FREQ, CONFIG_SDRAM0_SIZE / 0x08000000, - CONFIG_SDRAM1_SIZE / 0x08000000); + if ((bd->dram_ch0_size == SZ_128M || bd->dram_ch0_size == SZ_256M) && + (bd->dram_ch1_size == SZ_128M || bd->dram_ch1_size == SZ_256M) && + bd->dram_freq == 1333 && + bd->dram_ch0_width == 16 && bd->dram_ch1_width == 16) { + return umc_init_sub(bd->dram_freq, + bd->dram_ch0_size / SZ_128M, + bd->dram_ch1_size / SZ_128M); + } else { + pr_err("Unsupported DDR configuration\n"); + return -EINVAL; + } } - -#if (CONFIG_SDRAM0_SIZE == 0x08000000 || CONFIG_SDRAM0_SIZE == 0x10000000) && \ - (CONFIG_SDRAM1_SIZE == 0x08000000 || CONFIG_SDRAM1_SIZE == 0x10000000) && \ - CONFIG_DDR_NUM_CH0 == 1 && CONFIG_DDR_NUM_CH1 == 1 -/* OK */ -#else -#error Unsupported DDR configuration. -#endif diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 139767a6ee3..aaf1f460388 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ARCH_UNIPHIER_PH1_PRO4=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref" diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index f44c58bf9d0..9109b7f8d9d 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -9,53 +9,6 @@ #ifndef __CONFIG_UNIPHIER_COMMON_H__ #define __CONFIG_UNIPHIER_COMMON_H__ -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) -#define CONFIG_DDR_NUM_CH0 2 -#define CONFIG_DDR_NUM_CH1 1 -#define CONFIG_DDR_NUM_CH2 1 - -/* Physical start address of SDRAM */ -#define CONFIG_SDRAM0_BASE 0x80000000 -#define CONFIG_SDRAM0_SIZE 0x20000000 -#define CONFIG_SDRAM1_BASE 0xc0000000 -#define CONFIG_SDRAM1_SIZE 0x20000000 -#define CONFIG_SDRAM2_BASE 0xc0000000 -#define CONFIG_SDRAM2_SIZE 0x10000000 -#endif - -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) -#define CONFIG_DDR_NUM_CH0 1 -#define CONFIG_DDR_NUM_CH1 1 - -/* Physical start address of SDRAM */ -#define CONFIG_SDRAM0_BASE 0x80000000 -#define CONFIG_SDRAM0_SIZE 0x10000000 -#define CONFIG_SDRAM1_BASE 0x90000000 -#define CONFIG_SDRAM1_SIZE 0x10000000 -#endif - -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) -#define CONFIG_DDR_NUM_CH0 2 -#define CONFIG_DDR_NUM_CH1 2 - -/* Physical start address of SDRAM */ -#define CONFIG_SDRAM0_BASE 0x80000000 -#define CONFIG_SDRAM0_SIZE 0x20000000 -#define CONFIG_SDRAM1_BASE 0xa0000000 -#define CONFIG_SDRAM1_SIZE 0x20000000 -#endif - -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) -#define CONFIG_DDR_NUM_CH0 1 -#define CONFIG_DDR_NUM_CH1 1 - -/* Physical start address of SDRAM */ -#define CONFIG_SDRAM0_BASE 0x80000000 -#define CONFIG_SDRAM0_SIZE 0x10000000 -#define CONFIG_SDRAM1_BASE 0x90000000 -#define CONFIG_SDRAM1_SIZE 0x10000000 -#endif - #define CONFIG_I2C_EEPROM #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 @@ -285,8 +238,7 @@ defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) #define CONFIG_SPL_TEXT_BASE 0x00040000 -#endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) +#else #define CONFIG_SPL_TEXT_BASE 0x00100000 #endif From 28f40d4a4db2b6c701d349fd4fac286d21369de2 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:40 +0900 Subject: [PATCH 30/33] ARM: uniphier: add PH1-Pro5 support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada --- arch/arm/dts/Makefile | 1 + arch/arm/dts/uniphier-ph1-pro5-4kbox.dts | 64 ++++++++++++++++ arch/arm/mach-uniphier/Kconfig | 9 +++ arch/arm/mach-uniphier/board_early_init_f.c | 7 ++ arch/arm/mach-uniphier/boards.c | 15 ++++ arch/arm/mach-uniphier/boot-mode/Makefile | 1 + .../boot-mode/boot-mode-ph1-pro5.c | 75 +++++++++++++++++++ arch/arm/mach-uniphier/boot-mode/boot-mode.c | 4 + arch/arm/mach-uniphier/clk/Makefile | 1 + arch/arm/mach-uniphier/clk/clk-ph1-pro5.c | 44 +++++++++++ arch/arm/mach-uniphier/cmd_pinmon.c | 5 ++ arch/arm/mach-uniphier/debug_ll.S | 24 ++++++ arch/arm/mach-uniphier/early-clk/Makefile | 1 + .../early-clk/early-clk-ph1-pro5.c | 39 ++++++++++ .../mach-uniphier/include/mach/boot-device.h | 2 + arch/arm/mach-uniphier/include/mach/init.h | 4 + arch/arm/mach-uniphier/include/mach/sc-regs.h | 21 ++++++ arch/arm/mach-uniphier/include/mach/sg-regs.h | 2 +- arch/arm/mach-uniphier/init/Makefile | 1 + arch/arm/mach-uniphier/init/init-ph1-pro5.c | 42 +++++++++++ arch/arm/mach-uniphier/init/init.c | 5 ++ arch/arm/mach-uniphier/pinctrl/Makefile | 1 + .../mach-uniphier/pinctrl/pinctrl-ph1-pro5.c | 43 +++++++++++ arch/arm/mach-uniphier/sbc/Makefile | 1 + configs/ph1_pro5_defconfig | 30 ++++++++ doc/README.uniphier | 4 + 26 files changed, 445 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/uniphier-ph1-pro5-4kbox.dts create mode 100644 arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-pro5.c create mode 100644 arch/arm/mach-uniphier/clk/clk-ph1-pro5.c create mode 100644 arch/arm/mach-uniphier/early-clk/early-clk-ph1-pro5.c create mode 100644 arch/arm/mach-uniphier/init/init-ph1-pro5.c create mode 100644 arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro5.c create mode 100644 configs/ph1_pro5_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5afe8a91fd6..0a7d18431de 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -45,6 +45,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER) += \ uniphier-ph1-ld4-ref.dtb \ uniphier-ph1-ld6b-ref.dtb \ uniphier-ph1-pro4-ref.dtb \ + uniphier-ph1-pro5-4kbox.dtb \ uniphier-ph1-sld3-ref.dtb \ uniphier-ph1-sld8-ref.dtb dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \ diff --git a/arch/arm/dts/uniphier-ph1-pro5-4kbox.dts b/arch/arm/dts/uniphier-ph1-pro5-4kbox.dts new file mode 100644 index 00000000000..912bc27beaa --- /dev/null +++ b/arch/arm/dts/uniphier-ph1-pro5-4kbox.dts @@ -0,0 +1,64 @@ +/* + * Device Tree Source for UniPhier PH1-Pro5 4KBOX Board (EVB-Pro5-4KBOX-M-V0) + * + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +/include/ "uniphier-ph1-pro5.dtsi" + +/ { + model = "UniPhier PH1-Pro5 4KBOX Board"; + compatible = "socionext,ph1-pro5-4kbox", "socionext,ph1-pro5"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + chosen { + bootargs = "console=ttyS1,115200"; + stdout-path = &serial1; + }; + + aliases { + serial1 = &serial1; + serial2 = &serial2; + i2c0 = &i2c0; + i2c5 = &i2c5; + i2c6 = &i2c6; + }; +}; + +&serial1 { + status = "okay"; +}; + +&serial2 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +/* for U-boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&serial1 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart1 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 2cc5dac0700..7a62957de30 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -33,6 +33,15 @@ config ARCH_UNIPHIER_PH1_SLD8 help This enables support for UniPhier PH1-sLD8 SoC. +config ARCH_UNIPHIER_PH1_PRO5 + bool "UniPhier PH1-Pro5 SoC" + select UNIPHIER_SMP + depends on !ARCH_UNIPHIER_PH1_SLD3 && \ + !ARCH_UNIPHIER_PH1_LD4 && \ + !ARCH_UNIPHIER_PH1_SLD8 + help + This enables support for UniPhier PH1-Pro5 SoC. + config MICRO_SUPPORT_CARD bool "Use Micro Support Card" help diff --git a/arch/arm/mach-uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c index cd516c3121a..fb4927222c1 100644 --- a/arch/arm/mach-uniphier/board_early_init_f.c +++ b/arch/arm/mach-uniphier/board_early_init_f.c @@ -40,6 +40,13 @@ int board_early_init_f(void) led_puts("U1"); ph1_ld4_clk_init(); break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) + case SOC_UNIPHIER_PH1_PRO5: + ph1_pro5_pin_init(); + led_puts("U1"); + ph1_pro5_clk_init(); + break; #endif default: break; diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c index 6a5ea2e585f..fba88597120 100644 --- a/arch/arm/mach-uniphier/boards.c +++ b/arch/arm/mach-uniphier/boards.c @@ -59,6 +59,18 @@ static const struct uniphier_board_data ph1_sld8_data = { }; #endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) +static const struct uniphier_board_data ph1_pro5_data = { + .dram_ch0_base = 0x80000000, + .dram_ch0_size = 0x20000000, + .dram_ch0_width = 32, + .dram_ch1_base = 0xa0000000, + .dram_ch1_size = 0x20000000, + .dram_ch1_width = 32, + .dram_freq = 1866, +}; +#endif + struct uniphier_board_id { const char *compatible; const struct uniphier_board_data *param; @@ -77,6 +89,9 @@ static const struct uniphier_board_id uniphier_boards[] = { #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) { "socionext,ph1-sld8", &ph1_sld8_data, }, #endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) + { "socionext,ph1-pro5", &ph1_pro5_data, }, +#endif }; const struct uniphier_board_data *uniphier_get_board_param(const void *fdt) diff --git a/arch/arm/mach-uniphier/boot-mode/Makefile b/arch/arm/mach-uniphier/boot-mode/Makefile index bd6d0a3d7c9..1d2f8b39466 100644 --- a/arch/arm/mach-uniphier/boot-mode/Makefile +++ b/arch/arm/mach-uniphier/boot-mode/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += boot-mode-ph1-sld3.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += boot-mode-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += boot-mode-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += boot-mode-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += boot-mode-ph1-pro5.o diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-pro5.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-pro5.c new file mode 100644 index 00000000000..c68cb59fc0c --- /dev/null +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-pro5.c @@ -0,0 +1,75 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +static struct boot_device_info boot_device_table[] = { + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128MB, Addr 4)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512MB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128MB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, + { /* sentinel */ } +}; + +static int get_boot_mode_sel(void) +{ + return (readl(SG_PINMON0) >> 1) & 0x1f; +} + +u32 ph1_pro5_boot_device(void) +{ + int boot_mode; + + boot_mode = get_boot_mode_sel(); + + return boot_device_table[boot_mode].type; +} + +void ph1_pro5_boot_mode_show(void) +{ + int mode_sel, i; + + mode_sel = get_boot_mode_sel(); + + puts("Boot Mode Pin:\n"); + + for (i = 0; i < ARRAY_SIZE(boot_device_table); i++) + printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i, + boot_device_table[i].info); +} diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c index 71abdef1f4d..60329eb10aa 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c @@ -28,6 +28,10 @@ u32 spl_boot_device(void) case SOC_UNIPHIER_PH1_PRO4: case SOC_UNIPHIER_PH1_SLD8: return ph1_ld4_boot_device(); +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) + case SOC_UNIPHIER_PH1_PRO5: + return ph1_pro5_boot_device(); #endif default: return BOOT_DEVICE_NONE; diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile index e6931d6461b..873c4f72079 100644 --- a/arch/arm/mach-uniphier/clk/Makefile +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += clk-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += clk-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += clk-ph1-pro4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += clk-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += clk-ph1-pro5.o diff --git a/arch/arm/mach-uniphier/clk/clk-ph1-pro5.c b/arch/arm/mach-uniphier/clk/clk-ph1-pro5.c new file mode 100644 index 00000000000..f78edbbe3fe --- /dev/null +++ b/arch/arm/mach-uniphier/clk/clk-ph1-pro5.c @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +void ph1_pro5_clk_init(void) +{ + u32 tmp; + + /* deassert reset */ + tmp = readl(SC_RSTCTRL); +#ifdef CONFIG_USB_XHCI_UNIPHIER + tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; +#endif +#ifdef CONFIG_NAND_DENALI + tmp |= SC_RSTCTRL_NRST_NAND; +#endif + writel(tmp, SC_RSTCTRL); + readl(SC_RSTCTRL); /* dummy read */ + +#ifdef CONFIG_USB_XHCI_UNIPHIER + tmp = readl(SC_RSTCTRL2); + tmp |= SC_RSTCTRL2_NRST_USB3B1; + writel(tmp, SC_RSTCTRL2); + readl(SC_RSTCTRL2); /* dummy read */ +#endif + + /* privide clocks */ + tmp = readl(SC_CLKCTRL); +#ifdef CONFIG_USB_XHCI_UNIPHIER + tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | + SC_CLKCTRL_CEN_GIO; +#endif +#ifdef CONFIG_NAND_DENALI + tmp |= SC_CLKCTRL_CEN_NAND; +#endif + writel(tmp, SC_CLKCTRL); + readl(SC_CLKCTRL); /* dummy read */ +} diff --git a/arch/arm/mach-uniphier/cmd_pinmon.c b/arch/arm/mach-uniphier/cmd_pinmon.c index a61d40e6c5a..58c53bf1936 100644 --- a/arch/arm/mach-uniphier/cmd_pinmon.c +++ b/arch/arm/mach-uniphier/cmd_pinmon.c @@ -27,6 +27,11 @@ static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) case SOC_UNIPHIER_PH1_SLD8: ph1_ld4_boot_mode_show(); break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) + case SOC_UNIPHIER_PH1_PRO5: + ph1_pro5_boot_mode_show(); + break; #endif default: break; diff --git a/arch/arm/mach-uniphier/debug_ll.S b/arch/arm/mach-uniphier/debug_ll.S index d5ccad3244c..056f77ed55f 100644 --- a/arch/arm/mach-uniphier/debug_ll.S +++ b/arch/arm/mach-uniphier/debug_ll.S @@ -101,6 +101,30 @@ ph1_pro4_end: b init_uart ph1_sld8_end: #endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) +#define PH1_PRO5_UART_CLK 73728000 + cmp r1, #0x2A + bne ph1_pro5_end + + sg_set_pinsel 47, 0, 4, 8, r0, r1 @ TXD0 -> TXD0 + sg_set_pinsel 49, 0, 4, 8, r0, r1 @ TXD1 -> TXD1 + sg_set_pinsel 51, 0, 4, 8, r0, r1 @ TXD2 -> TXD2 + sg_set_pinsel 53, 0, 4, 8, r0, r1 @ TXD3 -> TXD3 + + ldr r0, =SG_LOADPINCTRL + mov r1, #1 + str r1, [r0] + + ldr r0, =SC_CLKCTRL + ldr r1, [r0] + orr r1, r1, #SC_CLKCTRL_CEN_PERI + str r1, [r0] + + ldr r3, =DIV_ROUND(PH1_PRO5_UART_CLK, 16 * BAUDRATE) + + b init_uart +ph1_pro5_end: +#endif init_uart: addruart r0, r1, r2 diff --git a/arch/arm/mach-uniphier/early-clk/Makefile b/arch/arm/mach-uniphier/early-clk/Makefile index 58af1add582..939795c26d6 100644 --- a/arch/arm/mach-uniphier/early-clk/Makefile +++ b/arch/arm/mach-uniphier/early-clk/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += early-clk-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += early-clk-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += early-clk-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += early-clk-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += early-clk-ph1-pro5.o diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-ph1-pro5.c b/arch/arm/mach-uniphier/early-clk/early-clk-ph1-pro5.c new file mode 100644 index 00000000000..007d3b85708 --- /dev/null +++ b/arch/arm/mach-uniphier/early-clk/early-clk-ph1-pro5.c @@ -0,0 +1,39 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +int ph1_pro5_early_clk_init(const struct uniphier_board_data *bd) +{ + u32 tmp; + + /* + * deassert reset + * UMCA2: Ch1 (DDR3) + * UMCA1, UMC31: Ch0 (WIO1) + * UMCA0, UMC30: Ch0 (WIO0) + */ + tmp = readl(SC_RSTCTRL4); + tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 | + SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 | + SC_RSTCTRL4_NRST_UMC31 | SC_RSTCTRL4_NRST_UMC30; + writel(tmp, SC_RSTCTRL4); + readl(SC_RSTCTRL); /* dummy read */ + + /* privide clocks */ + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; + writel(tmp, SC_CLKCTRL); + tmp = readl(SC_CLKCTRL4); + tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC1 | + SC_CLKCTRL4_CEN_UMC0; + writel(tmp, SC_CLKCTRL4); + readl(SC_CLKCTRL4); /* dummy read */ + + return 0; +} diff --git a/arch/arm/mach-uniphier/include/mach/boot-device.h b/arch/arm/mach-uniphier/include/mach/boot-device.h index eddb25ffa45..3cbe7737a2d 100644 --- a/arch/arm/mach-uniphier/include/mach/boot-device.h +++ b/arch/arm/mach-uniphier/include/mach/boot-device.h @@ -14,8 +14,10 @@ struct boot_device_info { u32 ph1_sld3_boot_device(void); u32 ph1_ld4_boot_device(void); +u32 ph1_pro5_boot_device(void); void ph1_sld3_boot_mode_show(void); void ph1_ld4_boot_mode_show(void); +void ph1_pro5_boot_mode_show(void); #endif /* _ASM_BOOT_DEVICE_H_ */ diff --git a/arch/arm/mach-uniphier/include/mach/init.h b/arch/arm/mach-uniphier/include/mach/init.h index 228cbb1a195..914182d1e87 100644 --- a/arch/arm/mach-uniphier/include/mach/init.h +++ b/arch/arm/mach-uniphier/include/mach/init.h @@ -26,6 +26,7 @@ int ph1_sld3_init(const struct uniphier_board_data *bd); int ph1_ld4_init(const struct uniphier_board_data *bd); int ph1_pro4_init(const struct uniphier_board_data *bd); int ph1_sld8_init(const struct uniphier_board_data *bd); +int ph1_pro5_init(const struct uniphier_board_data *bd); #if defined(CONFIG_MICRO_SUPPORT_CARD) int ph1_sld3_sbc_init(const struct uniphier_board_data *bd); @@ -63,6 +64,7 @@ int ph1_sld3_enable_dpll_ssc(const struct uniphier_board_data *bd); int ph1_ld4_enable_dpll_ssc(const struct uniphier_board_data *bd); int ph1_ld4_early_clk_init(const struct uniphier_board_data *bd); +int ph1_pro5_early_clk_init(const struct uniphier_board_data *bd); int ph1_sld3_early_pin_init(const struct uniphier_board_data *bd); @@ -74,9 +76,11 @@ void ph1_sld3_pin_init(void); void ph1_ld4_pin_init(void); void ph1_pro4_pin_init(void); void ph1_sld8_pin_init(void); +void ph1_pro5_pin_init(void); void ph1_ld4_clk_init(void); void ph1_pro4_clk_init(void); +void ph1_pro5_clk_init(void); #define pr_err(fmt, args...) printf(fmt, ##args) diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h index 9d697b16ee6..903e4050914 100644 --- a/arch/arm/mach-uniphier/include/mach/sc-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h @@ -15,6 +15,10 @@ #define SC_BASE_ADDR 0x61840000 #endif +#define SC_DPLLOSCCTRL (SC_BASE_ADDR | 0x1110) +#define SC_DPLLOSCCTRL_DPLLST (0x1 << 1) +#define SC_DPLLOSCCTRL_DPLLEN (0x1 << 0) + #define SC_DPLLCTRL (SC_BASE_ADDR | 0x1200) #define SC_DPLLCTRL_SSC_EN (0x1 << 31) #define SC_DPLLCTRL_FOUTMODE_MASK (0xf << 16) @@ -43,6 +47,7 @@ #define SC_RSTCTRL_NRST_ETHER (0x1 << 12) #define SC_RSTCTRL_NRST_STDMAC (0x1 << 10) #define SC_RSTCTRL_NRST_GIO (0x1 << 6) +/* Pro4 or older */ #define SC_RSTCTRL_NRST_UMC1 (0x1 << 5) #define SC_RSTCTRL_NRST_UMC0 (0x1 << 4) #define SC_RSTCTRL_NRST_NAND (0x1 << 2) @@ -53,6 +58,15 @@ #define SC_RSTCTRL3 (SC_BASE_ADDR | 0x2008) +/* Pro5 or newer */ +#define SC_RSTCTRL4 (SC_BASE_ADDR | 0x200c) +#define SC_RSTCTRL4_NRST_UMCSB (0x1 << 12) /* UMC system bus */ +#define SC_RSTCTRL4_NRST_UMCA2 (0x1 << 10) /* UMC ch2 standby */ +#define SC_RSTCTRL4_NRST_UMCA1 (0x1 << 9) /* UMC ch1 standby */ +#define SC_RSTCTRL4_NRST_UMCA0 (0x1 << 8) /* UMC ch0 standby */ +#define SC_RSTCTRL4_NRST_UMC31 (0x1 << 5) /* UMC ch1 */ +#define SC_RSTCTRL4_NRST_UMC30 (0x1 << 4) /* UMC ch0 */ + #define SC_CLKCTRL (SC_BASE_ADDR | 0x2104) #define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */ #define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */ @@ -60,11 +74,18 @@ #define SC_CLKCTRL_CEN_MIO (0x1 << 11) #define SC_CLKCTRL_CEN_STDMAC (0x1 << 10) #define SC_CLKCTRL_CEN_GIO (0x1 << 6) +/* Pro4 or older */ #define SC_CLKCTRL_CEN_UMC (0x1 << 4) #define SC_CLKCTRL_CEN_NAND (0x1 << 2) #define SC_CLKCTRL_CEN_SBC (0x1 << 1) #define SC_CLKCTRL_CEN_PERI (0x1 << 0) +/* Pro5 or newer */ +#define SC_CLKCTRL4 (SC_BASE_ADDR | 0x210c) +#define SC_CLKCTRL4_CEN_UMCSB (0x1 << 12) /* UMC system bus */ +#define SC_CLKCTRL4_CEN_UMC1 (0x1 << 1) /* UMC ch1 */ +#define SC_CLKCTRL4_CEN_UMC0 (0x1 << 0) /* UMC ch0 */ + /* System reset control register */ #define SC_IRQTIMSET (SC_BASE_ADDR | 0x3000) #define SC_SLFRSTSEL (SC_BASE_ADDR | 0x3010) diff --git a/arch/arm/mach-uniphier/include/mach/sg-regs.h b/arch/arm/mach-uniphier/include/mach/sg-regs.h index d8239f28bc5..168b35e7236 100644 --- a/arch/arm/mach-uniphier/include/mach/sg-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sg-regs.h @@ -59,7 +59,7 @@ /* Pin Control */ #define SG_PINCTRL_BASE (SG_CTRL_BASE | 0x1000) -/* Only for PH1-Pro4 */ +/* PH1-Pro4, PH1-Pro5 */ #define SG_LOADPINCTRL (SG_CTRL_BASE | 0x1700) /* Input Enable */ diff --git a/arch/arm/mach-uniphier/init/Makefile b/arch/arm/mach-uniphier/init/Makefile index dd9804d33b5..1524a8d053d 100644 --- a/arch/arm/mach-uniphier/init/Makefile +++ b/arch/arm/mach-uniphier/init/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += init-ph1-sld3.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += init-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += init-ph1-pro4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += init-ph1-sld8.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += init-ph1-pro5.o diff --git a/arch/arm/mach-uniphier/init/init-ph1-pro5.c b/arch/arm/mach-uniphier/init/init-ph1-pro5.c new file mode 100644 index 00000000000..92b3f21d93c --- /dev/null +++ b/arch/arm/mach-uniphier/init/init-ph1-pro5.c @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +int ph1_pro5_init(const struct uniphier_board_data *bd) +{ + ph1_pro4_sbc_init(bd); + + support_card_reset(); + + support_card_init(); + + led_puts("L0"); + + memconf_init(bd); + + led_puts("L1"); + + ph1_pro5_early_clk_init(bd); + + led_puts("L2"); + + led_puts("L3"); + +#ifdef CONFIG_SPL_SERIAL_SUPPORT + preloader_console_init(); +#endif + + led_puts("L4"); + + led_puts("L5"); + + return 0; +} diff --git a/arch/arm/mach-uniphier/init/init.c b/arch/arm/mach-uniphier/init/init.c index 316be029ae6..2649e6c4172 100644 --- a/arch/arm/mach-uniphier/init/init.c +++ b/arch/arm/mach-uniphier/init/init.c @@ -39,6 +39,11 @@ void spl_board_init(void) case SOC_UNIPHIER_PH1_SLD8: ph1_sld8_init(param); break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) + case SOC_UNIPHIER_PH1_PRO5: + ph1_pro5_init(param); + break; #endif default: break; diff --git a/arch/arm/mach-uniphier/pinctrl/Makefile b/arch/arm/mach-uniphier/pinctrl/Makefile index 542c670f978..a7852457f13 100644 --- a/arch/arm/mach-uniphier/pinctrl/Makefile +++ b/arch/arm/mach-uniphier/pinctrl/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += pinctrl-ph1-sld3.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += pinctrl-ph1-pro5.o diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro5.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro5.c new file mode 100644 index 00000000000..a6cc0824e23 --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro5.c @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +void ph1_pro5_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_NAND_DENALI + sg_set_pinsel(19, 0, 4, 8); /* XNFRE -> XNFRE */ + sg_set_pinsel(20, 0, 4, 8); /* XNFWE -> XNFWE */ + sg_set_pinsel(21, 0, 4, 8); /* NFALE -> NFALE */ + sg_set_pinsel(22, 0, 4, 8); /* NFCLE -> NFCLE */ + sg_set_pinsel(23, 0, 4, 8); /* XNFWP -> XNFWP */ + sg_set_pinsel(24, 0, 4, 8); /* XNFCE0 -> XNFCE0 */ + sg_set_pinsel(25, 0, 4, 8); /* NRYBY0 -> NRYBY0 */ + sg_set_pinsel(26, 0, 4, 8); /* XNFCE1 -> XNFCE1 */ + sg_set_pinsel(27, 0, 4, 8); /* NRYBY1 -> NRYBY1 */ + sg_set_pinsel(28, 0, 4, 8); /* NFD0 -> NFD0 */ + sg_set_pinsel(29, 0, 4, 8); /* NFD1 -> NFD1 */ + sg_set_pinsel(30, 0, 4, 8); /* NFD2 -> NFD2 */ + sg_set_pinsel(31, 0, 4, 8); /* NFD3 -> NFD3 */ + sg_set_pinsel(32, 0, 4, 8); /* NFD4 -> NFD4 */ + sg_set_pinsel(33, 0, 4, 8); /* NFD5 -> NFD5 */ + sg_set_pinsel(34, 0, 4, 8); /* NFD6 -> NFD6 */ + sg_set_pinsel(35, 0, 4, 8); /* NFD7 -> NFD7 */ +#endif + +#ifdef CONFIG_USB_XHCI_UNIPHIER + sg_set_pinsel(124, 0, 4, 8); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(125, 0, 4, 8); /* USB0OD -> USB0OD */ + sg_set_pinsel(126, 0, 4, 8); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(127, 0, 4, 8); /* USB1OD -> USB1OD */ +#endif + + writel(1, SG_LOADPINCTRL); +} diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile index 68ffd1c626b..2c5fd1a1fca 100644 --- a/arch/arm/mach-uniphier/sbc/Makefile +++ b/arch/arm/mach-uniphier/sbc/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += sbc-ph1-sld3.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += sbc-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += sbc-ph1-pro4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += sbc-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += sbc-ph1-pro4.o diff --git a/configs/ph1_pro5_defconfig b/configs/ph1_pro5_defconfig new file mode 100644 index 00000000000..967d0f100bf --- /dev/null +++ b/configs/ph1_pro5_defconfig @@ -0,0 +1,30 @@ +CONFIG_ARM=y +CONFIG_ARCH_UNIPHIER=y +CONFIG_ARCH_UNIPHIER_PH1_PRO5=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_MICRO_SUPPORT_CARD=y +CONFIG_SYS_TEXT_BASE=0x84000000 +CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro5-4kbox" +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ENV_EXISTS is not set +CONFIG_CMD_NAND=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_PING=y +CONFIG_CMD_TIME=y +# CONFIG_CMD_MISC is not set +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_SIMPLE_BUS=y +CONFIG_NAND_DENALI=y +CONFIG_SYS_NAND_DENALI_64BIT=y +CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 +CONFIG_SPL_NAND_DENALI=y +CONFIG_UNIPHIER_SERIAL=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_STORAGE=y diff --git a/doc/README.uniphier b/doc/README.uniphier index e936f402543..6792327992a 100644 --- a/doc/README.uniphier +++ b/doc/README.uniphier @@ -44,6 +44,10 @@ PH1-sLD8: $ make ph1_sld8_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- +PH1-Pro5: + $ make ph1_pro5_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabi- + You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-" to use your favorite compiler. From 019df879a93e266ac19f5eb00e4ee605db279b14 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:41 +0900 Subject: [PATCH 31/33] ARM: uniphier: add ProXstream2 and PH1-LD6b support The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada --- arch/arm/dts/Makefile | 4 +- arch/arm/dts/uniphier-ph1-ld6b-ref.dts | 1 + arch/arm/dts/uniphier-proxstream2-gentil.dts | 62 +++++++++++++++ arch/arm/dts/uniphier-proxstream2-vodka.dts | 62 +++++++++++++++ arch/arm/mach-uniphier/Kconfig | 18 +++++ arch/arm/mach-uniphier/board_early_init_f.c | 14 ++++ arch/arm/mach-uniphier/boards.c | 22 ++++++ arch/arm/mach-uniphier/boot-mode/Makefile | 2 + .../boot-mode/boot-mode-proxstream2.c | 75 +++++++++++++++++++ arch/arm/mach-uniphier/boot-mode/boot-mode.c | 6 ++ arch/arm/mach-uniphier/clk/Makefile | 2 + arch/arm/mach-uniphier/clk/clk-proxstream2.c | 50 +++++++++++++ arch/arm/mach-uniphier/cmd_pinmon.c | 7 ++ arch/arm/mach-uniphier/debug_ll.S | 49 ++++++++++++ arch/arm/mach-uniphier/early-clk/Makefile | 2 + .../early-clk/early-clk-proxstream2.c | 44 +++++++++++ .../mach-uniphier/include/mach/boot-device.h | 2 + arch/arm/mach-uniphier/include/mach/init.h | 12 +++ arch/arm/mach-uniphier/include/mach/sc-regs.h | 2 + arch/arm/mach-uniphier/include/mach/sg-regs.h | 2 + arch/arm/mach-uniphier/init/Makefile | 2 + .../arm/mach-uniphier/init/init-proxstream2.c | 41 ++++++++++ arch/arm/mach-uniphier/init/init.c | 7 ++ arch/arm/mach-uniphier/memconf/Makefile | 2 + .../memconf/memconf-proxstream2.c | 64 ++++++++++++++++ arch/arm/mach-uniphier/pinctrl/Makefile | 2 + .../mach-uniphier/pinctrl/pinctrl-ph1-ld6b.c | 45 +++++++++++ .../pinctrl/pinctrl-proxstream2.c | 45 +++++++++++ arch/arm/mach-uniphier/sbc/Makefile | 2 + arch/arm/mach-uniphier/sbc/sbc-proxstream2.c | 48 ++++++++++++ configs/ph1_ld6b_defconfig | 30 ++++++++ doc/README.uniphier | 8 ++ 32 files changed, 733 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/uniphier-proxstream2-gentil.dts create mode 100644 arch/arm/dts/uniphier-proxstream2-vodka.dts create mode 100644 arch/arm/mach-uniphier/boot-mode/boot-mode-proxstream2.c create mode 100644 arch/arm/mach-uniphier/clk/clk-proxstream2.c create mode 100644 arch/arm/mach-uniphier/early-clk/early-clk-proxstream2.c create mode 100644 arch/arm/mach-uniphier/init/init-proxstream2.c create mode 100644 arch/arm/mach-uniphier/memconf/memconf-proxstream2.c create mode 100644 arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld6b.c create mode 100644 arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c create mode 100644 arch/arm/mach-uniphier/sbc/sbc-proxstream2.c create mode 100644 configs/ph1_ld6b_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0a7d18431de..5f10243fe6d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -47,7 +47,9 @@ dtb-$(CONFIG_ARCH_UNIPHIER) += \ uniphier-ph1-pro4-ref.dtb \ uniphier-ph1-pro5-4kbox.dtb \ uniphier-ph1-sld3-ref.dtb \ - uniphier-ph1-sld8-ref.dtb + uniphier-ph1-sld8-ref.dtb \ + uniphier-proxstream2-gentil.dtb \ + uniphier-proxstream2-vodka.dtb dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \ zynq-zc706.dtb \ zynq-zed.dtb \ diff --git a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts index ca68930527f..bd86f093264 100644 --- a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts @@ -3,6 +3,7 @@ * * Copyright (C) 2015 Masahiro Yamada * + * SPDX-License-Identifier: GPL-2.0+ */ /dts-v1/; diff --git a/arch/arm/dts/uniphier-proxstream2-gentil.dts b/arch/arm/dts/uniphier-proxstream2-gentil.dts new file mode 100644 index 00000000000..81d2385bf9a --- /dev/null +++ b/arch/arm/dts/uniphier-proxstream2-gentil.dts @@ -0,0 +1,62 @@ +/* + * Device Tree Source for UniPhier ProXstream2 Gentil Board + * + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +/include/ "uniphier-proxstream2.dtsi" + +/ { + model = "UniPhier ProXstream2 Gentil Board"; + compatible = "socionext,proxstream2-gentil", "socionext,proxstream2"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; + + chosen { + bootargs = "console=ttyS2,115200"; + stdout-path = &serial2; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + i2c0 = &i2c0; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + }; +}; + +&serial2 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +/* for U-boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&serial2 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart2 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/uniphier-proxstream2-vodka.dts b/arch/arm/dts/uniphier-proxstream2-vodka.dts new file mode 100644 index 00000000000..fba7b742ca6 --- /dev/null +++ b/arch/arm/dts/uniphier-proxstream2-vodka.dts @@ -0,0 +1,62 @@ +/* + * Device Tree Source for UniPhier ProXstream2 Vodka Board + * + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +/include/ "uniphier-proxstream2.dtsi" + +/ { + model = "UniPhier ProXstream2 Vodka Board"; + compatible = "socionext,proxstream2-vodka", "socionext,proxstream2"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; + + chosen { + bootargs = "console=ttyS2,115200"; + stdout-path = &serial2; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + i2c0 = &i2c0; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + }; +}; + +&serial2 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +/* for U-boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&serial2 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart2 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 7a62957de30..22ab798b969 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -42,6 +42,24 @@ config ARCH_UNIPHIER_PH1_PRO5 help This enables support for UniPhier PH1-Pro5 SoC. +config ARCH_UNIPHIER_PROXSTREAM2 + bool "UniPhier ProXstream2 SoC" + select UNIPHIER_SMP + depends on !ARCH_UNIPHIER_PH1_SLD3 && \ + !ARCH_UNIPHIER_PH1_LD4 && \ + !ARCH_UNIPHIER_PH1_SLD8 + help + This enables support for UniPhier ProXstream2 SoC. + +config ARCH_UNIPHIER_PH1_LD6B + bool "UniPhier PH1-LD6b SoC" + select UNIPHIER_SMP + depends on !ARCH_UNIPHIER_PH1_SLD3 && \ + !ARCH_UNIPHIER_PH1_LD4 && \ + !ARCH_UNIPHIER_PH1_SLD8 + help + This enables support for UniPhier PH1-LD6b SoC. + config MICRO_SUPPORT_CARD bool "Use Micro Support Card" help diff --git a/arch/arm/mach-uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c index fb4927222c1..5e0d246ce42 100644 --- a/arch/arm/mach-uniphier/board_early_init_f.c +++ b/arch/arm/mach-uniphier/board_early_init_f.c @@ -47,6 +47,20 @@ int board_early_init_f(void) led_puts("U1"); ph1_pro5_clk_init(); break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) + case SOC_UNIPHIER_PROXSTREAM2: + proxstream2_pin_init(); + led_puts("U1"); + proxstream2_clk_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) + case SOC_UNIPHIER_PH1_LD6B: + ph1_ld6b_pin_init(); + led_puts("U1"); + proxstream2_clk_init(); + break; #endif default: break; diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c index fba88597120..812c58ff965 100644 --- a/arch/arm/mach-uniphier/boards.c +++ b/arch/arm/mach-uniphier/boards.c @@ -71,6 +71,22 @@ static const struct uniphier_board_data ph1_pro5_data = { }; #endif +#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \ + defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) +static const struct uniphier_board_data proxstream2_data = { + .dram_ch0_base = 0x80000000, + .dram_ch0_size = 0x40000000, + .dram_ch0_width = 32, + .dram_ch1_base = 0xc0000000, + .dram_ch1_size = 0x20000000, + .dram_ch1_width = 32, + .dram_ch2_base = 0xe0000000, + .dram_ch2_size = 0x20000000, + .dram_ch2_width = 16, + .dram_freq = 1866, +}; +#endif + struct uniphier_board_id { const char *compatible; const struct uniphier_board_data *param; @@ -92,6 +108,12 @@ static const struct uniphier_board_id uniphier_boards[] = { #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) { "socionext,ph1-pro5", &ph1_pro5_data, }, #endif +#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) + { "socionext,proxstream2", &proxstream2_data, }, +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) + { "socionext,ph1-ld6b", &proxstream2_data, }, +#endif }; const struct uniphier_board_data *uniphier_get_board_param(const void *fdt) diff --git a/arch/arm/mach-uniphier/boot-mode/Makefile b/arch/arm/mach-uniphier/boot-mode/Makefile index 1d2f8b39466..30c88749051 100644 --- a/arch/arm/mach-uniphier/boot-mode/Makefile +++ b/arch/arm/mach-uniphier/boot-mode/Makefile @@ -5,3 +5,5 @@ obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += boot-mode-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += boot-mode-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += boot-mode-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += boot-mode-ph1-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += boot-mode-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += boot-mode-proxstream2.o diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-proxstream2.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-proxstream2.c new file mode 100644 index 00000000000..10a47c6fccf --- /dev/null +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-proxstream2.c @@ -0,0 +1,75 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include + +static struct boot_device_info boot_device_table[] = { + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"}, + {BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"}, + {BOOT_DEVICE_SPI, "SPI 3Byte CS0"}, + {BOOT_DEVICE_SPI, "SPI 4Byte CS0"}, + {BOOT_DEVICE_SPI, "SPI 3Byte CS1"}, + {BOOT_DEVICE_SPI, "SPI 4Byte CS1"}, + {BOOT_DEVICE_SPI, "SPI 4Byte CS0"}, + {BOOT_DEVICE_SPI, "SPI 3Byte CS0"}, + {BOOT_DEVICE_NONE, "Reserved"}, +}; + +int get_boot_mode_sel(void) +{ + return (readl(SG_PINMON0) >> 1) & 0x1f; +} + +u32 proxstream2_boot_device(void) +{ + int boot_mode; + + boot_mode = get_boot_mode_sel(); + + return boot_device_table[boot_mode].type; +} + +void proxstream2_boot_mode_show(void) +{ + int mode_sel, i; + + mode_sel = get_boot_mode_sel(); + + puts("Boot Mode Pin:\n"); + + for (i = 0; i < ARRAY_SIZE(boot_device_table); i++) + printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i, + boot_device_table[i].info); +} diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c index 60329eb10aa..c6cafa7919c 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c @@ -32,6 +32,12 @@ u32 spl_boot_device(void) #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) case SOC_UNIPHIER_PH1_PRO5: return ph1_pro5_boot_device(); +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \ + defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) + case SOC_UNIPHIER_PROXSTREAM2: + case SOC_UNIPHIER_PH1_LD6B: + return proxstream2_boot_device(); #endif default: return BOOT_DEVICE_NONE; diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile index 873c4f72079..4f397b986bc 100644 --- a/arch/arm/mach-uniphier/clk/Makefile +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -3,3 +3,5 @@ obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += clk-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += clk-ph1-pro4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += clk-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += clk-ph1-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += clk-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += clk-proxstream2.o diff --git a/arch/arm/mach-uniphier/clk/clk-proxstream2.c b/arch/arm/mach-uniphier/clk/clk-proxstream2.c new file mode 100644 index 00000000000..b494021ecfa --- /dev/null +++ b/arch/arm/mach-uniphier/clk/clk-proxstream2.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +void proxstream2_clk_init(void) +{ + u32 tmp; + + /* deassert reset */ + tmp = readl(SC_RSTCTRL); +#ifdef CONFIG_USB_XHCI_UNIPHIER + tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; +#endif +#ifdef CONFIG_UNIPHIER_ETH + tmp |= SC_RSTCTRL_NRST_ETHER; +#endif +#ifdef CONFIG_NAND_DENALI + tmp |= SC_RSTCTRL_NRST_NAND; +#endif + writel(tmp, SC_RSTCTRL); + readl(SC_RSTCTRL); /* dummy read */ + +#ifdef CONFIG_USB_XHCI_UNIPHIER + tmp = readl(SC_RSTCTRL2); + tmp |= SC_RSTCTRL2_NRST_USB3B1; + writel(tmp, SC_RSTCTRL2); + readl(SC_RSTCTRL2); /* dummy read */ +#endif + + /* privide clocks */ + tmp = readl(SC_CLKCTRL); +#ifdef CONFIG_USB_XHCI_UNIPHIER + tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | + SC_CLKCTRL_CEN_GIO; +#endif +#ifdef CONFIG_UNIPHIER_ETH + tmp |= SC_CLKCTRL_CEN_ETHER; +#endif +#ifdef CONFIG_NAND_DENALI + tmp |= SC_CLKCTRL_CEN_NAND; +#endif + writel(tmp, SC_CLKCTRL); + readl(SC_CLKCTRL); /* dummy read */ +} diff --git a/arch/arm/mach-uniphier/cmd_pinmon.c b/arch/arm/mach-uniphier/cmd_pinmon.c index 58c53bf1936..b15ee9dd60d 100644 --- a/arch/arm/mach-uniphier/cmd_pinmon.c +++ b/arch/arm/mach-uniphier/cmd_pinmon.c @@ -32,6 +32,13 @@ static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) case SOC_UNIPHIER_PH1_PRO5: ph1_pro5_boot_mode_show(); break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \ + defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) + case SOC_UNIPHIER_PROXSTREAM2: + case SOC_UNIPHIER_PH1_LD6B: + proxstream2_boot_mode_show(); + break; #endif default: break; diff --git a/arch/arm/mach-uniphier/debug_ll.S b/arch/arm/mach-uniphier/debug_ll.S index 056f77ed55f..d8c9fe43e3e 100644 --- a/arch/arm/mach-uniphier/debug_ll.S +++ b/arch/arm/mach-uniphier/debug_ll.S @@ -125,6 +125,55 @@ ph1_sld8_end: b init_uart ph1_pro5_end: #endif +#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) +#define PROXSTREAM2_UART_CLK 88900000 + cmp r1, #0x2E + bne proxstream2_end + + ldr r0, =SG_IECTRL + ldr r1, [r0] + orr r1, r1, #1 + str r1, [r0] + + sg_set_pinsel 217, 8, 8, 4, r0, r1 @ TXD0 -> TXD0 + sg_set_pinsel 115, 8, 8, 4, r0, r1 @ TXD1 -> TXD1 + sg_set_pinsel 113, 8, 8, 4, r0, r1 @ TXD2 -> TXD2 + sg_set_pinsel 219, 8, 8, 4, r0, r1 @ TXD3 -> TXD3 + + ldr r0, =SC_CLKCTRL + ldr r1, [r0] + orr r1, r1, #SC_CLKCTRL_CEN_PERI + str r1, [r0] + + ldr r3, =DIV_ROUND(PROXSTREAM2_UART_CLK, 16 * BAUDRATE) + + b init_uart +proxstream2_end: +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) +#define PH1_LD6B_UART_CLK 88900000 + cmp r1, #0x2F + bne ph1_ld6b_end + + ldr r0, =SG_IECTRL + ldr r1, [r0] + orr r1, r1, #1 + str r1, [r0] + + sg_set_pinsel 135, 3, 8, 4, r0, r1 @ PORT10 -> TXD0 + sg_set_pinsel 115, 0, 8, 4, r0, r1 @ TXD1 -> TXD1 + sg_set_pinsel 113, 2, 8, 4, r0, r1 @ SBO0 -> TXD2 + + ldr r0, =SC_CLKCTRL + ldr r1, [r0] + orr r1, r1, #SC_CLKCTRL_CEN_PERI + str r1, [r0] + + ldr r3, =DIV_ROUND(PH1_LD6B_UART_CLK, 16 * BAUDRATE) + + b init_uart +ph1_ld6b_end: +#endif init_uart: addruart r0, r1, r2 diff --git a/arch/arm/mach-uniphier/early-clk/Makefile b/arch/arm/mach-uniphier/early-clk/Makefile index 939795c26d6..393ea96f90c 100644 --- a/arch/arm/mach-uniphier/early-clk/Makefile +++ b/arch/arm/mach-uniphier/early-clk/Makefile @@ -3,3 +3,5 @@ obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += early-clk-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += early-clk-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += early-clk-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += early-clk-ph1-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += early-clk-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += early-clk-proxstream2.o diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-proxstream2.c b/arch/arm/mach-uniphier/early-clk/early-clk-proxstream2.c new file mode 100644 index 00000000000..c303f16a578 --- /dev/null +++ b/arch/arm/mach-uniphier/early-clk/early-clk-proxstream2.c @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +int proxstream2_early_clk_init(const struct uniphier_board_data *bd) +{ + u32 tmp; + + /* deassert reset */ + if (spl_boot_device() != BOOT_DEVICE_NAND) { + tmp = readl(SC_RSTCTRL); + tmp &= ~SC_RSTCTRL_NRST_NAND; + writel(tmp, SC_RSTCTRL); + }; + + tmp = readl(SC_RSTCTRL4); + tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 | + SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 | + SC_RSTCTRL4_NRST_UMC32 | SC_RSTCTRL4_NRST_UMC31 | + SC_RSTCTRL4_NRST_UMC30; + writel(tmp, SC_RSTCTRL4); + readl(SC_RSTCTRL4); /* dummy read */ + + /* privide clocks */ + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; + writel(tmp, SC_CLKCTRL); + + tmp = readl(SC_CLKCTRL4); + tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC2 | + SC_CLKCTRL4_CEN_UMC1 | SC_CLKCTRL4_CEN_UMC0; + writel(tmp, SC_CLKCTRL4); + readl(SC_CLKCTRL4); /* dummy read */ + + return 0; +} diff --git a/arch/arm/mach-uniphier/include/mach/boot-device.h b/arch/arm/mach-uniphier/include/mach/boot-device.h index 3cbe7737a2d..2ab5a535fa0 100644 --- a/arch/arm/mach-uniphier/include/mach/boot-device.h +++ b/arch/arm/mach-uniphier/include/mach/boot-device.h @@ -15,9 +15,11 @@ struct boot_device_info { u32 ph1_sld3_boot_device(void); u32 ph1_ld4_boot_device(void); u32 ph1_pro5_boot_device(void); +u32 proxstream2_boot_device(void); void ph1_sld3_boot_mode_show(void); void ph1_ld4_boot_mode_show(void); void ph1_pro5_boot_mode_show(void); +void proxstream2_boot_mode_show(void); #endif /* _ASM_BOOT_DEVICE_H_ */ diff --git a/arch/arm/mach-uniphier/include/mach/init.h b/arch/arm/mach-uniphier/include/mach/init.h index 914182d1e87..5108eddfc48 100644 --- a/arch/arm/mach-uniphier/include/mach/init.h +++ b/arch/arm/mach-uniphier/include/mach/init.h @@ -27,11 +27,13 @@ int ph1_ld4_init(const struct uniphier_board_data *bd); int ph1_pro4_init(const struct uniphier_board_data *bd); int ph1_sld8_init(const struct uniphier_board_data *bd); int ph1_pro5_init(const struct uniphier_board_data *bd); +int proxstream2_init(const struct uniphier_board_data *bd); #if defined(CONFIG_MICRO_SUPPORT_CARD) int ph1_sld3_sbc_init(const struct uniphier_board_data *bd); int ph1_ld4_sbc_init(const struct uniphier_board_data *bd); int ph1_pro4_sbc_init(const struct uniphier_board_data *bd); +int proxstream2_sbc_init(const struct uniphier_board_data *bd); #else static inline int ph1_sld3_sbc_init(const struct uniphier_board_data *bd) { @@ -47,6 +49,11 @@ static inline int ph1_pro4_sbc_init(const struct uniphier_board_data *bd) { return 0; } + +static inline int proxstream2_sbc_init(const struct uniphier_board_data *bd) +{ + return 0; +} #endif int ph1_sld3_bcu_init(const struct uniphier_board_data *bd); @@ -54,6 +61,7 @@ int ph1_ld4_bcu_init(const struct uniphier_board_data *bd); int memconf_init(const struct uniphier_board_data *bd); int ph1_sld3_memconf_init(const struct uniphier_board_data *bd); +int proxstream2_memconf_init(const struct uniphier_board_data *bd); int ph1_sld3_pll_init(const struct uniphier_board_data *bd); int ph1_ld4_pll_init(const struct uniphier_board_data *bd); @@ -65,6 +73,7 @@ int ph1_ld4_enable_dpll_ssc(const struct uniphier_board_data *bd); int ph1_ld4_early_clk_init(const struct uniphier_board_data *bd); int ph1_pro5_early_clk_init(const struct uniphier_board_data *bd); +int proxstream2_early_clk_init(const struct uniphier_board_data *bd); int ph1_sld3_early_pin_init(const struct uniphier_board_data *bd); @@ -77,10 +86,13 @@ void ph1_ld4_pin_init(void); void ph1_pro4_pin_init(void); void ph1_sld8_pin_init(void); void ph1_pro5_pin_init(void); +void proxstream2_pin_init(void); +void ph1_ld6b_pin_init(void); void ph1_ld4_clk_init(void); void ph1_pro4_clk_init(void); void ph1_pro5_clk_init(void); +void proxstream2_clk_init(void); #define pr_err(fmt, args...) printf(fmt, ##args) diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h index 903e4050914..474b82d2430 100644 --- a/arch/arm/mach-uniphier/include/mach/sc-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h @@ -64,6 +64,7 @@ #define SC_RSTCTRL4_NRST_UMCA2 (0x1 << 10) /* UMC ch2 standby */ #define SC_RSTCTRL4_NRST_UMCA1 (0x1 << 9) /* UMC ch1 standby */ #define SC_RSTCTRL4_NRST_UMCA0 (0x1 << 8) /* UMC ch0 standby */ +#define SC_RSTCTRL4_NRST_UMC32 (0x1 << 6) /* UMC ch2 */ #define SC_RSTCTRL4_NRST_UMC31 (0x1 << 5) /* UMC ch1 */ #define SC_RSTCTRL4_NRST_UMC30 (0x1 << 4) /* UMC ch0 */ @@ -83,6 +84,7 @@ /* Pro5 or newer */ #define SC_CLKCTRL4 (SC_BASE_ADDR | 0x210c) #define SC_CLKCTRL4_CEN_UMCSB (0x1 << 12) /* UMC system bus */ +#define SC_CLKCTRL4_CEN_UMC2 (0x1 << 2) /* UMC ch2 */ #define SC_CLKCTRL4_CEN_UMC1 (0x1 << 1) /* UMC ch1 */ #define SC_CLKCTRL4_CEN_UMC0 (0x1 << 0) /* UMC ch0 */ diff --git a/arch/arm/mach-uniphier/include/mach/sg-regs.h b/arch/arm/mach-uniphier/include/mach/sg-regs.h index 168b35e7236..678d437fc97 100644 --- a/arch/arm/mach-uniphier/include/mach/sg-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sg-regs.h @@ -53,6 +53,8 @@ #define SG_MEMCONF_CH2_NUM_MASK (0x1 << 24) #define SG_MEMCONF_CH2_NUM_1 (0x1 << 24) #define SG_MEMCONF_CH2_NUM_2 (0x0 << 24) +/* PH1-LD6b, ProXstream2 only */ +#define SG_MEMCONF_CH2_DISABLE (0x1 << 21) #define SG_MEMCONF_SPARSEMEM (0x1 << 4) diff --git a/arch/arm/mach-uniphier/init/Makefile b/arch/arm/mach-uniphier/init/Makefile index 1524a8d053d..98833b55deb 100644 --- a/arch/arm/mach-uniphier/init/Makefile +++ b/arch/arm/mach-uniphier/init/Makefile @@ -5,3 +5,5 @@ obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += init-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += init-ph1-pro4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += init-ph1-sld8.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += init-ph1-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += init-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += init-proxstream2.o diff --git a/arch/arm/mach-uniphier/init/init-proxstream2.c b/arch/arm/mach-uniphier/init/init-proxstream2.c new file mode 100644 index 00000000000..8d03b8f86a0 --- /dev/null +++ b/arch/arm/mach-uniphier/init/init-proxstream2.c @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +int proxstream2_init(const struct uniphier_board_data *bd) +{ + proxstream2_sbc_init(bd); + + support_card_reset(); + + support_card_init(); + + led_puts("L0"); + + memconf_init(bd); + proxstream2_memconf_init(bd); + + led_puts("L1"); + + proxstream2_early_clk_init(bd); + + led_puts("L2"); + + led_puts("L3"); + +#ifdef CONFIG_SPL_SERIAL_SUPPORT + preloader_console_init(); +#endif + + led_puts("L4"); + + return 0; +} diff --git a/arch/arm/mach-uniphier/init/init.c b/arch/arm/mach-uniphier/init/init.c index 2649e6c4172..bbfc8e5e085 100644 --- a/arch/arm/mach-uniphier/init/init.c +++ b/arch/arm/mach-uniphier/init/init.c @@ -44,6 +44,13 @@ void spl_board_init(void) case SOC_UNIPHIER_PH1_PRO5: ph1_pro5_init(param); break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \ + defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) + case SOC_UNIPHIER_PROXSTREAM2: + case SOC_UNIPHIER_PH1_LD6B: + proxstream2_init(param); + break; #endif default: break; diff --git a/arch/arm/mach-uniphier/memconf/Makefile b/arch/arm/mach-uniphier/memconf/Makefile index 1a718f31fae..42057a20779 100644 --- a/arch/arm/mach-uniphier/memconf/Makefile +++ b/arch/arm/mach-uniphier/memconf/Makefile @@ -1,2 +1,4 @@ obj-y += memconf.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += memconf-ph1-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += memconf-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += memconf-proxstream2.o diff --git a/arch/arm/mach-uniphier/memconf/memconf-proxstream2.c b/arch/arm/mach-uniphier/memconf/memconf-proxstream2.c new file mode 100644 index 00000000000..d7bf0d4e5fa --- /dev/null +++ b/arch/arm/mach-uniphier/memconf/memconf-proxstream2.c @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +int proxstream2_memconf_init(const struct uniphier_board_data *bd) +{ + u32 tmp; + unsigned long size_per_word; + + tmp = readl(SG_MEMCONF); + + tmp &= ~(SG_MEMCONF_CH2_SZ_MASK | SG_MEMCONF_CH2_NUM_MASK); + + switch (bd->dram_ch2_width) { + case 16: + tmp |= SG_MEMCONF_CH2_NUM_1; + size_per_word = bd->dram_ch2_size; + break; + case 32: + tmp |= SG_MEMCONF_CH2_NUM_2; + size_per_word = bd->dram_ch2_size >> 1; + break; + default: + pr_err("error: unsupported DRAM Ch2 width\n"); + return -EINVAL; + } + + /* Set DDR size */ + switch (size_per_word) { + case SZ_64M: + tmp |= SG_MEMCONF_CH2_SZ_64M; + break; + case SZ_128M: + tmp |= SG_MEMCONF_CH2_SZ_128M; + break; + case SZ_256M: + tmp |= SG_MEMCONF_CH2_SZ_256M; + break; + case SZ_512M: + tmp |= SG_MEMCONF_CH2_SZ_512M; + break; + default: + pr_err("error: unsupported DRAM Ch2 size\n"); + return -EINVAL; + } + + if (size_per_word) + tmp &= ~SG_MEMCONF_CH2_DISABLE; + else + tmp |= SG_MEMCONF_CH2_DISABLE; + + writel(tmp, SG_MEMCONF); + + return 0; +} diff --git a/arch/arm/mach-uniphier/pinctrl/Makefile b/arch/arm/mach-uniphier/pinctrl/Makefile index a7852457f13..85175955d31 100644 --- a/arch/arm/mach-uniphier/pinctrl/Makefile +++ b/arch/arm/mach-uniphier/pinctrl/Makefile @@ -3,3 +3,5 @@ obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += pinctrl-ph1-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += pinctrl-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += pinctrl-ph1-ld6b.o diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld6b.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld6b.c new file mode 100644 index 00000000000..4f950d3fc63 --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld6b.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +void ph1_ld6b_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_NAND_DENALI + sg_set_pinsel(30, 0, 8, 4); /* XNFRE -> XNFRE */ + sg_set_pinsel(31, 0, 8, 4); /* XNFWE -> XNFWE */ + sg_set_pinsel(32, 0, 8, 4); /* NFALE -> NFALE */ + sg_set_pinsel(33, 0, 8, 4); /* NFCLE -> NFCLE */ + sg_set_pinsel(34, 0, 8, 4); /* XNFWP -> XNFWP */ + sg_set_pinsel(35, 0, 8, 4); /* XNFCE0 -> XNFCE0 */ + sg_set_pinsel(36, 0, 8, 4); /* NRYBY0 -> NRYBY0 */ + sg_set_pinsel(37, 0, 8, 4); /* XNFCE1 -> NRYBY1 */ + sg_set_pinsel(38, 0, 8, 4); /* NRYBY1 -> XNFCE1 */ + sg_set_pinsel(39, 0, 8, 4); /* NFD0 -> NFD0 */ + sg_set_pinsel(40, 0, 8, 4); /* NFD1 -> NFD1 */ + sg_set_pinsel(41, 0, 8, 4); /* NFD2 -> NFD2 */ + sg_set_pinsel(42, 0, 8, 4); /* NFD3 -> NFD3 */ + sg_set_pinsel(43, 0, 8, 4); /* NFD4 -> NFD4 */ + sg_set_pinsel(44, 0, 8, 4); /* NFD5 -> NFD5 */ + sg_set_pinsel(45, 0, 8, 4); /* NFD6 -> NFD6 */ + sg_set_pinsel(46, 0, 8, 4); /* NFD7 -> NFD7 */ +#endif + +#ifdef CONFIG_USB_XHCI_UNIPHIER + sg_set_pinsel(56, 0, 8, 4); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(57, 0, 8, 4); /* USB0OD -> USB0OD */ + sg_set_pinsel(58, 0, 8, 4); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(59, 0, 8, 4); /* USB1OD -> USB1OD */ + sg_set_pinsel(60, 0, 8, 4); /* USB2VBUS -> USB2VBUS */ + sg_set_pinsel(61, 0, 8, 4); /* USB2OD -> USB2OD */ + sg_set_pinsel(62, 0, 8, 4); /* USB3VBUS -> USB3VBUS */ + sg_set_pinsel(63, 0, 8, 4); /* USB3OD -> USB3OD */ +#endif +} diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c new file mode 100644 index 00000000000..96abd0235c2 --- /dev/null +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c @@ -0,0 +1,45 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +void proxstream2_pin_init(void) +{ + /* Comment format: PAD Name -> Function Name */ + +#ifdef CONFIG_NAND_DENALI + sg_set_pinsel(30, 8, 8, 4); /* XNFRE -> XNFRE */ + sg_set_pinsel(31, 8, 8, 4); /* XNFWE -> XNFWE */ + sg_set_pinsel(32, 8, 8, 4); /* NFALE -> NFALE */ + sg_set_pinsel(33, 8, 8, 4); /* NFCLE -> NFCLE */ + sg_set_pinsel(34, 8, 8, 4); /* XNFWP -> XNFWP */ + sg_set_pinsel(35, 8, 8, 4); /* XNFCE0 -> XNFCE0 */ + sg_set_pinsel(36, 8, 8, 4); /* NRYBY0 -> NRYBY0 */ + sg_set_pinsel(37, 8, 8, 4); /* XNFCE1 -> NRYBY1 */ + sg_set_pinsel(38, 8, 8, 4); /* NRYBY1 -> XNFCE1 */ + sg_set_pinsel(39, 8, 8, 4); /* NFD0 -> NFD0 */ + sg_set_pinsel(40, 8, 8, 4); /* NFD1 -> NFD1 */ + sg_set_pinsel(41, 8, 8, 4); /* NFD2 -> NFD2 */ + sg_set_pinsel(42, 8, 8, 4); /* NFD3 -> NFD3 */ + sg_set_pinsel(43, 8, 8, 4); /* NFD4 -> NFD4 */ + sg_set_pinsel(44, 8, 8, 4); /* NFD5 -> NFD5 */ + sg_set_pinsel(45, 8, 8, 4); /* NFD6 -> NFD6 */ + sg_set_pinsel(46, 8, 8, 4); /* NFD7 -> NFD7 */ +#endif + +#ifdef CONFIG_USB_XHCI_UNIPHIER + sg_set_pinsel(56, 8, 8, 4); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(57, 8, 8, 4); /* USB0OD -> USB0OD */ + sg_set_pinsel(58, 8, 8, 4); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(59, 8, 8, 4); /* USB1OD -> USB1OD */ + sg_set_pinsel(60, 8, 8, 4); /* USB2VBUS -> USB2VBUS */ + sg_set_pinsel(61, 8, 8, 4); /* USB2OD -> USB2OD */ + sg_set_pinsel(62, 8, 8, 4); /* USB3VBUS -> USB3VBUS */ + sg_set_pinsel(63, 8, 8, 4); /* USB3OD -> USB3OD */ +#endif +} diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile index 2c5fd1a1fca..db622d2034b 100644 --- a/arch/arm/mach-uniphier/sbc/Makefile +++ b/arch/arm/mach-uniphier/sbc/Makefile @@ -3,3 +3,5 @@ obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += sbc-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += sbc-ph1-pro4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += sbc-ph1-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += sbc-ph1-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += sbc-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += sbc-proxstream2.o diff --git a/arch/arm/mach-uniphier/sbc/sbc-proxstream2.c b/arch/arm/mach-uniphier/sbc/sbc-proxstream2.c new file mode 100644 index 00000000000..9c3aeb7cd0b --- /dev/null +++ b/arch/arm/mach-uniphier/sbc/sbc-proxstream2.c @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2015 Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +int proxstream2_sbc_init(const struct uniphier_board_data *bd) +{ + /* necessary for ROM boot ?? */ + /* system bus output enable */ + writel(0x17, PC0CTRL); + + /* + * Only CS1 is connected to support card. + * BKSZ[1:0] should be set to "01". + */ + writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10); + writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11); + writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12); + writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14); + + if (boot_is_swapped()) { + /* + * Boot Swap On: boot from external NOR/SRAM + * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff. + * + * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank + * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals + */ + writel(0x0000bc01, SBBASE0); + } else { + /* + * Boot Swap Off: boot from mask ROM + * 0x40000000-0x41ffffff: mask ROM + * 0x42000000-0x43efffff: memory bank (31MB) + * 0x43f00000-0x43ffffff: peripherals (1MB) + */ + writel(0x0000be01, SBBASE0); /* dummy */ + writel(0x0200be01, SBBASE1); + } + + return 0; +} diff --git a/configs/ph1_ld6b_defconfig b/configs/ph1_ld6b_defconfig new file mode 100644 index 00000000000..68f6ba847b2 --- /dev/null +++ b/configs/ph1_ld6b_defconfig @@ -0,0 +1,30 @@ +CONFIG_ARM=y +CONFIG_ARCH_UNIPHIER=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ARCH_UNIPHIER_PH1_LD6B=y +CONFIG_MICRO_SUPPORT_CARD=y +CONFIG_SYS_TEXT_BASE=0x84000000 +CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld6b-ref" +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_ENV_EXISTS is not set +CONFIG_CMD_NAND=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_PING=y +CONFIG_CMD_TIME=y +# CONFIG_CMD_MISC is not set +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_SIMPLE_BUS=y +CONFIG_NAND_DENALI=y +CONFIG_SYS_NAND_DENALI_64BIT=y +CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 +CONFIG_SPL_NAND_DENALI=y +CONFIG_UNIPHIER_SERIAL=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_STORAGE=y diff --git a/doc/README.uniphier b/doc/README.uniphier index 6792327992a..6ba0320f4f4 100644 --- a/doc/README.uniphier +++ b/doc/README.uniphier @@ -48,6 +48,14 @@ PH1-Pro5: $ make ph1_pro5_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- +ProXstream2: + $ make pxs2_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabi- + +PH1-LD6b: + $ make ph1_ld6b_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabi- + You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-" to use your favorite compiler. From d47fe9bb833bc8dae322c8a6fb0d28d4fec88167 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 22 Sep 2015 00:27:42 +0900 Subject: [PATCH 32/33] ARM: uniphier: fix init page table for ProXstream2/PH1-LD6b USB boot Currently, the USB boot mode is supported by an external loader and U-boot proper image is put on the section 0. This commit allows access there. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/init_page_table.S | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-uniphier/init_page_table.S b/arch/arm/mach-uniphier/init_page_table.S index ac2959a17db..2d3ad15c6e2 100644 --- a/arch/arm/mach-uniphier/init_page_table.S +++ b/arch/arm/mach-uniphier/init_page_table.S @@ -1,7 +1,5 @@ /* - * Copyright (C) 2015 Panasonic Corporation - * Copyright (C) 2015 Socionext Inc. - * Author: Masahiro Yamada + * Copyright (C) 2015 Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ @@ -23,7 +21,7 @@ ENTRY(init_page_table) section = 0 .rept NR_SECTIONS - .if section == TEXT_SECTION || section == STACK_SECTION + .if section == 0 || section == 1 || section == STACK_SECTION attr = NORMAL .else attr = DEVICE From a4bb44b027705f8c05fc525180cabaa3769247bb Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 25 Sep 2015 00:16:44 +0900 Subject: [PATCH 33/33] ARM: dts: uniphier: use SPDX-License-Identifier Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-pinctrl.dtsi | 38 +----------------------------- 1 file changed, 1 insertion(+), 37 deletions(-) diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi index f67445f4f10..b58421396d6 100644 --- a/arch/arm/dts/uniphier-pinctrl.dtsi +++ b/arch/arm/dts/uniphier-pinctrl.dtsi @@ -3,43 +3,7 @@ * * Copyright (C) 2015 Masahiro Yamada * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * SPDX-License-Identifier: GPL-2.0+ X11 */ &pinctrl {