* Make CPU clock on ICA-IP board controllable by a "cpuclk"

environment variable which can set to "100", "133", or "150". The
  CPU clock will be configured accordingly upon next reboot. Other
  values are ignored. In case of an invalid or undefined "cpuclk"
  value, the compile-time default CPU clock speed will be used.

* Enable Quad-UART on BMS2003 board (initialize the PCMCIA memory
  window that is used to access the UART registers by the Linux driver)

* Patch by Reinhard Meyer, 20 Dec 2003:
  Fix clock calculation for the MPC5200 for higher clock frequencies
  (above 2**32 / 10 = 429.5 MHz).

include/common.h

@@ -362,6 +362,9 @@ ulong	get_HCLK (void);
 ulong	get_PCLK (void);
 ulong	get_UCLK (void);
 #endif
+#if defined CONFIG_INCA_IP
+uint    incaip_get_cpuclk (void);
+#endif
 ulong	get_bus_freq  (ulong);
 
 #if defined(CONFIG_MPC85xx)

include/configs/Sandpoint8240.h

@@ -269,7 +269,7 @@
  */
 
 #define CONFIG_SYS_CLK_FREQ  33000000	/* external frequency to pll */
-#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER  2
+#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER  1
 
 #define CFG_ROMNAL		7	/*rom/flash next access time		*/
 #define CFG_ROMFAL		11	/*rom/flash access time			*/

include/configs/incaip.h

@@ -36,12 +36,7 @@
 #define CPU_CLOCK_RATE	133000000	/* 133 MHz clock for the MIPS core */
 #endif
 
-#if CPU_CLOCK_RATE == 100000000
-#define INFINEON_EBU_BOOTCFG	0x20C4	/* CMULT = 4 for 100 MHz */
-#else
-#define INFINEON_EBU_BOOTCFG	0x40C4	/* CMULT = 8 for 150 MHz */
-#endif
-
+#define INFINEON_EBU_BOOTCFG	0x40C4	/* CMULT = 8 */
 
 #define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
 
@@ -106,7 +101,7 @@
 
 #define CFG_BOOTPARAMS_LEN	128*1024
 
-#define CFG_HZ			(CPU_CLOCK_RATE/2)
+#define CFG_HZ			(incaip_get_cpuclk() / 2)
 
 #define CFG_SDRAM_BASE		0x80000000