dm: treewide: Rename ..._platdata variables to just ..._plat

Try to maintain some consistency between these variables by using _plat as
a suffix for them.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
2020-12-03 16:55:23 -07:00
parent b012ff1f1b
commit 8a8d24bdf1
358 changed files with 1404 additions and 1411 deletions

View File

@@ -58,13 +58,13 @@ struct atftmr_timer_regs {
u32 int_mask; /* 0x38 */
};
struct atftmr_timer_platdata {
struct atftmr_timer_plat {
struct atftmr_timer_regs *regs;
};
static u64 atftmr_timer_get_count(struct udevice *dev)
{
struct atftmr_timer_platdata *plat = dev->plat;
struct atftmr_timer_plat *plat = dev->plat;
struct atftmr_timer_regs *const regs = plat->regs;
u32 val;
val = readl(&regs->t3_counter);
@@ -73,7 +73,7 @@ static u64 atftmr_timer_get_count(struct udevice *dev)
static int atftmr_timer_probe(struct udevice *dev)
{
struct atftmr_timer_platdata *plat = dev->plat;
struct atftmr_timer_plat *plat = dev->plat;
struct atftmr_timer_regs *const regs = plat->regs;
u32 cr;
writel(0, &regs->t3_load);
@@ -90,7 +90,7 @@ static int atftmr_timer_probe(struct udevice *dev)
static int atftme_timer_of_to_plat(struct udevice *dev)
{
struct atftmr_timer_platdata *plat = dev_get_plat(dev);
struct atftmr_timer_plat *plat = dev_get_plat(dev);
plat->regs = map_physmem(dev_read_addr(dev),
sizeof(struct atftmr_timer_regs),
MAP_NOCACHE);
@@ -111,7 +111,7 @@ U_BOOT_DRIVER(altera_timer) = {
.id = UCLASS_TIMER,
.of_match = ag101p_timer_ids,
.of_to_plat = atftme_timer_of_to_plat,
.plat_auto = sizeof(struct atftmr_timer_platdata),
.plat_auto = sizeof(struct atftmr_timer_plat),
.probe = atftmr_timer_probe,
.ops = &ag101p_timer_ops,
};

View File

@@ -28,13 +28,13 @@ struct altera_timer_regs {
u32 snaph; /* Snapshot high */
};
struct altera_timer_platdata {
struct altera_timer_plat {
struct altera_timer_regs *regs;
};
static u64 altera_timer_get_count(struct udevice *dev)
{
struct altera_timer_platdata *plat = dev->plat;
struct altera_timer_plat *plat = dev->plat;
struct altera_timer_regs *const regs = plat->regs;
u32 val;
@@ -49,7 +49,7 @@ static u64 altera_timer_get_count(struct udevice *dev)
static int altera_timer_probe(struct udevice *dev)
{
struct altera_timer_platdata *plat = dev->plat;
struct altera_timer_plat *plat = dev->plat;
struct altera_timer_regs *const regs = plat->regs;
writel(0, &regs->status);
@@ -65,7 +65,7 @@ static int altera_timer_probe(struct udevice *dev)
static int altera_timer_of_to_plat(struct udevice *dev)
{
struct altera_timer_platdata *plat = dev_get_plat(dev);
struct altera_timer_plat *plat = dev_get_plat(dev);
plat->regs = map_physmem(dev_read_addr(dev),
sizeof(struct altera_timer_regs),
@@ -88,7 +88,7 @@ U_BOOT_DRIVER(altera_timer) = {
.id = UCLASS_TIMER,
.of_match = altera_timer_ids,
.of_to_plat = altera_timer_of_to_plat,
.plat_auto = sizeof(struct altera_timer_platdata),
.plat_auto = sizeof(struct altera_timer_plat),
.probe = altera_timer_probe,
.ops = &altera_timer_ops,
};

View File

@@ -64,13 +64,13 @@ struct atctmr_timer_regs {
u32 int_mask; /* 0x38 */
};
struct atcpit_timer_platdata {
struct atcpit_timer_plat {
u32 *regs;
};
static u64 atcpit_timer_get_count(struct udevice *dev)
{
struct atcpit_timer_platdata *plat = dev_get_plat(dev);
struct atcpit_timer_plat *plat = dev_get_plat(dev);
u32 val;
val = ~(REG32_TMR(CH_CNT(1))+0xffffffff);
return timer_conv_64(val);
@@ -78,7 +78,7 @@ static u64 atcpit_timer_get_count(struct udevice *dev)
static int atcpit_timer_probe(struct udevice *dev)
{
struct atcpit_timer_platdata *plat = dev_get_plat(dev);
struct atcpit_timer_plat *plat = dev_get_plat(dev);
REG32_TMR(CH_REL(1)) = 0xffffffff;
REG32_TMR(CH_CTL(1)) = APB_CLK|TMR_32;
REG32_TMR(CH_EN) |= CH_TMR_EN(1 , 0);
@@ -87,7 +87,7 @@ static int atcpit_timer_probe(struct udevice *dev)
static int atcpit_timer_of_to_plat(struct udevice *dev)
{
struct atcpit_timer_platdata *plat = dev_get_plat(dev);
struct atcpit_timer_plat *plat = dev_get_plat(dev);
plat->regs = map_physmem(dev_read_addr(dev), 0x100 , MAP_NOCACHE);
return 0;
}
@@ -106,7 +106,7 @@ U_BOOT_DRIVER(atcpit100_timer) = {
.id = UCLASS_TIMER,
.of_match = atcpit_timer_ids,
.of_to_plat = atcpit_timer_of_to_plat,
.plat_auto = sizeof(struct atcpit_timer_platdata),
.plat_auto = sizeof(struct atcpit_timer_plat),
.probe = atcpit_timer_probe,
.ops = &atcpit_timer_ops,
};

View File

@@ -21,13 +21,13 @@ struct atmel_pit_regs {
u32 value_image;
};
struct atmel_pit_platdata {
struct atmel_pit_plat {
struct atmel_pit_regs *regs;
};
static u64 atmel_pit_get_count(struct udevice *dev)
{
struct atmel_pit_platdata *plat = dev_get_plat(dev);
struct atmel_pit_plat *plat = dev_get_plat(dev);
struct atmel_pit_regs *const regs = plat->regs;
u32 val = readl(&regs->value_image);
@@ -36,7 +36,7 @@ static u64 atmel_pit_get_count(struct udevice *dev)
static int atmel_pit_probe(struct udevice *dev)
{
struct atmel_pit_platdata *plat = dev_get_plat(dev);
struct atmel_pit_plat *plat = dev_get_plat(dev);
struct atmel_pit_regs *const regs = plat->regs;
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct clk clk;
@@ -60,7 +60,7 @@ static int atmel_pit_probe(struct udevice *dev)
static int atmel_pit_of_to_plat(struct udevice *dev)
{
struct atmel_pit_platdata *plat = dev_get_plat(dev);
struct atmel_pit_plat *plat = dev_get_plat(dev);
plat->regs = dev_read_addr_ptr(dev);
@@ -81,7 +81,7 @@ U_BOOT_DRIVER(atmel_pit) = {
.id = UCLASS_TIMER,
.of_match = atmel_pit_ids,
.of_to_plat = atmel_pit_of_to_plat,
.plat_auto = sizeof(struct atmel_pit_platdata),
.plat_auto = sizeof(struct atmel_pit_plat),
.probe = atmel_pit_probe,
.ops = &atmel_pit_ops,
};

View File

@@ -90,7 +90,7 @@ static int timer_post_probe(struct udevice *dev)
int timer_timebase_fallback(struct udevice *dev)
{
struct udevice *cpu;
struct cpu_platdata *cpu_plat;
struct cpu_plat *cpu_plat;
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
/* Did we get our clock rate from the device tree? */