clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock

On all STM32F4 and F7 SoCs  family (except STM32F429), PLLSAI
output P can be used as 48MHz clock source for USB and SDMMC.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Tested By: Bruno Herrera <bruherrera@gmail.com>

include/stm32_rcc.h

@@ -40,7 +40,8 @@ struct stm32_clk_info {
 };
 
 enum soc_family {
-	STM32F4,
+	STM32F42X,
+	STM32F469,
 	STM32F7,
 };