From dfa64707da22d816c8e43141f7aaaf3a3078cd06 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 17 Jan 2020 21:26:04 +0100 Subject: [PATCH 01/16] rockchip: make_fit_atf: use correct fdt_x references in config nodes The script iterates over the given devicetrees and creates both fdt_x node as well as a conf-node for each passed dt. But there is a slight bug in that it always references fdt_1 in each conf node instead of the matching fdt_x as expected. So fix that by referencing the number of the current dt similar to how the fdt_x nodes gets created. Signed-off-by: Heiko Stuebner Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/make_fit_atf.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py index c79317d6c51..d15c32b3032 100755 --- a/arch/arm/mach-rockchip/make_fit_atf.py +++ b/arch/arm/mach-rockchip/make_fit_atf.py @@ -107,7 +107,7 @@ def append_conf_section(file, cnt, dtname, segments): file.write(';\n') if segments <= 1: file.write(';\n') - file.write('\t\t\tfdt = "fdt_1";\n') + file.write('\t\t\tfdt = "fdt_%d";\n' % cnt) file.write('\t\t};\n') file.write('\n') From 552e7cc61e5d75fffa2f6486136eae01f5c21a69 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 17 Jan 2020 21:37:09 +0100 Subject: [PATCH 02/16] rockchip: make the global board_fit_config_name_match __weak The core Rockchip spl code contains a default board_fit_config_name_match implementation doing nothing. Individual boards may want to handle this differently, so add a __weak atribute to make it possible to override this function in other places. Signed-off-by: Heiko Stuebner Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/spl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index 7d0e6fa1aff..48ab0e60c63 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -147,7 +147,7 @@ void board_init_f(ulong dummy) } #ifdef CONFIG_SPL_LOAD_FIT -int board_fit_config_name_match(const char *name) +int __weak board_fit_config_name_match(const char *name) { /* Just empty function now - can't decide what to choose */ debug("%s: %s\n", __func__, name); From 4d08de5840573bde8c36cb4e4c5f39af46fe1c40 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 20 Jan 2020 09:15:26 +0000 Subject: [PATCH 03/16] arm: dts: rockchip: Update EVB/Puma devices to upstream USB/dwc3 conventions The upstream linux kernel for the Rockchip 3399 SoC use usbdrd3 naming so move the two remaining devices over to that for their device trees to make it easier to sync with upstream DTs. Signed-off-by: Peter Robinson Reviewed-by: Kever Yang --- arch/arm/dts/rk3399-evb.dts | 4 ++-- arch/arm/dts/rk3399-puma.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts index 8e887f3a177..4129e902a81 100644 --- a/arch/arm/dts/rk3399-evb.dts +++ b/arch/arm/dts/rk3399-evb.dts @@ -176,7 +176,7 @@ status = "okay"; }; -&dwc3_typec0 { +&usbdrd3_0 { vbus-supply = <&vcc5v0_typec0>; status = "okay"; }; @@ -189,7 +189,7 @@ status = "okay"; }; -&dwc3_typec1 { +&usbdrd3_1 { vbus-supply = <&vcc5v0_typec1>; status = "okay"; }; diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index 74368da5506..aae9998871f 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -518,7 +518,7 @@ status = "disabled"; }; -&dwc3_typec0 { +&usbdrd3_0 { status = "okay"; }; @@ -530,7 +530,7 @@ status = "disabled"; }; -&dwc3_typec1 { +&usbdrd3_1 { status = "okay"; tsd,usb-port-power = "usbhub_enable"; }; From 5532e3bb246a93cc64490be275285e7531b2cc40 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 20 Jan 2020 09:17:00 +0000 Subject: [PATCH 04/16] arm: dts: rockchip: rk3399: Move U-Boot specific bits to rk3399-u-boot There's some bits in the U-Boot rk3399.dtsi that aren't yet in the upstream Linux dtsi but are needed for early boot. This moves them to the u-boot.dtsi to make it easier to sync the rest of rk3399.dtsi with upstream. Signed-off-by: Peter Robinson Reviewed-by: Kever Yang --- arch/arm/dts/rk3399-u-boot.dtsi | 55 +++++++++++++++++++++++++++------ arch/arm/dts/rk3399.dtsi | 38 ----------------------- 2 files changed, 45 insertions(+), 48 deletions(-) diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index 40240bbfc2b..8b857ccfc79 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -2,19 +2,58 @@ /* * Copyright (C) 2019 Jagan Teki */ +#define USB_CLASS_HUB 9 + +/ { + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; + }; + + cic: syscon@ff620000 { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-cic", "syscon"; + reg = <0x0 0xff620000 0x0 0x100>; + }; + + dfi: dfi@ff630000 { + u-boot,dm-pre-reloc; + reg = <0x00 0xff630000 0x00 0x4000>; + compatible = "rockchip,rk3399-dfi"; + rockchip,pmu = <&pmugrf>; + clocks = <&cru PCLK_DDR_MON>; + clock-names = "pclk_ddr_mon"; + }; + + dmc: dmc { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-dmc"; + devfreq-events = <&dfi>; + interrupts = ; + clocks = <&cru SCLK_DDRCLK>; + clock-names = "dmc_clk"; + reg = <0x0 0xffa80000 0x0 0x0800 + 0x0 0xffa80800 0x0 0x1800 + 0x0 0xffa82000 0x0 0x2000 + 0x0 0xffa84000 0x0 0x1000 + 0x0 0xffa88000 0x0 0x0800 + 0x0 0xffa88800 0x0 0x1800 + 0x0 0xffa8a000 0x0 0x2000 + 0x0 0xffa8c000 0x0 0x1000>; + }; + + pmusgrf: syscon@ff330000 { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3399-pmusgrf", "syscon"; + reg = <0x0 0xff330000 0x0 0xe3d4>; + }; -&cic { - u-boot,dm-pre-reloc; }; &cru { u-boot,dm-pre-reloc; }; -&dmc { - u-boot,dm-pre-reloc; -}; - &grf { u-boot,dm-pre-reloc; }; @@ -39,10 +78,6 @@ u-boot,dm-pre-reloc; }; -&pmusgrf { - u-boot,dm-pre-reloc; -}; - &sdhci { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi index 3f773b10f4d..6b7c136ab8c 100644 --- a/arch/arm/dts/rk3399.dtsi +++ b/arch/arm/dts/rk3399.dtsi @@ -10,7 +10,6 @@ #include #include #include -#define USB_CLASS_HUB 9 / { compatible = "rockchip,rk3399"; @@ -34,8 +33,6 @@ serial2 = &uart2; serial3 = &uart3; serial4 = &uart4; - mmc0 = &sdhci; - mmc1 = &sdmmc; }; cpus { @@ -1080,11 +1077,6 @@ }; }; - pmusgrf: syscon@ff330000 { - compatible = "rockchip,rk3399-pmusgrf", "syscon"; - reg = <0x0 0xff330000 0x0 0xe3d4>; - }; - spi3: spi@ff350000 { compatible = "rockchip,rk3399-spi", "rockchip,rk3066-spi"; reg = <0x0 0xff350000 0x0 0x1000>; @@ -1200,36 +1192,6 @@ status = "disabled"; }; - cic: syscon@ff620000 { - compatible = "rockchip,rk3399-cic", "syscon"; - reg = <0x0 0xff620000 0x0 0x100>; - }; - - dfi: dfi@ff630000 { - reg = <0x00 0xff630000 0x00 0x4000>; - compatible = "rockchip,rk3399-dfi"; - rockchip,pmu = <&pmugrf>; - clocks = <&cru PCLK_DDR_MON>; - clock-names = "pclk_ddr_mon"; - status = "disabled"; - }; - - dmc: dmc { - compatible = "rockchip,rk3399-dmc"; - devfreq-events = <&dfi>; - interrupts = ; - clocks = <&cru SCLK_DDRCLK>; - clock-names = "dmc_clk"; - reg = <0x0 0xffa80000 0x0 0x0800 - 0x0 0xffa80800 0x0 0x1800 - 0x0 0xffa82000 0x0 0x2000 - 0x0 0xffa84000 0x0 0x1000 - 0x0 0xffa88000 0x0 0x0800 - 0x0 0xffa88800 0x0 0x1800 - 0x0 0xffa8a000 0x0 0x2000 - 0x0 0xffa8c000 0x0 0x1000>; - }; - efuse0: efuse@ff690000 { compatible = "rockchip,rk3399-efuse"; reg = <0x0 0xff690000 0x0 0x80>; From ab800e5a6f28866626317b0038df3bcf8aa47f71 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 20 Jan 2020 09:18:18 +0000 Subject: [PATCH 05/16] arm: dts: rockchip: puma: move U-Boot specific bits to u-boot.dtsi Move the U-Boot specific bits to a -u-boot.dtsi include so all the u-boot.dtsi hierarchy is included. Signed-off-by: Peter Robinson Reviewed-by: Kever Yang --- arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi | 4 ++++ arch/arm/dts/rk3399-puma-ddr1333.dts | 2 -- arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi | 4 ++++ arch/arm/dts/rk3399-puma-ddr1600.dts | 2 -- arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi | 4 ++++ arch/arm/dts/rk3399-puma-ddr1866.dts | 2 -- arch/arm/dts/rk3399-puma-u-boot.dtsi | 24 ++++++++++++++++++++ arch/arm/dts/rk3399-puma.dtsi | 19 ---------------- 8 files changed, 36 insertions(+), 25 deletions(-) create mode 100644 arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-puma-u-boot.dtsi diff --git a/arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi b/arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi new file mode 100644 index 00000000000..39d3927f498 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3399-puma-u-boot.dtsi" +#include "rk3399-sdram-ddr3-1333.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1333.dts b/arch/arm/dts/rk3399-puma-ddr1333.dts index 8f1193cbe68..80f27699f42 100644 --- a/arch/arm/dts/rk3399-puma-ddr1333.dts +++ b/arch/arm/dts/rk3399-puma-ddr1333.dts @@ -6,5 +6,3 @@ /dts-v1/; #include "rk3399-puma.dtsi" -#include "rk3399-sdram-ddr3-1333.dtsi" - diff --git a/arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi b/arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi new file mode 100644 index 00000000000..be58311dc48 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3399-puma-u-boot.dtsi" +#include "rk3399-sdram-ddr3-1600.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1600.dts b/arch/arm/dts/rk3399-puma-ddr1600.dts index 42763f82d03..cb76b0165cf 100644 --- a/arch/arm/dts/rk3399-puma-ddr1600.dts +++ b/arch/arm/dts/rk3399-puma-ddr1600.dts @@ -7,5 +7,3 @@ #include "rk3399-puma.dtsi" #include "rk3399-u-boot.dtsi" -#include "rk3399-sdram-ddr3-1600.dtsi" - diff --git a/arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi b/arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi new file mode 100644 index 00000000000..48da0763291 --- /dev/null +++ b/arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3399-puma-u-boot.dtsi" +#include "rk3399-sdram-ddr3-1866.dtsi" diff --git a/arch/arm/dts/rk3399-puma-ddr1866.dts b/arch/arm/dts/rk3399-puma-ddr1866.dts index bb86a448fae..80f27699f42 100644 --- a/arch/arm/dts/rk3399-puma-ddr1866.dts +++ b/arch/arm/dts/rk3399-puma-ddr1866.dts @@ -6,5 +6,3 @@ /dts-v1/; #include "rk3399-puma.dtsi" -#include "rk3399-sdram-ddr3-1866.dtsi" - diff --git a/arch/arm/dts/rk3399-puma-u-boot.dtsi b/arch/arm/dts/rk3399-puma-u-boot.dtsi new file mode 100644 index 00000000000..52f62b5d39e --- /dev/null +++ b/arch/arm/dts/rk3399-puma-u-boot.dtsi @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3399-u-boot.dtsi" +/ { + config { + u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ + u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ + u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ + u-boot,boot-led = "module_led"; + sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + u-boot,spl-boot-order = \ + "same-as-spl", &spiflash, &sdhci, &sdmmc; + }; + + aliases { + spi0 = &spi1; + spi1 = &spi5; + }; + +}; diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index aae9998871f..558b6337dfe 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -10,25 +10,6 @@ model = "Theobroma Systems RK3399-Q7 SoM"; compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399"; - config { - u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ - u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ - u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ - u-boot,boot-led = "module_led"; - sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - u-boot,spl-boot-order = \ - "same-as-spl", &spiflash, &sdhci, &sdmmc; - }; - - aliases { - spi0 = &spi1; - spi1 = &spi5; - }; - leds { compatible = "gpio-leds"; pinctrl-names = "default"; From ac3d121c3577c2c9ac1881086d6d843762d7a29d Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 22 Jan 2020 10:31:43 +0100 Subject: [PATCH 06/16] rockchip: px30: sync the main px30 dtsi from mainline There have been multiple peripherals added to the main px30 dtsi in the Linux kernel since its addition to u-boot. So to make it easier to sync board devicetrees, update the core dtsi from Linux. Signed-off-by: Heiko Stuebner Reviewed-by: Kever Yang --- arch/arm/dts/px30.dtsi | 182 ++++++++++++++++++++++++++++++++++++++--- 1 file changed, 171 insertions(+), 11 deletions(-) diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi index 0d2325a77fc..b6c79e7ed31 100644 --- a/arch/arm/dts/px30.dtsi +++ b/arch/arm/dts/px30.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include / { compatible = "rockchip,px30"; @@ -113,16 +114,11 @@ compatible = "operating-points-v2"; opp-shared; - opp-408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <950000 950000 1350000>; - clock-latency-ns = <40000>; - opp-suspend; - }; opp-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <950000 950000 1350000>; clock-latency-ns = <40000>; + opp-suspend; }; opp-816000000 { opp-hz = /bits/ 64 <816000000>; @@ -186,6 +182,55 @@ ; }; + thermal_zones: thermal-zones { + soc_thermal: soc-thermal { + polling-delay-passive = <20>; + polling-delay = <1000>; + sustainable-power = <750>; + thermal-sensors = <&tsadc 0>; + + trips { + threshold: trip-point-0 { + temperature = <70000>; + hysteresis = <2000>; + type = "passive"; + }; + + target: trip-point-1 { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + + soc_crit: soc-crit { + temperature = <115000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&target>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <4096>; + }; + + map1 { + trip = <&target>; + cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <4096>; + }; + }; + }; + + gpu_thermal: gpu-thermal { + polling-delay-passive = <100>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + thermal-sensors = <&tsadc 1>; + }; + }; + xin24m: xin24m { compatible = "fixed-clock"; #clock-cells = <0>; @@ -370,6 +415,36 @@ compatible = "rockchip,px30-io-voltage-domain"; status = "disabled"; }; + + lvds: lvds { + compatible = "rockchip,px30-lvds"; + phys = <&dsi_dphy>; + phy-names = "dphy"; + rockchip,grf = <&grf>; + rockchip,output = "lvds"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + lvds_vopb_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_lvds>; + }; + + lvds_vopl_in: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_lvds>; + }; + }; + }; + }; }; uart1: serial@ff158000 { @@ -650,6 +725,26 @@ }; }; + tsadc: tsadc@ff280000 { + compatible = "rockchip,px30-tsadc"; + reg = <0x0 0xff280000 0x0 0x100>; + interrupts = ; + assigned-clocks = <&cru SCLK_TSADC>; + assigned-clock-rates = <50000>; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + rockchip,grf = <&grf>; + rockchip,hw-tshut-temp = <120000>; + pinctrl-names = "init", "default", "sleep"; + pinctrl-0 = <&tsadc_otp_gpio>; + pinctrl-1 = <&tsadc_otp_out>; + pinctrl-2 = <&tsadc_otp_gpio>; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; + saradc: saradc@ff288000 { compatible = "rockchip,px30-saradc", "rockchip,rk3399-saradc"; reg = <0x0 0xff288000 0x0 0x100>; @@ -706,12 +801,48 @@ #reset-cells = <1>; }; + usb2phy_grf: syscon@ff2c0000 { + compatible = "rockchip,px30-usb2phy-grf", "syscon", + "simple-mfd"; + reg = <0x0 0xff2c0000 0x0 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + + u2phy: usb2-phy@100 { + compatible = "rockchip,px30-usb2phy"; + reg = <0x100 0x20>; + clocks = <&pmucru SCLK_USBPHY_REF>; + clock-names = "phyclk"; + #clock-cells = <0>; + assigned-clocks = <&cru USB480M>; + assigned-clock-parents = <&u2phy>; + clock-output-names = "usb480m_phy"; + status = "disabled"; + + u2phy_host: host-port { + #phy-cells = <0>; + interrupts = ; + interrupt-names = "linestate"; + status = "disabled"; + }; + + u2phy_otg: otg-port { + #phy-cells = <0>; + interrupts = , + , + ; + interrupt-names = "otg-bvalid", "otg-id", + "linestate"; + status = "disabled"; + }; + }; + }; + dsi_dphy: phy@ff2e0000 { compatible = "rockchip,px30-dsi-dphy"; reg = <0x0 0xff2e0000 0x0 0x10000>; clocks = <&pmucru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>; clock-names = "ref", "pclk"; - #clock-cells = <0>; resets = <&cru SRST_MIPIDSIPHY_P>; reset-names = "apb"; #phy-cells = <0>; @@ -731,6 +862,8 @@ g-rx-fifo-size = <280>; g-tx-fifo-size = <256 128 128 64 32 16>; g-use-dma; + phys = <&u2phy_otg>; + phy-names = "usb2-phy"; power-domains = <&power PX30_PD_USB>; status = "disabled"; }; @@ -741,6 +874,8 @@ interrupts = ; clocks = <&cru HCLK_HOST>; clock-names = "usbhost"; + phys = <&u2phy_host>; + phy-names = "usb"; power-domains = <&power PX30_PD_USB>; status = "disabled"; }; @@ -751,6 +886,8 @@ interrupts = ; clocks = <&cru HCLK_HOST>; clock-names = "usbhost"; + phys = <&u2phy_host>; + phy-names = "usb"; power-domains = <&power PX30_PD_USB>; status = "disabled"; }; @@ -823,17 +960,30 @@ status = "disabled"; }; + gpu: gpu@ff400000 { + compatible = "rockchip,px30-mali", "arm,mali-bifrost"; + reg = <0x0 0xff400000 0x0 0x4000>; + interrupts = , + , + ; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&cru SCLK_GPU>; + #cooling-cells = <2>; + power-domains = <&power PX30_PD_GPU>; + status = "disabled"; + }; + dsi: dsi@ff450000 { compatible = "rockchip,px30-mipi-dsi"; reg = <0x0 0xff450000 0x0 0x10000>; interrupts = ; - clocks = <&cru PCLK_MIPI_DSI>, <&dsi_dphy>; - clock-names = "pclk", "pll"; - resets = <&cru SRST_MIPIDSI_HOST_P>; - reset-names = "apb"; + clocks = <&cru PCLK_MIPI_DSI>; + clock-names = "pclk"; phys = <&dsi_dphy>; phy-names = "dphy"; power-domains = <&power PX30_PD_VO>; + resets = <&cru SRST_MIPIDSI_HOST_P>; + reset-names = "apb"; rockchip,grf = <&grf>; #address-cells = <1>; #size-cells = <0>; @@ -883,6 +1033,11 @@ reg = <0>; remote-endpoint = <&dsi_in_vopb>; }; + + vopb_out_lvds: endpoint@1 { + reg = <1>; + remote-endpoint = <&lvds_vopb_in>; + }; }; }; @@ -920,6 +1075,11 @@ reg = <0>; remote-endpoint = <&dsi_in_vopl>; }; + + vopl_out_lvds: endpoint@1 { + reg = <1>; + remote-endpoint = <&lvds_vopl_in>; + }; }; }; From 38070170b8b991230297ddce317ace11e1606629 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Thu, 23 Jan 2020 19:42:19 +0530 Subject: [PATCH 07/16] rockchip: rk3288: Enable pre console buffer Enable pre console buffer for rk3288 platform. This would help to capture the console messages prior to the console being initialised. Enabling this would help to capture all the console messages on video output source like HDMI. So we can find the full console messages of U-Boot proper on HDMI display when enabled it for RK3288 platform boards. Buffer address used for pre console is 0x0f000000 which is ram base plus 240MiB. right now the Allwinner SoC is using similar computation. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + common/Kconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 2f260a5c5f1..ed7514ab759 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -102,6 +102,7 @@ config ROCKCHIP_RK3288 select SUPPORT_SPL select SPL select SUPPORT_TPL + imply PRE_CONSOLE_BUFFER imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD imply TPL_CLK diff --git a/common/Kconfig b/common/Kconfig index 4bc3df4e1bb..46e4193fc83 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -567,6 +567,7 @@ config PRE_CON_BUF_ADDR depends on PRE_CONSOLE_BUFFER default 0x2f000000 if ARCH_SUNXI && MACH_SUN9I default 0x4f000000 if ARCH_SUNXI && !MACH_SUN9I + default 0x0f000000 if ROCKCHIP_RK3288 help This sets the start address of the pre-console buffer. This must be in available memory and is accessed before relocation and From 8040d8e00f83f957e2dab09518f19bb79b47a4a5 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Thu, 23 Jan 2020 19:42:20 +0530 Subject: [PATCH 08/16] ARM: dts: rockchip: Sync rk3288-vyasa dts from linux Sync rk3288-vyasa dts file from Linux. This sync has changes required to work HDMI output on Vyasa RK3288 board. This sync excludes the io_domains node since it is not available in rk3288.dtsi. Changes like vcc50_hdmi, vdd10_lcd and ddc-i2c-bus are not merged to Linux yet but wil resync later if any further updates on this. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- arch/arm/dts/rk3288-vyasa.dts | 79 ++++++++++++++--------------------- 1 file changed, 32 insertions(+), 47 deletions(-) diff --git a/arch/arm/dts/rk3288-vyasa.dts b/arch/arm/dts/rk3288-vyasa.dts index 850aa258185..4193f7208cd 100644 --- a/arch/arm/dts/rk3288-vyasa.dts +++ b/arch/arm/dts/rk3288-vyasa.dts @@ -1,43 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2017 Jagan Teki - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; @@ -115,6 +78,17 @@ vin-supply = <&vcc_io>; }; + vcc50_hdmi: vcc50-hdmi { + compatible = "regulator-fixed"; + regulator-name = "vcc50_hdmi"; + enable-active-high; + gpio = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>; /* HDMI_EN */ + pinctrl-names = "default"; + pinctrl-0 = <&vcc50_hdmi_en>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vsus_5v>; + }; vusb1_5v: vusb1-5v { compatible = "regulator-fixed"; regulator-name = "vusb1_5v"; @@ -158,7 +132,6 @@ &emmc { bus-width = <8>; cap-mmc-highspeed; - disable-wp; non-removable; pinctrl-names = "default"; pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; @@ -188,7 +161,7 @@ }; &hdmi { - ddc-i2c-bus = <&i2c2>; + ddc-i2c-bus = <&i2c5>; status = "okay"; }; @@ -324,15 +297,15 @@ }; }; - vcc10_lcd: LDO_REG6 { - regulator-name = "vcc10_lcd"; + vdd10_lcd: LDO_REG6 { + regulator-name = "vdd10_lcd"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; regulator-boot-on; regulator-state-mem { regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; + regulator-suspend-microvolt = <1000000>; }; }; @@ -385,7 +358,7 @@ }; }; -&i2c2 { +&i2c5 { status = "okay"; }; @@ -402,6 +375,12 @@ status = "okay"; }; +&tsadc { + rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ + status = "okay"; +}; + &uart2 { status = "okay"; }; @@ -463,15 +442,21 @@ }; }; + hdmi { + vcc50_hdmi_en: vcc50-hdmi-en { + rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + pmic { pmic_int: pmic-int { - rockchip,pins = ; + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; }; }; usb_host { phy_pwr_en: phy-pwr-en { - rockchip,pins = ; + rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_output_high>; }; usb2_pwr_en: usb2-pwr-en { @@ -481,7 +466,7 @@ usb_otg { otg_vbus_drv: otg-vbus-drv { - rockchip,pins = ; + rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; From d7e7a5b044749de1622c0372928dee553c1985b6 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Thu, 23 Jan 2020 19:42:21 +0530 Subject: [PATCH 09/16] rk3288: tinker: Enable HDMI output Enable HDMI output for Tinker RK3288 board. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- configs/tinker-rk3288_defconfig | 6 ++++++ include/configs/tinker_rk3288.h | 6 +++++- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index fb7d1065dcf..be636c05ea7 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -83,3 +83,9 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y +CONFIG_DM_VIDEO=y +CONFIG_VIDEO_BPP16=y +CONFIG_VIDEO_BPP32=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y diff --git a/include/configs/tinker_rk3288.h b/include/configs/tinker_rk3288.h index f8a55a2cec6..f1095ccd0e1 100644 --- a/include/configs/tinker_rk3288.h +++ b/include/configs/tinker_rk3288.h @@ -6,7 +6,11 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define ROCKCHIP_DEVICE_SETTINGS +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdin=serial,cros-ec-keyb\0" \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + #include #undef BOOT_TARGET_DEVICES From a30c68945cadc6aada3f05a6864627f3ca9d6bde Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Thu, 23 Jan 2020 19:42:22 +0530 Subject: [PATCH 10/16] rk3288: vyasa: Add console settings Add console settings like stdin, stdout and stderr as cros-ec-keyb and vidconsole respectively for Vyasa Rk3288 board. This would certainly help to detect the attached video devices (like HDMI) and print the console message on display. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- include/configs/vyasa-rk3288.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/configs/vyasa-rk3288.h b/include/configs/vyasa-rk3288.h index 3574a3b5a57..e31dc777200 100644 --- a/include/configs/vyasa-rk3288.h +++ b/include/configs/vyasa-rk3288.h @@ -8,7 +8,11 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define ROCKCHIP_DEVICE_SETTINGS +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdin=serial,cros-ec-keyb\0" \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + #include #undef BOOT_TARGET_DEVICES From 80b9882a6e666fe7edd7fe3e821ae6e8188fb126 Mon Sep 17 00:00:00 2001 From: Hugh Cole-Baker Date: Sat, 25 Jan 2020 16:19:36 +0000 Subject: [PATCH 11/16] rockchip: boot_mode: find the saradc device name adc_channel_single_shot() requires the full device name e.g. "saradc@ff100000", which differs between Rockchip SoC's, but they all share the prefix "saradc"; find the ADC device with this name prefix and use its full name. Signed-off-by: Hugh Cole-Baker Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/boot_mode.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c index 08f80bd91aa..7598fe4c43d 100644 --- a/arch/arm/mach-rockchip/boot_mode.c +++ b/arch/arm/mach-rockchip/boot_mode.c @@ -7,6 +7,8 @@ #include #include #include +#include +#include #if (CONFIG_ROCKCHIP_BOOT_MODE_REG == 0) @@ -35,8 +37,26 @@ void set_back_to_bootrom_dnl_flag(void) __weak int rockchip_dnl_key_pressed(void) { unsigned int val; + struct udevice *dev; + struct uclass *uc; + int ret; - if (adc_channel_single_shot("saradc", 1, &val)) { + ret = uclass_get(UCLASS_ADC, &uc); + if (ret) + return false; + + ret = -ENODEV; + uclass_foreach_dev(dev, uc) { + if (!strncmp(dev->name, "saradc", 6)) { + ret = adc_channel_single_shot(dev->name, 1, &val); + break; + } + } + + if (ret == -ENODEV) { + pr_warn("%s: no saradc device found\n", __func__); + return false; + } else if (ret) { pr_err("%s: adc_channel_single_shot fail!\n", __func__); return false; } From 01892d230dd456278cd28c3b8de109202f910238 Mon Sep 17 00:00:00 2001 From: Suniel Mahesh Date: Mon, 3 Feb 2020 19:20:04 +0530 Subject: [PATCH 12/16] rockchip: rk3399: split roc-pc-rk3399 out of evb_rk3399 roc-pc-rk3399 board has one user button & three user LED's. Currently we don't have any code support for these devices. Since button and LED's are specific to roc-pc-rk3399 board, split it into its own board file and add code support here. Signed-off-by: Suniel Mahesh Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/rk3399/Kconfig | 20 ++++++++++++++ board/firefly/roc-pc-rk3399/Kconfig | 16 ++++++++++++ board/firefly/roc-pc-rk3399/MAINTAINERS | 6 +++++ board/firefly/roc-pc-rk3399/Makefile | 7 +++++ board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 29 +++++++++++++++++++++ board/rockchip/evb_rk3399/MAINTAINERS | 6 ----- configs/roc-pc-rk3399_defconfig | 1 + include/configs/roc-pc-rk3399.h | 22 ++++++++++++++++ 8 files changed, 101 insertions(+), 6 deletions(-) create mode 100644 board/firefly/roc-pc-rk3399/Kconfig create mode 100644 board/firefly/roc-pc-rk3399/MAINTAINERS create mode 100644 board/firefly/roc-pc-rk3399/Makefile create mode 100644 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c create mode 100644 include/configs/roc-pc-rk3399.h diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index f9941528035..0dc43c289a2 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -81,6 +81,25 @@ config TARGET_ROCKPRO64_RK3399 * GPIO expansion ports * DC 12V/2A +config TARGET_ROC_PC_RK3399 + bool "Firefly ROC-RK3399-PC board" + help + ROC-RK3399-PC is SBC produced by Firefly. Key features: + + * Rockchip RK3399 + * 4GB Dual-Channel LPDDR4 64-bit + * SD card slot + * eMMC socket + * 16MB SPI Flash + * Gigabit ethernet + * PCIe + * HDMI In/Out, DP, MIPI DSI/CSI, eDP + * USB 3.0, 2.0 + * USB Type C power and data + * GPIO expansion ports + * wide voltage input(5V-15V), dual cell battery + * Wifi/BT accessible via expansion board M.2 + endchoice config ROCKCHIP_BOOT_MODE_REG @@ -128,5 +147,6 @@ source "board/theobroma-systems/puma_rk3399/Kconfig" source "board/vamrs/rock960_rk3399/Kconfig" source "board/google/gru/Kconfig" source "board/pine64/rockpro64_rk3399/Kconfig" +source "board/firefly/roc-pc-rk3399/Kconfig" endif diff --git a/board/firefly/roc-pc-rk3399/Kconfig b/board/firefly/roc-pc-rk3399/Kconfig new file mode 100644 index 00000000000..720fbbb5fa3 --- /dev/null +++ b/board/firefly/roc-pc-rk3399/Kconfig @@ -0,0 +1,16 @@ +if TARGET_ROC_PC_RK3399 + +config SYS_BOARD + default "roc-pc-rk3399" + +config SYS_VENDOR + default "firefly" + +config SYS_CONFIG_NAME + default "roc-pc-rk3399" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif + diff --git a/board/firefly/roc-pc-rk3399/MAINTAINERS b/board/firefly/roc-pc-rk3399/MAINTAINERS new file mode 100644 index 00000000000..7564dd252de --- /dev/null +++ b/board/firefly/roc-pc-rk3399/MAINTAINERS @@ -0,0 +1,6 @@ +ROC-RK3399-PC +M: Levin Du +S: Maintained +F: board/firefly/roc-pc-rk3399 +F: include/configs/roc-pc-rk3399.h +F: configs/roc-pc-rk3399_defconfig diff --git a/board/firefly/roc-pc-rk3399/Makefile b/board/firefly/roc-pc-rk3399/Makefile new file mode 100644 index 00000000000..29c79b25d7f --- /dev/null +++ b/board/firefly/roc-pc-rk3399/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2016 Rockchip Electronics Co., Ltd +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += roc-pc-rk3399.o diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c new file mode 100644 index 00000000000..d47dba8b91c --- /dev/null +++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + */ + +#include +#include +#include +#include + +#ifndef CONFIG_SPL_BUILD +int board_early_init_f(void) +{ + struct udevice *regulator; + int ret; + + ret = regulator_get_by_platname("vcc5v0_host", ®ulator); + if (ret) { + debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); + goto out; + } + + ret = regulator_set_enable(regulator, true); + if (ret) + debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret); +out: + return 0; +} +#endif diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS index eab4c4c5259..0834254f6de 100644 --- a/board/rockchip/evb_rk3399/MAINTAINERS +++ b/board/rockchip/evb_rk3399/MAINTAINERS @@ -55,12 +55,6 @@ F: configs/orangepi-rk3399_defconfig F: arch/arm/dts/rk3399-u-boot.dtsi F: arch/arm/dts/rk3399-orangepi-u-boot.dtsi -ROC-RK3399-PC -M: Levin Du -S: Maintained -F: configs/roc-pc-rk3399_defconfig -F: arch/arm/dts/rk3399-roc-pc-u-boot.dtsi - ROCK-PI-4 M: Akash Gajjar M: Jagan Teki diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 81e94fe9437..577ba77b3ed 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_ROC_PC_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/include/configs/roc-pc-rk3399.h b/include/configs/roc-pc-rk3399.h new file mode 100644 index 00000000000..3fd10625426 --- /dev/null +++ b/include/configs/roc-pc-rk3399.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + */ + +#ifndef __ROC_PC_RK3399_H +#define __ROC_PC_RK3399_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdin=serial,cros-ec-keyb\0" \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include + +#if defined(CONFIG_ENV_IS_IN_MMC) +# define CONFIG_SYS_MMC_ENV_DEV 0 +#endif + +#define SDRAM_BANK_SIZE (2UL << 30) + +#endif From 5a6d3d1fbca70d7f528c685292d64c4cd0106aa6 Mon Sep 17 00:00:00 2001 From: Suniel Mahesh Date: Mon, 3 Feb 2020 19:20:05 +0530 Subject: [PATCH 13/16] board: roc-pc-rk3399: Add support for onboard LED's and push button to indicate power mode Added support for onboard LED's and push button. When powered board will be in low power mode(yellow LED), on button press, board enters full power mode (red LED) and boots u-boot. Signed-off-by: Suniel Mahesh Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/tpl.c | 7 +++++ board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 32 +++++++++++++++++++++ configs/roc-pc-rk3399_defconfig | 1 + 3 files changed, 40 insertions(+) diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c index 31a3eb4c285..a2b8d31cbd7 100644 --- a/arch/arm/mach-rockchip/tpl.c +++ b/arch/arm/mach-rockchip/tpl.c @@ -40,11 +40,18 @@ __weak void rockchip_stimer_init(void) TIMER_CONTROL_REG); } +__weak int board_early_init_f(void) +{ + return 0; +} + void board_init_f(ulong dummy) { struct udevice *dev; int ret; + board_early_init_f(); + #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT) /* * Debug UART can be used from here if required: diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c index d47dba8b91c..de9185a7cee 100644 --- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c +++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c @@ -7,6 +7,10 @@ #include #include #include +#include +#include +#include +#include #ifndef CONFIG_SPL_BUILD int board_early_init_f(void) @@ -27,3 +31,31 @@ out: return 0; } #endif + +#if defined(CONFIG_TPL_BUILD) + +#define PMUGRF_BASE 0xff320000 +#define GPIO0_BASE 0xff720000 + +int board_early_init_f(void) +{ + struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE; + struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE; + + /** + * 1. Glow yellow LED, termed as low power + * 2. Poll for on board power key press + * 3. Once 2 done, off yellow and glow red LED, termed as full power + * 4. Continue booting... + */ + spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1); + + spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5), GPIO_PULL_NORMAL); + while (readl(&gpio0->ext_port) & 0x20); + + spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0); + spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1); + + return 0; +} +#endif diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 577ba77b3ed..9ae9b35aaec 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -57,3 +57,4 @@ CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y +CONFIG_TPL_GPIO_SUPPORT=y From 3354e2c80ce2d49059c1f9017acac796084563b2 Mon Sep 17 00:00:00 2001 From: Jared Baldridge Date: Thu, 6 Feb 2020 19:53:14 -0800 Subject: [PATCH 14/16] configs: fix typos in khadas-edge defconfigs s/dtbi/dtb/ Signed-off-by: Jared Baldridge --- configs/khadas-edge-captain-rk3399_defconfig | 2 +- configs/khadas-edge-v-rk3399_defconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index defe2cf3452..8c40621be84 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -7,7 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y -CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-captain.dtbi" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-captain.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index 0735152d4b8..0102053814d 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -7,7 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y -CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtbi" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y From dfb2889cd4cf64b1dfe6f5a5218b42fd9f3c832f Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Wed, 19 Feb 2020 17:51:07 +0800 Subject: [PATCH 15/16] rockchip: rk3399: add target type for evb based board There are many boards share the board file and device header file with rk3399 evb, add target type MACRO so that it is fixed instead of default to the first target in "RK3399 board select". Signed-off-by: Kever Yang --- configs/evb-rk3399_defconfig | 1 + configs/firefly-rk3399_defconfig | 1 + configs/khadas-edge-captain-rk3399_defconfig | 1 + configs/khadas-edge-rk3399_defconfig | 1 + configs/khadas-edge-v-rk3399_defconfig | 1 + configs/leez-rk3399_defconfig | 1 + configs/nanopc-t4-rk3399_defconfig | 1 + configs/nanopi-m4-rk3399_defconfig | 1 + configs/nanopi-neo4-rk3399_defconfig | 1 + configs/orangepi-rk3399_defconfig | 1 + configs/rock-pi-4-rk3399_defconfig | 1 + 11 files changed, 11 insertions(+) diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 431daf357b1..3f74be3b3c4 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index bc15eae64bd..4c9f1e189b7 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index 8c40621be84..8668917ecc9 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index e5a652388a0..ed4429d22d5 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index 0102053814d..37706044ad7 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig index 8672f0a1d4d..b53fed83307 100644 --- a/configs/leez-rk3399_defconfig +++ b/configs/leez-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig index efcd9399d35..9ea9b11574f 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig index 60d447e9848..ad0e808bf61 100644 --- a/configs/nanopi-m4-rk3399_defconfig +++ b/configs/nanopi-m4-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig index e318288f11b..d038a8cab94 100644 --- a/configs/nanopi-neo4-rk3399_defconfig +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig index 0a83b4a7992..01fcf051019 100644 --- a/configs/orangepi-rk3399_defconfig +++ b/configs/orangepi-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index eac8dd920ae..0d86fdc895c 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 From f9561d8e3671415c7780df4b5e70f0f1e2d2bf57 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 8 Jan 2020 03:56:11 +0000 Subject: [PATCH 16/16] arch: arm: rockchip: order the rk3399 entries alphabetically Put the target entries for rk3399 devices in alphabetical order. Signed-off-by: Peter Robinson Reviewed-by: Simon Glass Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/rk3399/Kconfig | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index 0dc43c289a2..927bb62a9fe 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -3,6 +3,15 @@ if ROCKCHIP_RK3399 choice prompt "RK3399 board select" +config TARGET_CHROMEBOOK_BOB + bool "Asus Flip C101PA Chromebook (RK3399)" + help + Bob is a small RK3299-based device similar in apperance to Minnie. + It has two USB 3.0 type-C ports, 4GB of SDRAM, WiFi and a 10.1", + 1280x800 display. It uses its USB ports for both power and external + display. It includes a Chrome OS EC (Cortex-M3) to provide access to + the keyboard and battery functions. + config TARGET_EVB_RK3399 bool "RK3399 evaluation board" help @@ -53,15 +62,6 @@ config TARGET_ROCK960_RK3399 * 2x USB 3.0 type A, 2x USB 2.0 type A (host mode only), 1x USB 3.0 type C OTG -config TARGET_CHROMEBOOK_BOB - bool "Asus Flip C101PA Chromebook (RK3399)" - help - Bob is a small RK3299-based device similar in apperance to Minnie. - It has two USB 3.0 type-C ports, 4GB of SDRAM, WiFi and a 10.1", - 1280x800 display. It uses its USB ports for both power and external - display. It includes a Chrome OS EC (Cortex-M3) to provide access to - the keyboard and battery functions. - config TARGET_ROCKPRO64_RK3399 bool "Pine64 Rockpro64 board" help @@ -142,11 +142,11 @@ config SYS_BOOTCOUNT_ADDR endif # BOOTCOUNT_LIMIT +source "board/firefly/roc-pc-rk3399/Kconfig" +source "board/google/gru/Kconfig" +source "board/pine64/rockpro64_rk3399/Kconfig" source "board/rockchip/evb_rk3399/Kconfig" source "board/theobroma-systems/puma_rk3399/Kconfig" source "board/vamrs/rock960_rk3399/Kconfig" -source "board/google/gru/Kconfig" -source "board/pine64/rockpro64_rk3399/Kconfig" -source "board/firefly/roc-pc-rk3399/Kconfig" endif