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Merge tag 'u-boot-atmel-2020.01-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel features and fixes for 2020.01 cycle The feature set includes support for two new boards from Microchip AT91: The sama5d27_wlsom1_ek , an evaluation kit which includes the SAMA5D2 SOC packaged in a 256 MB LPDDR2 SIP, on a SOM including wireless, which is placed on evaluation kit with sd-card, ethernet, LCD, Camera sensor, QSPI, etc The sam9x60ek, an evaluation kit for the new SoC based on ARM926j , the SAM9X60 . The evaluation kit includes NAND flash, QSPI, Ethernet, Audio, Camera sensor connector, etc. The full support for sam9x60ek will come at a later time. There are still missing bits regarding the clock support and power management controller.
This commit is contained in:
Tom Rini
95
include/configs/sam9x60ek.h
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95
include/configs/sam9x60ek.h
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuation settings for the SAM9X60EK board.
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*
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* Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
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*
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* Author: Sandeep Sheriker M <sandeep.sheriker@microchip.com>
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*/
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#ifndef __CONFIG_H__
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#define __CONFIG_H__
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID 0 /* ignored in arm */
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/* general purpose I/O */
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#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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/*
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* define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
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* NB: in this case, USB 1.1 devices won't be recognized.
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*/
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/* SDRAM */
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#define CONFIG_SYS_SDRAM_BASE 0x20000000
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#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_MASK_ALE BIT(21)
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#define CONFIG_SYS_NAND_MASK_CLE BIT(22)
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_MTD_DEVICE
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#endif
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/* PMECC & PMERRLOC */
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#define CONFIG_ATMEL_NAND_HWECC
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#define CONFIG_ATMEL_NAND_HW_PMECC
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#define CONFIG_PMECC_CAP 8
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#define CONFIG_PMECC_SECTOR_SIZE 512
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#ifdef CONFIG_SD_BOOT
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/* bootstrap + u-boot + env + linux in sd card */
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#define CONFIG_BOOTCOMMAND \
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"fatload mmc 0:1 0x21000000 at91-sam9x60ek.dtb;" \
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"fatload mmc 0:1 0x22000000 zImage;" \
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"bootz 0x22000000 - 0x21000000"
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#elif defined(CONFIG_NAND_BOOT)
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/* bootstrap + u-boot + env + linux in nandflash */
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#define CONFIG_ENV_OFFSET_REDUND 0x100000
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#define CONFIG_BOOTCOMMAND "nand read " \
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"0x22000000 0x200000 0x600000; " \
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"nand read 0x21000000 0x180000 0x20000; " \
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"bootz 0x22000000 - 0x21000000"
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#elif defined(CONFIG_QSPI_BOOT)
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/* bootstrap + u-boot + env + linux in SPI NOR flash */
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#define CONFIG_BOOTCOMMAND "sf probe 0; " \
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"sf read 0x21000000 0x180000 0x80000; " \
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"sf read 0x22000000 0x200000 0x600000; " \
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"bootz 0x22000000 - 0x21000000"
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#endif
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
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#endif
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46
include/configs/sama5d27_wlsom1_ek.h
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46
include/configs/sama5d27_wlsom1_ek.h
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuration file for the SAMA5D27 WLSOM1 EK Board.
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*
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* Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
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*
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* Author: Nicolas Ferre <nicolas.ferre@microcihp.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include "at91-sama5_common.h"
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#undef CONFIG_SYS_AT91_MAIN_CLOCK
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#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */
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/* SDRAM */
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#define CONFIG_SYS_SDRAM_BASE 0x20000000
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#define CONFIG_SYS_SDRAM_SIZE 0x10000000
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_INIT_SP_ADDR 0x218000
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#else
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
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#endif
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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/* SPL */
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#define CONFIG_SPL_TEXT_BASE 0x200000
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#define CONFIG_SPL_MAX_SIZE 0x10000
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#define CONFIG_SPL_BSS_START_ADDR 0x20000000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
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#define CONFIG_SYS_MONITOR_LEN (512 << 10)
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#ifdef CONFIG_SD_BOOT
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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#endif
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#endif
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