Mirrors/u-boot
1
0
Fork 0
mirror of https://source.denx.de/u-boot/u-boot.git synced 2026-06-13 15:03:58 +03:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

Browse Source
This commit is contained in:
Albert ARIBAUD
2013-08-17 18:24:13 +02:00
parent 425faf74cd 326ea986ac
commit 9ed887caec
28 changed files with 603 additions and 1968 deletions
Download Patch File Download Diff File Expand all files Collapse all files

120
include/configs/apx4devkit.h
View File

@@ -11,34 +11,16 @@
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#ifndef __CONFIGS_APX4DEVKIT_H__
#define __CONFIGS_APX4DEVKIT_H__
/* SoC configurations */
/* System configurations */
#define CONFIG_MX28 /* i.MX28 SoC */
#define CONFIG_MXS_GPIO /* GPIO control */
#define CONFIG_SYS_HZ 1000 /* Ticks per second */
#define MACH_TYPE_APX4DEVKIT 3712
#define CONFIG_MACH_TYPE MACH_TYPE_APX4DEVKIT
#include <asm/arch/regs-base.h>
#define CONFIG_SYS_NO_FLASH
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_ARCH_MISC_INIT
/* SPL */
#define CONFIG_SPL
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
/* U-Boot Commands */
#define CONFIG_SYS_NO_FLASH
#include <config_cmd_default.h>
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DOS_PARTITION
@@ -58,78 +40,26 @@
#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_USB
/* Memory configurations */
/* Memory configuration */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
#define PHYS_SDRAM_1 0x40000000 /* Base address */
#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */
#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* Point initial SP in SRAM so SPL can use it too. */
#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/*
* We need to sacrifice first 4 bytes of RAM here to avoid triggering some
* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
* binary. In case there was more of this mess, 0x100 bytes are skipped.
*/
#define CONFIG_SYS_TEXT_BASE 0x40000100
/* Environment */
#define CONFIG_ENV_OVERWRITE
/* U-Boot general configurations */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
/* Print buffer size */
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
#define CONFIG_VERSION_VARIABLE /* U-Boot version */
#define CONFIG_AUTO_COMPLETE /* Command auto complete */
#define CONFIG_CMDLINE_EDITING /* Command history etc. */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_OF_LIBFDT
#define CONFIG_ENV_IS_IN_NAND
/* Serial Driver */
#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK 24000000
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/* DMA */
#define CONFIG_APBH_DMA
/* MMC Driver */
#ifdef CONFIG_ENV_IS_IN_MMC
/* Environment is in MMC */
#if defined(CONFIG_CMD_MMC) && defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_ENV_OFFSET (256 * 1024)
#define CONFIG_ENV_SIZE (16 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_MXS_MMC
#endif
/* NAND Driver */
#ifdef CONFIG_ENV_IS_IN_NAND
/* Environment is in NAND */
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_ENV_IS_IN_NAND)
#define CONFIG_ENV_SECT_SIZE (128 * 1024)
#define CONFIG_ENV_SIZE (128 * 1024)
#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
@@ -139,12 +69,8 @@
(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
#endif
/* UBI and NAND partitioning */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x60000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_MTDPARTS
@@ -159,43 +85,30 @@
#define MTDPARTS_DEFAULT ""
#endif
/* Ethernet on SOC (FEC) */
/* FEC Ethernet on SoC */
#ifdef CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_NET_MULTI
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC
#define CONFIG_FEC_MXC_PHYADDR 0
#define IMX_FEC_BASE MXS_ENET0_BASE
#define CONFIG_MII
#define CONFIG_FEC_XCV_TYPE RMII
#endif
/* USB */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MXS
#define CONFIG_EHCI_MXS_PORT1
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_STORAGE
#endif
/* I2C */
#ifdef CONFIG_CMD_I2C
#define CONFIG_I2C_MXS
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED 400000
#endif
/* RTC */
#if defined(CONFIG_CMD_DATE)
#ifdef CONFIG_CMD_DATE
#define CONFIG_RTC_PCF8563
#define CONFIG_SYS_I2C_RTC_ADDR 0x51
#endif
/* Boot Linux */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTDELAY 1
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_BOOTCOMMAND "run bootcmd_nand"
@@ -225,4 +138,7 @@
"ext2load mmc 0:2 41000000 boot/uImage && bootm 41000000\0" \
""
#endif /* __CONFIG_H */
/* The rest of the configuration is shared */
#include <configs/mxs.h>
#endif /* __CONFIGS_APX4DEVKIT_H__ */

192
include/configs/m28evk.h
View File

@@ -4,43 +4,17 @@
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __M28EVK_CONFIG_H__
#define __M28EVK_CONFIG_H__
#ifndef __CONFIGS_M28EVK_H__
#define __CONFIGS_M28EVK_H__
/*
* SoC configurations
*/
/* System configurations */
#define CONFIG_MX28 /* i.MX28 SoC */
#define CONFIG_MXS_GPIO /* GPIO control */
#define CONFIG_SYS_HZ 1000 /* Ticks per second */
/*
* Define M28EVK machine type by hand until it lands in mach-types
*/
#define MACH_TYPE_M28EVK 3613
#define CONFIG_MACH_TYPE MACH_TYPE_M28EVK
#include <asm/arch/regs-base.h>
/* U-Boot Commands */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_MISC_INIT
/*
* SPL
*/
#define CONFIG_SPL
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
/*
* U-Boot Commands
*/
#include <config_cmd_default.h>
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DOS_PARTITION
@@ -69,86 +43,18 @@
#define CONFIG_REGEX /* Enable regular expression support */
/*
* Memory configurations
*/
/* Memory configuration */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
#define PHYS_SDRAM_1 0x40000000 /* Base address */
#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */
#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* Point initial SP in SRAM so SPL can use it too. */
#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/*
* We need to sacrifice first 4 bytes of RAM here to avoid triggering some
* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
* binary. In case there was more of this mess, 0x100 bytes are skipped.
*/
#define CONFIG_SYS_TEXT_BASE 0x40000100
/*
* U-Boot general configurations
*/
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
/* Print buffer size */
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
#define CONFIG_AUTO_COMPLETE /* Command auto complete */
#define CONFIG_CMDLINE_EDITING /* Command history etc */
#define CONFIG_SYS_HUSH_PARSER
/*
* Serial Driver
*/
#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK 24000000
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
/*
* MMC Driver
*/
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_GENERIC_MMC
#define CONFIG_MXS_MMC
#endif
/*
* APBH DMA
*/
#define CONFIG_APBH_DMA
/*
* NAND
*/
/* Environment */
#define CONFIG_ENV_SIZE (16 * 1024)
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x60000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_ENV_IS_IN_NAND
/* Environment is in NAND */
#define CONFIG_ENV_IS_IN_NAND
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_ENV_IS_IN_NAND)
#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
#define CONFIG_ENV_SECT_SIZE (128 * 1024)
#define CONFIG_ENV_RANGE (512 * 1024)
@@ -177,40 +83,22 @@
#define CONFIG_ENV_IS_NOWHERE
#endif
/*
* Ethernet on SOC (FEC)
*/
#ifdef CONFIG_CMD_NET
#define CONFIG_ETHPRIME "FEC0"
/* FEC Ethernet on SoC */
#ifdef CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define CONFIG_FEC_XCV_TYPE RMII
#endif
/*
* I2C
*/
#ifdef CONFIG_CMD_I2C
#define CONFIG_I2C_MXS
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED 400000
#endif
/*
* EEPROM
*/
#ifdef CONFIG_CMD_EEPROM
/* EEPROM */
#ifdef CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#endif
/*
* RTC
*/
#ifdef CONFIG_CMD_DATE
/* RTC */
#ifdef CONFIG_CMD_DATE
/* Use the internal RTC in the MXS chip */
#define CONFIG_RTC_INTERNAL
#ifdef CONFIG_RTC_INTERNAL
#ifdef CONFIG_RTC_INTERNAL
#define CONFIG_RTC_MXS
#else
#define CONFIG_RTC_M41T62
@@ -219,32 +107,22 @@
#endif
#endif
/*
* USB
*/
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MXS
/* USB */
#ifdef CONFIG_CMD_USB
#define CONFIG_EHCI_MXS_PORT0
#define CONFIG_EHCI_MXS_PORT1
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_STORAGE
#endif
/*
* SPI
*/
#ifdef CONFIG_CMD_SPI
#define CONFIG_HARD_SPI
#define CONFIG_MXS_SPI
#define CONFIG_SPI_HALF_DUPLEX
/* SPI */
#ifdef CONFIG_CMD_SPI
#define CONFIG_DEFAULT_SPI_BUS 2
#define CONFIG_DEFAULT_SPI_CS 0
#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
/* SPI FLASH */
#ifdef CONFIG_CMD_SF
#ifdef CONFIG_CMD_SF
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SF_DEFAULT_BUS 2
@@ -257,18 +135,12 @@
#define CONFIG_ENV_SPI_MAX_HZ 40000000
#define CONFIG_ENV_SPI_MODE SPI_MODE_0
#endif
#endif
/*
* LCD
*/
#ifdef CONFIG_VIDEO
#define CONFIG_CFB_CONSOLE
#define CONFIG_VIDEO_MXS
/* LCD */
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_SW_CURSOR
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SPLASH_SCREEN
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
@@ -277,22 +149,15 @@
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10)
#endif
/*
* Boot Linux
*/
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
/* Booting Linux */
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
#define CONFIG_BOOTCOMMAND "run bootcmd_net"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_OF_LIBFDT
/*
* Extra Environments
*/
/* Extra Environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
"update_nand_full_filename=u-boot.nand\0" \
"update_nand_firmware_filename=u-boot.sb\0" \
@@ -333,4 +198,7 @@
"fi ; " \
"fi\0"
#endif /* __M28EVK_CONFIG_H__ */
/* The rest of the configuration is shared */
#include <configs/mxs.h>
#endif /* __CONFIGS_M28EVK_H__ */

142
include/configs/mx23_olinuxino.h
View File

@@ -3,40 +3,15 @@
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __MX23_OLINUXINO_CONFIG_H__
#define __MX23_OLINUXINO_CONFIG_H__
#ifndef __CONFIGS_MX23_OLINUXINO_H__
#define __CONFIGS_MX23_OLINUXINO_H__
#include <asm/arch/iomux-mx23.h>
/*
* SoC configurations
*/
/* System configurations */
#define CONFIG_MX23 /* i.MX23 SoC */
#define CONFIG_MXS_GPIO /* GPIO control */
#define CONFIG_SYS_HZ 1000 /* Ticks per second */
#define CONFIG_MACH_TYPE 4105
#include <asm/arch/regs-base.h>
/* U-Boot Commands */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_MISC_INIT
/*
* SPL
*/
#define CONFIG_SPL
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
/*
* U-Boot Commands
*/
#include <config_cmd_default.h>
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DOS_PARTITION
@@ -51,92 +26,36 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_USB
/*
* Memory configurations
*/
/* Memory configuration */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
#define PHYS_SDRAM_1 0x40000000 /* Base address */
#define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */
#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* Point initial SP in SRAM so SPL can use it too. */
#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
/* Environment */
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/*
* We need to sacrifice first 4 bytes of RAM here to avoid triggering some
* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
* binary. In case there was more of this mess, 0x100 bytes are skipped.
*/
#define CONFIG_SYS_TEXT_BASE 0x40000100
/* Environment is in MMC */
#if defined(CONFIG_CMD_MMC) && defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_ENV_OFFSET (256 * 1024)
#define CONFIG_ENV_SIZE (16 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif
/*
* U-Boot general configurations
*/
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
/* Print buffer size */
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
#define CONFIG_AUTO_COMPLETE /* Command auto complete */
#define CONFIG_CMDLINE_EDITING /* Command history etc */
#define CONFIG_SYS_HUSH_PARSER
/*
* Serial Driver
*/
#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK 24000000
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
/*
* Status LED
*/
/* Status LED */
#define CONFIG_STATUS_LED
#define CONFIG_GPIO_LED
#define CONFIG_BOARD_SPECIFIC_LED
#define STATUS_LED_BOOT 0
#define STATUS_LED_BIT MX23_PAD_SSP1_DETECT__GPIO_2_1
#define STATUS_LED_BOOT 0
#define STATUS_LED_BIT MX23_PAD_SSP1_DETECT__GPIO_2_1
#define STATUS_LED_STATE STATUS_LED_ON
#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
/*
* MMC Driver
*/
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_GENERIC_MMC
#define CONFIG_MXS_MMC
#endif
/*
* APBH DMA
*/
#define CONFIG_APBH_DMA
/* USB */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MXS
#define CONFIG_EHCI_MXS_PORT0
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_STORAGE
#endif
@@ -146,31 +65,13 @@
#define CONFIG_USB_ETHER_SMSC95XX
#endif
/*
* Boot Linux
*/
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
/* Booting Linux */
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_OF_LIBFDT
/*
* Environment
*/
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OVERWRITE
#ifdef CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (256 * 1024)
#define CONFIG_ENV_SIZE (16 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif
/*
* Extra Environments
*/
/* Extra Environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
"update_sd_firmware_filename=u-boot.sd\0" \
"update_sd_firmware=" /* Update the SD firmware partition */ \
@@ -252,4 +153,7 @@
"fi; " \
"else run netboot; fi"
#endif /* __MX23_OLINUXINO_CONFIG_H__ */
/* The rest of the configuration is shared */
#include <configs/mxs.h>
#endif /* __CONFIGS_MX23_OLINUXINO_H__ */

115
include/configs/mx23evk.h
View File

@@ -6,33 +6,15 @@
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __MX23EVK_CONFIG_H__
#define __MX23EVK_CONFIG_H__
#ifndef __CONFIGS_MX23EVK_H__
#define __CONFIGS_MX23EVK_H__
/* SoC configurations */
/* System configurations */
#define CONFIG_MX23 /* i.MX23 SoC */
#include <asm/arch/regs-base.h>
#define CONFIG_MXS_GPIO /* GPIO control */
#define CONFIG_SYS_HZ 1000 /* Ticks per second */
#define CONFIG_MACH_TYPE MACH_TYPE_MX23EVK
#define CONFIG_SYS_NO_FLASH
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_MISC_INIT
/* SPL */
#define CONFIG_SPL
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
/* U-Boot Commands */
#define CONFIG_SYS_NO_FLASH
#include <config_cmd_default.h>
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
@@ -49,86 +31,33 @@
#define CONFIG_CMD_BOOTZ
#define CONFIG_VIDEO
/* Memory configurations */
/* Memory configuration */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
#define PHYS_SDRAM_1 0x40000000 /* Base address */
#define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */
#define CONFIG_STACKSIZE (128 * 1024) /* 128 KB stack */
#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* Point initial SP in SRAM so SPL can use it too. */
#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/*
* We need to sacrifice first 4 bytes of RAM here to avoid triggering some
* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
* binary. In case there was more of this mess, 0x100 bytes are skipped.
*/
#define CONFIG_SYS_TEXT_BASE 0x40000100
/* Environment */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_IS_IN_MMC
/* U-Boot general configurations */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 256 /* Console I/O buffer size */
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
/* Print buffer size */
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
#define CONFIG_AUTO_COMPLETE /* Command auto complete */
#define CONFIG_CMDLINE_EDITING /* Command history etc */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
/* Serial Driver */
#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK 24000000
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
/* DMA */
#define CONFIG_APBH_DMA
/* MMC Driver */
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_MXS_MMC
/* Environment is in MMC */
#if defined(CONFIG_CMD_MMC) && defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_ENV_OFFSET (256 * 1024)
#define CONFIG_ENV_SIZE (16 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif
/* USB */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MXS
#define CONFIG_EHCI_MXS_PORT0
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_STORAGE
#endif
/* Framebuffer support */
#ifdef CONFIG_VIDEO
#define CONFIG_CFB_CONSOLE
#define CONFIG_VIDEO_MXS
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_SW_CURSOR
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SPLASH_SCREEN
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
@@ -138,21 +67,10 @@
#endif
/* Boot Linux */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTDELAY 1
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_OF_LIBFDT
/* Environment */
#define CONFIG_ENV_IS_IN_MMC
#ifdef CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (256 * 1024)
#define CONFIG_ENV_SIZE (16 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif
/* Extra Environments */
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -211,4 +129,7 @@
"fi; " \
"else exit; fi"
#endif /* __MX23EVK_CONFIG_H__ */
/* The rest of the configuration is shared */
#include <configs/mxs.h>
#endif /* __CONFIGS_MX23EVK_H__ */

177
include/configs/mx28evk.h
View File

@@ -8,33 +8,16 @@
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __MX28EVK_CONFIG_H__
#define __MX28EVK_CONFIG_H__
#ifndef __CONFIGS_MX28EVK_H__
#define __CONFIGS_MX28EVK_H__
/* SoC configurations */
/* System configurations */
#define CONFIG_MX28 /* i.MX28 SoC */
#define CONFIG_MXS_GPIO /* GPIO control */
#define CONFIG_SYS_HZ 1000 /* Ticks per second */
#define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK
#include <asm/arch/regs-base.h>
#define CONFIG_SYS_NO_FLASH
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_MISC_INIT
/* SPL */
#define CONFIG_SPL
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SYS_PROMPT "MX28EVK U-Boot > "
/* U-Boot Commands */
#define CONFIG_SYS_NO_FLASH
#include <config_cmd_default.h>
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DOS_PARTITION
@@ -49,6 +32,7 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
@@ -58,81 +42,24 @@
#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_VIDEO
/* Memory configurations */
/* Memory configuration */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
#define PHYS_SDRAM_1 0x40000000 /* Base address */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* Point initial SP in SRAM so SPL can use it too. */
#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/*
* We need to sacrifice first 4 bytes of RAM here to avoid triggering some
* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
* binary. In case there was more of this mess, 0x100 bytes are skipped.
*/
#define CONFIG_SYS_TEXT_BASE 0x40000100
#define CONFIG_ENV_OVERWRITE
/* U-Boot general configurations */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT "MX28EVK U-Boot > "
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
/* Print buffer size */
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
#define CONFIG_AUTO_COMPLETE /* Command auto complete */
#define CONFIG_CMDLINE_EDITING /* Command history etc */
#define CONFIG_SYS_HUSH_PARSER
/* Serial Driver */
#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK 24000000
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
/* DMA */
#define CONFIG_APBH_DMA
/* MMC Driver */
#ifdef CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (256 * 1024)
#define CONFIG_ENV_SIZE (16 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif
#define CONFIG_CMD_SAVEENV
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_MXS_MMC
#endif
/* NAND Driver */
/* Environment */
#define CONFIG_ENV_SIZE (16 * 1024)
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x60000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_ENV_OVERWRITE
/* Environment is in MMC */
#if defined(CONFIG_CMD_MMC) && defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_ENV_OFFSET (256 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif
/* Environment is in NAND */
#ifdef CONFIG_ENV_IS_IN_NAND
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_ENV_IS_IN_NAND)
#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
#define CONFIG_ENV_SECT_SIZE (128 * 1024)
#define CONFIG_ENV_RANGE (512 * 1024)
@@ -141,6 +68,21 @@
(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
#endif
/* Environemnt is in SPI flash */
#if defined(CONFIG_CMD_SF) && defined(CONFIG_ENV_IS_IN_SPI_FLASH)
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SIZE 0x1000 /* 4KB */
#define CONFIG_ENV_OFFSET 0x40000 /* 256K */
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_SPI_CS 0
#define CONFIG_ENV_SPI_BUS 2
#define CONFIG_ENV_SPI_MAX_HZ 24000000
#define CONFIG_ENV_SPI_MODE SPI_MODE_0
#endif
/* UBI and NAND partitioning */
#ifdef CONFIG_CMD_NAND
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_MTDPARTS
@@ -160,13 +102,10 @@
"-(filesystem)"
#endif
/* Ethernet on SOC (FEC) */
/* FEC Ethernet on SoC */
#ifdef CONFIG_CMD_NET
#define CONFIG_NET_MULTI
#define CONFIG_ETHPRIME "FEC0"
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_NET_MULTI
#define CONFIG_MX28_FEC_MAC_IN_OCOTP
#endif
@@ -177,65 +116,35 @@
/* USB */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MXS
#define CONFIG_EHCI_MXS_PORT1
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_STORAGE
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX
#endif
/* I2C */
#ifdef CONFIG_CMD_I2C
#define CONFIG_I2C_MXS
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED 400000
#endif
/* SPI */
#ifdef CONFIG_CMD_SPI
#define CONFIG_HARD_SPI
#define CONFIG_MXS_SPI
#define CONFIG_SPI_HALF_DUPLEX
#define CONFIG_DEFAULT_SPI_BUS 2
#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
/* SPI Flash */
#ifdef CONFIG_CMD_SF
#define CONFIG_SPI_FLASH
#define CONFIG_SF_DEFAULT_BUS 2
#define CONFIG_SF_DEFAULT_CS 0
#define CONFIG_SF_DEFAULT_BUS 2
#define CONFIG_SF_DEFAULT_CS 0
/* this may vary and depends on the installed chip */
#define CONFIG_SPI_FLASH_SST
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_SF_DEFAULT_SPEED 24000000
#endif
/* (redundant) environemnt in SPI flash */
#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SIZE 0x1000 /* 4KB */
#define CONFIG_ENV_OFFSET 0x40000 /* 256K */
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_SPI_CS 0
#define CONFIG_ENV_SPI_BUS 2
#define CONFIG_ENV_SPI_MAX_HZ 24000000
#define CONFIG_ENV_SPI_MODE SPI_MODE_0
#endif
#endif
#endif
/* Framebuffer support */
#ifdef CONFIG_VIDEO
#define CONFIG_CFB_CONSOLE
#define CONFIG_VIDEO_MXS
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_SW_CURSOR
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SPLASH_SCREEN
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
@@ -245,15 +154,12 @@
#endif
/* Boot Linux */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTDELAY 1
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_OF_LIBFDT
/* Extra Environments */
/* Extra Environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
"update_nand_full_filename=u-boot.nand\0" \
"update_nand_firmware_filename=u-boot.sb\0" \
@@ -364,4 +270,7 @@
"fi; " \
"else run netboot; fi"
#endif /* __MX28EVK_CONFIG_H__ */
/* The rest of the configuration is shared */
#include <configs/mxs.h>
#endif /* __CONFIGS_MX28EVK_H__ */

284
include/configs/mx6qsabrelite.h
View File

@@ -1,284 +0,0 @@
/*
* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6Q Sabre Lite board.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_MX6
#define CONFIG_MX6Q
#include "mx6_common.h"
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_MACH_TYPE 3769
#include <asm/arch/imx-regs.h>
#include <asm/imx-common/gpio.h>
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_MXC_GPIO
#define CONFIG_CMD_FUSE
#ifdef CONFIG_CMD_FUSE
#define CONFIG_MXC_OCOTP
#endif
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART2_BASE
#define CONFIG_CMD_SF
#ifdef CONFIG_CMD_SF
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_SST
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS 0
#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))
#define CONFIG_SF_DEFAULT_SPEED 25000000
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
#endif
/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_SATA
/*
* SATA Configs
*/
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA
#define CONFIG_SYS_SATA_MAX_DEVICE 1
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#define CONFIG_LIBATA
#endif
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 6
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021
/* USB Configs */
#define CONFIG_CMD_USB
#define CONFIG_CMD_FAT
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_MXC_USB_PORT 1
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
/* Miscellaneous commands */
#define CONFIG_CMD_BMODE
/* Framebuffer and LCD */
#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK 260000000
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
/* Command definition */
#include <config_cmd_default.h>
#undef CONFIG_CMD_IMLS
#define CONFIG_BOOTDELAY 1
#define CONFIG_PREBOOT ""
#define CONFIG_LOADADDR 0x12000000
#define CONFIG_SYS_TEXT_BASE 0x17800000
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"uimage=uImage\0" \
"console=ttymxc1\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"fdt_file=imx6q-sabrelite.dtb\0" \
"fdt_addr=0x11000000\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=0\0" \
"mmcpart=1\0" \
"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=${mmcroot}\0" \
"loadbootscript=" \
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if run loadfdt; then " \
"bootm ${loadaddr} - ${fdt_addr}; " \
"else " \
"if test ${boot_fdt} = try; then " \
"bootm; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"fi; " \
"else " \
"bootm; " \
"fi;\0" \
"netargs=setenv bootargs console=${console},${baudrate} " \
"root=/dev/nfs " \
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
"netboot=echo Booting from net ...; " \
"run netargs; " \
"if test ${ip_dyn} = yes; then " \
"setenv get_cmd dhcp; " \
"else " \
"setenv get_cmd tftp; " \
"fi; " \
"${get_cmd} ${uimage}; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
"bootm ${loadaddr} - ${fdt_addr}; " \
"else " \
"if test ${boot_fdt} = try; then " \
"bootm; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"fi; " \
"else " \
"bootm; " \
"fi;\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
"if run loaduimage; then " \
"run mmcboot; " \
"else run netboot; " \
"fi; " \
"fi; " \
"else run netboot; fi"
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "MX6QSABRELITE U-Boot > "
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 256
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_MEMTEST_START 0x10000000
#define CONFIG_SYS_MEMTEST_END 0x10010000
#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_SIZE (8 * 1024)
#define CONFIG_ENV_IS_IN_MMC
/* #define CONFIG_ENV_IS_IN_SPI_FLASH */
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
#define CONFIG_ENV_OFFSET (768 * 1024)
#define CONFIG_ENV_SECT_SIZE (8 * 1024)
#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
#endif
#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#ifndef CONFIG_SYS_DCACHE_OFF
#define CONFIG_CMD_CACHE
#endif
#endif /* __CONFIG_H */

3
include/configs/mx6sabre_common.h
View File

@@ -12,6 +12,7 @@
#define CONFIG_MX6
#include "mx6_common.h"
#include <asm/sizes.h>
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
@@ -24,7 +25,7 @@
#define CONFIG_REVISION_TAG
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_LATE_INIT

19
include/configs/mx6sabresd.h
View File

@@ -9,6 +9,9 @@
#ifndef __MX6QSABRESD_CONFIG_H
#define __MX6QSABRESD_CONFIG_H
#include <asm/arch/imx-regs.h>
#include <asm/imx-common/gpio.h>
#define CONFIG_MACH_TYPE 3980
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONSOLE_DEV "ttymxc0"
@@ -23,4 +26,20 @@
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
#endif
/* Framebuffer */
#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_IMX_HDMI
#endif /* __MX6QSABRESD_CONFIG_H */

191
include/configs/mxs.h Normal file
View File

@@ -0,0 +1,191 @@
/*
* Copyright (C) 2013 Marek Vasut <marex@denx.de>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIGS_MXS_H__
#define __CONFIGS_MXS_H__
/*
* Includes
*/
#if defined(CONFIG_MX23) && defined(CONFIG_MX28)
#error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
#elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
#error Select one of CONFIG_MX23 or CONFIG_MX28 !
#endif
#include <asm/arch/regs-base.h>
#if defined(CONFIG_MX23)
#include <asm/arch/iomux-mx23.h>
#elif defined(CONFIG_MX28)
#include <asm/arch/iomux-mx28.h>
#endif
/*
* CPU specifics
*/
/* Ticks per second */
#define CONFIG_SYS_HZ 1000
/* MXS uses FDT */
#define CONFIG_OF_LIBFDT
/* Startup hooks */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_MISC_INIT
/* SPL */
#define CONFIG_SPL
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
/* Memory sizes */
#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
/* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
#if defined(CONFIG_MX23)
#define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024)
#elif defined(CONFIG_MX28)
#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
#endif
/* Point initial SP in SRAM so SPL can use it too. */
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/*
* We need to sacrifice first 4 bytes of RAM here to avoid triggering some
* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
* binary. In case there was more of this mess, 0x100 bytes are skipped.
*/
#define CONFIG_SYS_TEXT_BASE 0x40000100
/* U-Boot general configuration */
#define CONFIG_SYS_LONGHELP
#ifndef CONFIG_SYS_PROMPT
#define CONFIG_SYS_PROMPT "=> "
#endif
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
/* Print buffer size */
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
#define CONFIG_AUTO_COMPLETE /* Command auto complete */
#define CONFIG_CMDLINE_EDITING /* Command history etc */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
/* Booting Linux */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
/*
* Drivers
*/
/* APBH DMA */
#define CONFIG_APBH_DMA
/* GPIO */
#define CONFIG_MXS_GPIO
/* DUART Serial Driver */
#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK 24000000
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
#define CONFIG_CONS_INDEX 0
/* Default baudrate can be overriden by board! */
#ifndef CONFIG_BAUDRATE
#define CONFIG_BAUDRATE 115200
#endif
/* FEC Ethernet on SoC */
#ifdef CONFIG_FEC_MXC
#define CONFIG_MII
#ifndef CONFIG_ETHPRIME
#define CONFIG_ETHPRIME "FEC0"
#endif
#ifndef CONFIG_FEC_XCV_TYPE
#define CONFIG_FEC_XCV_TYPE RMII
#endif
#endif
/* I2C */
#ifdef CONFIG_CMD_I2C
#define CONFIG_I2C_MXS
#define CONFIG_HARD_I2C
#ifndef CONFIG_SYS_I2C_SPEED
#define CONFIG_SYS_I2C_SPEED 400000
#endif
#endif
/* LCD */
#ifdef CONFIG_VIDEO
#define CONFIG_CFB_CONSOLE
#define CONFIG_VIDEO_MXS
#define CONFIG_VIDEO_SW_CURSOR
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#endif
/* MMC */
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_MXS_MMC
#endif
/* NAND */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x60000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#endif
/* SPI */
#ifdef CONFIG_CMD_SPI
#define CONFIG_HARD_SPI
#define CONFIG_MXS_SPI
#define CONFIG_SPI_HALF_DUPLEX
#endif
/* USB */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MXS
#define CONFIG_EHCI_IS_TDI
#endif
#endif /* __CONFIGS_MXS_H__ */

81
include/configs/nitrogen6x.h
View File

@@ -141,6 +141,7 @@
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_CMD_HDMIDETECT
#define CONFIG_CONSOLE_MUX
#define CONFIG_IMX_HDMI
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
@@ -173,6 +174,80 @@
#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC
#if defined(CONFIG_SABRELITE)
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"uimage=uImage\0" \
"console=ttymxc1\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"fdt_file=imx6q-sabrelite.dtb\0" \
"fdt_addr=0x11000000\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=0\0" \
"mmcpart=1\0" \
"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=${mmcroot}\0" \
"loadbootscript=" \
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if run loadfdt; then " \
"bootm ${loadaddr} - ${fdt_addr}; " \
"else " \
"if test ${boot_fdt} = try; then " \
"bootm; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"fi; " \
"else " \
"bootm; " \
"fi;\0" \
"netargs=setenv bootargs console=${console},${baudrate} " \
"root=/dev/nfs " \
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
"netboot=echo Booting from net ...; " \
"run netargs; " \
"if test ${ip_dyn} = yes; then " \
"setenv get_cmd dhcp; " \
"else " \
"setenv get_cmd tftp; " \
"fi; " \
"${get_cmd} ${uimage}; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
"bootm ${loadaddr} - ${fdt_addr}; " \
"else " \
"if test ${boot_fdt} = try; then " \
"bootm; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"fi; " \
"else " \
"bootm; " \
"fi;\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
"if run loaduimage; then " \
"run mmcboot; " \
"else run netboot; " \
"fi; " \
"fi; " \
"else run netboot; fi"
#else
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=ttymxc1\0" \
"clearenv=if sf probe || sf probe || sf probe 1 ; then " \
@@ -206,6 +281,7 @@
"done ; " \
"done\0" \
#endif
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_HUSH_PARSER
@@ -245,8 +321,11 @@
#define CONFIG_ENV_SIZE (8 * 1024)
/* #define CONFIG_ENV_IS_IN_MMC */
#if defined(CONFIG_SABRELITE)
#define CONFIG_ENV_IS_IN_MMC
#else
#define CONFIG_ENV_IS_IN_SPI_FLASH
#endif
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_ENV_OFFSET (6 * 64 * 1024)

139
include/configs/sc_sps_1.h
View File

@@ -6,48 +6,16 @@
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __SC_SPS_1_H__
#define __SC_SPS_1_H__
#ifndef __CONFIGS_SC_SPS_1_H__
#define __CONFIGS_SC_SPS_1_H__
/*
* SoC configurations
*/
/* System configuration */
#define CONFIG_MX28 /* i.MX28 SoC */
#define CONFIG_MXS_GPIO /* GPIO control */
#define CONFIG_SYS_HZ 1000 /* Ticks per second */
/*
* Define SC_SPS_1 machine type by hand until it lands in mach-types
*/
#define MACH_TYPE_SC_SPS_1 4172
#define CONFIG_MACH_TYPE MACH_TYPE_SC_SPS_1
#include <asm/arch/regs-base.h>
/* U-Boot Commands */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_OF_LIBFDT
/*
* SPL
*/
#define CONFIG_SPL
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
/*
* U-Boot Commands
*/
#include <config_cmd_default.h>
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DOS_PARTITION
@@ -65,119 +33,47 @@
#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_USB
/*
* Memory configurations
*/
/* Memory configuration */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
#define PHYS_SDRAM_1 0x40000000 /* Base address */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
#define CONFIG_STACKSIZE 0x00010000 /* 128 KB stack */
#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* Point initial SP in SRAM so SPL can use it too. */
#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/*
* We need to sacrifice first 4 bytes of RAM here to avoid triggering some
* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
* binary. In case there was more of this mess, 0x100 bytes are skipped.
*/
#define CONFIG_SYS_TEXT_BASE 0x40000100
/*
* U-Boot general configurations
*/
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
/* Print buffer size */
#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot argument buffer size */
#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
#define CONFIG_AUTO_COMPLETE /* Command auto complete */
#define CONFIG_CMDLINE_EDITING /* Command history etc */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
/*
* Serial Driver
*/
#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK 24000000
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/*
* MMC Driver
*/
#ifdef CONFIG_CMD_MMC
#define CONFIG_APBH_DMA
#define CONFIG_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_GENERIC_MMC
#define CONFIG_MXS_MMC
#endif
/* Environment */
#define CONFIG_ENV_SIZE (16 * 1024)
#ifdef CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_IS_IN_MMC
/* Environment is in MMC */
#if defined(CONFIG_CMD_MMC) && defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_ENV_OFFSET (256 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#else
#define CONFIG_ENV_IS_NOWHERE
#endif
/*
* Ethernet on SOC (FEC)
*/
/* FEC Ethernet on SoC */
#ifdef CONFIG_CMD_NET
#define CONFIG_ETHPRIME "FEC0"
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#endif
/*
* USB
*/
/* USB */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MXS
#define CONFIG_EHCI_MXS_PORT0
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_STORAGE
#endif
/*
* Boot Linux
*/
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
/* Booting Linux */
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_BOOTARGS "console=ttyAMA0,115200"
#define CONFIG_BOOTCOMMAND "bootm "
#define CONFIG_BOOTCOMMAND "bootm"
#define CONFIG_LOADADDR 0x42000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/*
* Extra Environments
*/
/* Extra Environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
"update_sd_firmware_filename=u-boot.sd\0" \
"update_sd_firmware=" /* Update the SD firmware partition */ \
@@ -189,4 +85,7 @@
"fi ; " \
"fi\0"
#endif /* __SC_SPS_1_H__ */
/* The rest of the configuration is shared */
#include <configs/mxs.h>
#endif /* __CONFIGS_SC_SPS_1_H__ */

2
include/configs/wandboard.h
View File

@@ -97,6 +97,7 @@
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_IMX_HDMI
#if defined(CONFIG_MX6DL)
#define CONFIG_DEFAULT_FDT_FILE "imx6dl-wandboard.dtb"
@@ -110,6 +111,7 @@
"script=boot.scr\0" \
"uimage=uImage\0" \
"console=ttymxc0\0" \
"splashpos=m,m\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \