* Patches by David Müller, 14 Nov 2003:

- board/mpl/common/common_util.c
    * implement support for BZIP2 compressed images
    * various cleanups (printf -> puts, ...)
  - board/mpl/common/flash.c
    * report correct errors to upper layers
    * check the erase fail and VPP low bits in status reg
  - board/mpl/vcma9/cmd_vcma9.c
  - board/mpl/vcma9/flash.c
    * various cleanups (printf -> puts, ...)
  - common/cmd_usb.c
    * fix typo in comment
  - cpu/arm920t/usb_ohci.c
    * support for S3C2410 is missing in #if line
  - drivers/cs8900.c
    * reinit some registers in case of error (cable missing, ...)
  - fs/fat/fat.c
    * support for USB/MMC devices is missing in #if line
  - include/configs/MIP405.h
  - include/configs/PIP405.h
    * enable BZIP2 support
    * enlarge malloc space to 1MiB because of BZIP2 support
  - include/configs/VCMA9.h
    * enable BZIP2 support
    * enlarge malloc space to 1MiB because of BZIP2 support
    * enable USB support
  - lib_arm/armlinux.c
    * change calling convention of ARM Linux kernel as
      described on http://www.arm.linux.org.uk/developer/booting.php

* Patch by Thomas Lange, 14 Nov 2003:
  Split dbau1x00 into dbau1000, dbau1100 and dbau1500 configs to
  support all these AMD boards.

* Patch by Thomas Lange, 14 Nov 2003:
  Workaround for mips au1x00 physical memory accesses (the au1x00
  uses a 36 bit bus internally and cannot access physical memory
  directly. Use the uncached SDRAM address instead of the physical
  one.)
This commit is contained in:
wdenk
2003-12-07 18:32:37 +00:00
parent ef5a9672c7
commit a2663ea4fc
22 changed files with 338 additions and 153 deletions

View File

@@ -40,6 +40,18 @@
#define PHYSADDR(a) ((a) & 0x1fffffff)
#endif
/*
* Returns the uncached address of a sdram address
*/
#ifndef __ASSEMBLY__
#ifdef CONFIG_AU1X00
/* We use a 36 bit physical address map here and
cannot access physical memory directly from core */
#define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000)
#else /* !CONFIG_AU1X00 */
#define UNCACHED_SDRAM(a) PHYSADDR(a)
#endif /* CONFIG_AU1X00 */
#endif /* __ASSEMBLY__ */
/*
* Map an address to a certain kernel segment
*/

View File

@@ -218,7 +218,7 @@
#define CFG_FLASH_BASE 0xFFF80000
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */
#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
#define CFG_MALLOC_LEN (1024 * 1024) /* Reserve 1024 kB for malloc() */
/*
* For booting Linux, the board info and command line data
@@ -393,6 +393,11 @@
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/************************************************************
* support BZIP2 compression
************************************************************/
#define CONFIG_BZIP2 1
/************************************************************
* Ident
************************************************************/

View File

@@ -204,7 +204,7 @@
#define CFG_FLASH_BASE 0xFFF80000
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */
#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
#define CFG_MALLOC_LEN (1024 * 1024) /* Reserve 1024 kB for malloc() */
/*
* For booting Linux, the board info and command line data
@@ -370,6 +370,11 @@
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/************************************************************
* support BZIP2 compression
************************************************************/
#define CONFIG_BZIP2 1
/************************************************************
* Ident
************************************************************/

View File

@@ -42,6 +42,7 @@
#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */
#define CONFIG_VCMA9 1 /* on a MPL VCMA9 Board */
#define LITTLEENDIAN 1 /* used by usb_ohci.c */
/* input clock of PLL */
#define CONFIG_SYS_CLK_FREQ 12000000/* VCMA9 has 12MHz input clock */
@@ -63,10 +64,13 @@
/*CFG_CMD_NAND |*/ \
CFG_CMD_EEPROM | \
CFG_CMD_I2C | \
/*CFG_CMD_USB |*/ \
CFG_CMD_USB | \
CFG_CMD_REGINFO | \
CFG_CMD_FAT | \
CFG_CMD_DATE | \
CFG_CMD_ELF | \
CFG_CMD_DHCP | \
CFG_CMD_PING | \
CFG_CMD_BSP)
/* this must be included after the definiton of CONFIG_COMMANDS */
@@ -96,11 +100,11 @@
/*
* Size of malloc() pool
*/
#define CONFIG_MALLOC_SIZE (CFG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
/*#define CONFIG_MALLOC_SIZE (CFG_ENV_SIZE + 128*1024)*/
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
#define CFG_MONITOR_LEN (256 * 1024)
#define CFG_MALLOC_LEN (128 * 1024)
#define CFG_MALLOC_LEN (1024 * 1024) /* BUNZIP2 needs a lot of RAM */
/*
* Hardware drivers
@@ -119,14 +123,13 @@
/************************************************************
* USB support
************************************************************/
#if 0
#define CONFIG_USB_OHCI
#define CONFIG_USB_KEYBOARD
#define CONFIG_USB_STORAGE
#define CONFIG_USB_OHCI 1
#define CONFIG_USB_KEYBOARD 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_DOS_PARTITION 1
/* Enable needed helper functions */
#define CFG_DEVICE_DEREGISTER /* needs device_deregister */
#endif
/************************************************************
* RTC
@@ -139,7 +142,11 @@
#define CONFIG_BAUDRATE 9600
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTDELAY 5
/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
#define CONFIG_BOOT_RETRY_TIME -10 /* feature is avaiable but not enabled */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 10.0.0.110
#define CONFIG_SERVERIP 10.0.0.1
@@ -176,6 +183,9 @@
/* valid baudrates */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/* support BZIP2 compression */
#define CONFIG_BZIP2 1
/************************************************************
* Ident
************************************************************/

View File

@@ -32,9 +32,20 @@
#define CONFIG_DBAU1X00 1
#define CONFIG_AU1X00 1 /* alchemy series cpu */
#ifdef CONFIG_DBAU1000
/* Also known as Merlot */
#define CONFIG_DBAU1000 1 /* board, Hardcoded for now */
#define CONFIG_AU1000 1 /* cpu, Hardcoded for now */
#define CONFIG_AU1000 1
#else
#ifdef CONFIG_DBAU1100
#define CONFIG_AU1100 1
#else
#ifdef CONFIG_DBAU1500
#define CONFIG_AU1500 1
#else
#error "No valid board set"
#endif
#endif
#endif
#define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */