MIPS: convert CONFIG_SYS_MIPS_TIMER_FREQ to Kconfig

This converts the following to Kconfig:
    CONFIG_SYS_MIPS_TIMER_REQ

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Daniel Schwierzeck
2022-07-10 17:15:14 +02:00
parent ea24b0eacf
commit a29491ade0
71 changed files with 61 additions and 68 deletions

View File

@@ -6,8 +6,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000

View File

@@ -6,8 +6,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_SYS_MIPS_TIMER_FREQ 325000000
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000

View File

@@ -6,8 +6,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_SYS_MIPS_TIMER_FREQ 375000000
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000

View File

@@ -8,9 +8,6 @@
#include <linux/sizes.h>
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 166500000
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000

View File

@@ -8,9 +8,6 @@
#include <linux/sizes.h>
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 166500000
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000

View File

@@ -8,9 +8,6 @@
#include <linux/sizes.h>
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000

View File

@@ -8,9 +8,6 @@
#include <linux/sizes.h>
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 160000000
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000

View File

@@ -8,9 +8,6 @@
#include <linux/sizes.h>
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 120000000
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000

View File

@@ -8,9 +8,6 @@
#include <linux/sizes.h>
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 128000000
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000

View File

@@ -8,9 +8,6 @@
#include <linux/sizes.h>
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 150000000
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000

View File

@@ -8,9 +8,6 @@
#include <linux/sizes.h>
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000

View File

@@ -8,9 +8,6 @@
#include <linux/sizes.h>
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000

View File

@@ -8,9 +8,6 @@
#include <linux/sizes.h>
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 160000000
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000

View File

@@ -13,7 +13,6 @@
/*
* CPU
*/
#define CONFIG_SYS_MIPS_TIMER_FREQ 30000000
/*
* PCI

View File

@@ -9,9 +9,6 @@
#ifndef __CONFIG_CI20_H__
#define __CONFIG_CI20_H__
/* Ingenic JZ4780 clock configuration. */
#define CONFIG_SYS_MIPS_TIMER_FREQ 1200000000
/* Memory configuration */
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)

View File

@@ -6,9 +6,6 @@
#ifndef __CONFIG_GARDENA_SMART_GATEWAY_H
#define __CONFIG_GARDENA_SMART_GATEWAY_H
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000

View File

@@ -15,8 +15,6 @@
/*--------------------------------------------
* CPU configuration
*/
/* CPU Timer rate */
#define CONFIG_SYS_MIPS_TIMER_FREQ 50000000
/*----------------------------------------------------------------------
* Memory Layout

View File

@@ -6,9 +6,6 @@
#ifndef __CONFIG_LINKIT_SMART_7688_H
#define __CONFIG_LINKIT_SMART_7688_H
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000

View File

@@ -18,7 +18,6 @@
/*
* CPU Configuration
*/
#define CONFIG_SYS_MIPS_TIMER_FREQ 250000000
/*
* Memory map

View File

@@ -8,8 +8,6 @@
#ifndef __CONFIG_MT7620_H
#define __CONFIG_MT7620_H
#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000

View File

@@ -8,8 +8,6 @@
#ifndef __CONFIG_MT7621_H
#define __CONFIG_MT7621_H
#define CONFIG_SYS_MIPS_TIMER_FREQ 440000000
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_VERY_BIG_RAM

View File

@@ -8,8 +8,6 @@
#ifndef __CONFIG_MT7628_H
#define __CONFIG_MT7628_H
#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_OFFSET 0x80000

View File

@@ -13,8 +13,6 @@
/*--------------------------------------------
* CPU configuration
*/
/* CPU Timer rate */
#define CONFIG_SYS_MIPS_TIMER_FREQ 100000000
/*----------------------------------------------------------------------
* Memory Layout

View File

@@ -6,8 +6,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_SYS_MIPS_TIMER_FREQ 280000000
#define CONFIG_SYS_SDRAM_BASE 0xa0000000
#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000

View File

@@ -12,11 +12,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
#if defined(CONFIG_SOC_LUTON) || defined(CONFIG_SOC_SERVAL)
#define CONFIG_SYS_MIPS_TIMER_FREQ 208333333
#else
#define CONFIG_SYS_MIPS_TIMER_FREQ 250000000
#endif
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ
#define CONFIG_SYS_SDRAM_BASE 0x80000000

View File

@@ -6,9 +6,6 @@
#ifndef __VOCORE2_CONFIG_H__
#define __VOCORE2_CONFIG_H__
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
/* RAM */
#define CONFIG_SYS_SDRAM_BASE 0x80000000