Mirrors/u-boot
1
0
Fork 0
mirror of https://source.denx.de/u-boot/u-boot.git synced 2026-06-13 15:03:58 +03:00
Code Issues Packages Projects Releases Wiki Activity

global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*

Browse Source 
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Tom Rini
2022-11-16 13:10:37 -05:00
parent aec118ebe6
commit aa6e94deab
589 changed files with 1197 additions and 1197 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/ram/aspeed/sdram_ast2500.c
View File

@@ -203,7 +203,7 @@ static void ast2500_sdrammc_calc_size(struct dram_info *info)
u32 test_pattern = 0xdeadbeef;
u32 cap_param = SDRAM_CONF_CAP_1024M;
u32 refresh_timing_param = DDR4_TRFC;
const u32 write_addr_base = CONFIG_SYS_SDRAM_BASE + write_test_offset;
const u32 write_addr_base = CFG_SYS_SDRAM_BASE + write_test_offset;
for (ram_size = SDRAM_MAX_SIZE; ram_size > SDRAM_MIN_SIZE;
ram_size >>= 1) {
@@ -231,7 +231,7 @@ static void ast2500_sdrammc_calc_size(struct dram_info *info)
((refresh_timing_param & SDRAM_AC_TRFC_MASK)
<< SDRAM_AC_TRFC_SHIFT));
info->info.base = CONFIG_SYS_SDRAM_BASE;
info->info.base = CFG_SYS_SDRAM_BASE;
info->info.size = ram_size - ast2500_sdrammc_get_vga_mem_size(info);
clrsetbits_le32(&info->regs->config,
(SDRAM_CONF_CAP_MASK << SDRAM_CONF_CAP_SHIFT),

6
drivers/ram/aspeed/sdram_ast2600.c
View File

@@ -838,7 +838,7 @@ static void ast2600_sdrammc_calc_size(struct dram_info *info)
u32 test_pattern = 0xdeadbeef;
u32 cap_param = SDRAM_CONF_CAP_2048M;
u32 refresh_timing_param = DDR4_TRFC;
const u32 write_addr_base = CONFIG_SYS_SDRAM_BASE + write_test_offset;
const u32 write_addr_base = CFG_SYS_SDRAM_BASE + write_test_offset;
for (ram_size = SDRAM_MAX_SIZE; ram_size > SDRAM_MIN_SIZE;
ram_size >>= 1) {
@@ -866,7 +866,7 @@ static void ast2600_sdrammc_calc_size(struct dram_info *info)
((refresh_timing_param & SDRAM_AC_TRFC_MASK)
<< SDRAM_AC_TRFC_SHIFT));
info->info.base = CONFIG_SYS_SDRAM_BASE;
info->info.base = CFG_SYS_SDRAM_BASE;
info->info.size = ram_size - ast2600_sdrammc_get_vga_mem_size(info);
clrsetbits_le32(&info->regs->config, SDRAM_CONF_CAP_MASK,
@@ -1015,7 +1015,7 @@ static void ast2600_sdrammc_update_size(struct dram_info *info)
break;
}
info->info.base = CONFIG_SYS_SDRAM_BASE;
info->info.base = CFG_SYS_SDRAM_BASE;
info->info.size = ram_size - ast2600_sdrammc_get_vga_mem_size(info);
if (0 == (conf & SDRAM_CONF_ECC_SETUP))