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drivers: net: vsc9953: Add LAG support
You can now configure LAG on VSC9953's ports using the command:
ethsw [port <port_no>] aggr {[help] | show | <lag_group_no>}
A port must belong to a single LAG. By default, a port
belongs to a LAG equal to the port's number.
For each frame, a hash will be calculated based on
Source/Destination MAC addresses, Source/Destination IP(v4/v6)
addresses, Source/Destination ports. This hash will be used to
select a single egress port from LAG. This also assures
that frames from the same flow will always have the
same egress port.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
committed by
Joe Hershberger
parent
bf9f2ed83b
commit
aae0e68909
@@ -12,6 +12,7 @@
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#define ETHSW_MAX_CMD_PARAMS 20
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#define ETHSW_CMD_PORT_ALL -1
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#define ETHSW_CMD_VLAN_ALL -1
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#define ETHSW_CMD_AGGR_GRP_NONE -1
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/* IDs used to track keywords in a command */
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enum ethsw_keyword_id {
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@@ -41,6 +42,7 @@ enum ethsw_keyword_id {
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ethsw_id_private,
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ethsw_id_ingress,
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ethsw_id_filtering,
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ethsw_id_aggr,
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ethsw_id_count, /* keep last */
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};
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@@ -50,6 +52,7 @@ enum ethsw_keyword_opt_id {
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ethsw_id_pvid_no,
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ethsw_id_add_del_no,
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ethsw_id_add_del_mac,
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ethsw_id_aggr_no,
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ethsw_id_count_all, /* keep last */
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};
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@@ -58,6 +61,7 @@ struct ethsw_command_def {
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int cmd_keywords_nr;
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int port;
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int vid;
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int aggr_grp;
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uchar ethaddr[6];
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int (*cmd_function)(struct ethsw_command_def *parsed_cmd);
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};
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@@ -88,6 +92,8 @@ struct ethsw_command_func {
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int (*vlan_learn_set)(struct ethsw_command_def *parsed_cmd);
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int (*port_ingr_filt_show)(struct ethsw_command_def *parsed_cmd);
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int (*port_ingr_filt_set)(struct ethsw_command_def *parsed_cmd);
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int (*port_aggr_show)(struct ethsw_command_def *parsed_cmd);
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int (*port_aggr_set)(struct ethsw_command_def *parsed_cmd);
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};
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int ethsw_define_functions(const struct ethsw_command_func *cmd_func);
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@@ -126,6 +126,7 @@
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#define VSC9953_PORT_CFG_LEARN_AUTO 0x00000100
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#define VSC9953_PORT_CFG_LEARN_CPU 0x00000200
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#define VSC9953_PORT_CFG_LEARN_DROP 0x00000400
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#define VSC9953_PORT_CFG_PORTID_MASK 0x0000003c
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/* Macros for vsc9953_qsys_sys.switch_port_mode register */
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#define VSC9953_PORT_ENA 0x00002000
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@@ -156,6 +157,19 @@
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/* Macros for vsc9953_ana_ana_tables.mach_data register */
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#define VSC9953_MACHDATA_VID_MASK 0x1fff0000
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/* Macros for vsc9953_ana_common.aggr_cfg register */
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#define VSC9953_AC_RND_ENA 0x00000080
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#define VSC9953_AC_DMAC_ENA 0x00000040
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#define VSC9953_AC_SMAC_ENA 0x00000020
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#define VSC9953_AC_IP6_LBL_ENA 0x00000010
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#define VSC9953_AC_IP6_TCPUDP_ENA 0x00000008
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#define VSC9953_AC_IP4_SIPDIP_ENA 0x00000004
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#define VSC9953_AC_IP4_TCPUDP_ENA 0x00000002
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#define VSC9953_AC_MASK 0x000000fe
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/* Macros for vsc9953_ana_pgid.port_grp_id[] registers */
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#define VSC9953_PGID_PORT_MASK 0x000003ff
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#define VSC9953_MAX_PORTS 10
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#define VSC9953_PORT_CHECK(port) \
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(((port) < 0 || (port) >= VSC9953_MAX_PORTS) ? 0 : 1)
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@@ -239,6 +253,10 @@ struct vsc9953_ana_ana {
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u32 port_mode[12];
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};
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#define PGID_DST_START 0
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#define PGID_AGGR_START 64
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#define PGID_SRC_START 80
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struct vsc9953_ana_pgid {
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u32 port_grp_id[91];
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};
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