mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2026-06-13 15:03:58 +03:00
Merge branch 'master' of /home/wd/git/u-boot/custodians
This commit is contained in:
Wolfgang Denk
@@ -32,8 +32,11 @@
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
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#ifdef CONFIG_AT91SAM9G10EK
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#define CONFIG_AT91SAM9G10 1 /* It's an Atmel AT91SAM9G10 SoC*/
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#else
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#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/
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#define CONFIG_AT91SAM9261EK 1 /* on an AT91SAM9261EK Board */
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#endif
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#define CONFIG_ARCH_CPU_INIT
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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@@ -62,7 +65,11 @@
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#define CONFIG_LCD_INFO_BELOW_LOGO 1
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#define CONFIG_SYS_WHITE_ON_BLACK 1
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#define CONFIG_ATMEL_LCD 1
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#ifdef CONFIG_AT91SAM9261EK
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#define CONFIG_ATMEL_LCD_BGR555 1
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#else
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#define CONFIG_AT91SAM9G10_LCD_BASE 0x23E00000 /* LCD is no more in SRAM */
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#endif
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
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/* LED */
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@@ -147,7 +154,11 @@
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#define CONFIG_DOS_PARTITION 1
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#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
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#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
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#ifdef CONFIG_AT91SAM9G10EK
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
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#else
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
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#endif
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_USB_STORAGE 1
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#define CONFIG_CMD_FAT 1
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225
include/configs/at91sam9m10g45ek.h
Normal file
225
include/configs/at91sam9m10g45ek.h
Normal file
@@ -0,0 +1,225 @@
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/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian.pop@leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* ARM asynchronous clock */
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#define AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
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#ifdef CONFIG_AT91SAM9M10G45EK
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#define CONFIG_AT91SAM9M10G45 1 /* It's an Atmel AT91SAM9M10G45 SoC*/
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#else
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#define CONFIG_AT91SAM9G45 1 /* It's an Atmel AT91SAM9G45 SoC*/
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#endif
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#define CONFIG_ARCH_CPU_INIT
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SKIP_RELOCATE_UBOOT
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/*
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* Hardware drivers
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*/
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#define CONFIG_ATMEL_USART 1
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#undef CONFIG_USART0
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#undef CONFIG_USART1
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#undef CONFIG_USART2
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#define CONFIG_USART3 1 /* USART 3 is DBGU */
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/* LCD */
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#define CONFIG_LCD 1
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#define LCD_BPP LCD_COLOR8
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#define CONFIG_LCD_LOGO 1
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#undef LCD_TEST_PATTERN
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#define CONFIG_LCD_INFO 1
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#define CONFIG_LCD_INFO_BELOW_LOGO 1
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#define CONFIG_SYS_WHITE_ON_BLACK 1
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#define CONFIG_ATMEL_LCD 1
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#define CONFIG_ATMEL_LCD_RGB565 1
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
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/* board specific(not enough SRAM) */
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#define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000
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/* LED */
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#define CONFIG_AT91_LED
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#define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
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#define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
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#define CONFIG_BOOTDELAY 3
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE 1
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#define CONFIG_BOOTP_BOOTPATH 1
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#define CONFIG_BOOTP_GATEWAY 1
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#define CONFIG_BOOTP_HOSTNAME 1
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_IMLS
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#undef CONFIG_CMD_AUTOSCRIPT
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#undef CONFIG_CMD_LOADS
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#define CONFIG_CMD_PING 1
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#define CONFIG_CMD_DHCP 1
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#define CONFIG_CMD_NAND 1
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#define CONFIG_CMD_USB 1
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM 0x70000000
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#define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */
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/* DataFlash */
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#ifdef CONFIG_ATMEL_SPI
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#define CONFIG_CMD_SF
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#define CONFIG_CMD_SPI
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#define CONFIG_SPI_FLASH 1
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#define CONFIG_SPI_FLASH_ATMEL 1
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
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#endif
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/* NOR flash, if populated */
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#ifndef CONFIG_CMD_NAND
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#define CONFIG_SYS_NO_FLASH 1
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#else
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#define CONFIG_SYS_FLASH_CFI 1
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#define CONFIG_FLASH_CFI_DRIVER 1
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#define PHYS_FLASH_1 0x10000000
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#endif
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_MAX_CHIPS 1
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_DBW_8 1
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/* our ALE is AD21 */
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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/* our CLE is AD22 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
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#endif
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/* Ethernet */
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#define CONFIG_MACB 1
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#define CONFIG_RMII 1
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#define CONFIG_NET_MULTI 1
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_RESET_PHY_R 1
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/* USB */
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_OHCI_NEW 1
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#define CONFIG_DOS_PARTITION 1
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#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
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#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91SAM9G45_UHP_OHCI_BASE */
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g45"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_USB_STORAGE 1
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
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#define CONFIG_SYS_MEMTEST_END 0x23e00000
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#ifdef CONFIG_SYS_USE_DATAFLASH
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/* bootstrap + u-boot + env + linux in dataflash on CS0 */
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#define CONFIG_ENV_IS_IN_SPI_FLASH 1
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#define CONFIG_SYS_MONITOR_BASE (0xC0000000 + 0x8400)
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#define CONFIG_ENV_OFFSET 0x4200
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#define CONFIG_ENV_ADDR (0xC0000000 + CONFIG_ENV_OFFSET)
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#define CONFIG_ENV_SIZE 0x4200
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#define CONFIG_ENV_SECT_SIZE 0x10000
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#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
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#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
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"root=/dev/mtdblock0 " \
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"mtdparts=at91_nand:-(root) "\
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"rw rootfstype=jffs2"
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#else /* CONFIG_SYS_USE_NANDFLASH */
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/* bootstrap + u-boot + env + linux in nandflash */
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#define CONFIG_ENV_IS_IN_NAND 1
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#define CONFIG_ENV_OFFSET 0x60000
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#define CONFIG_ENV_OFFSET_REDUND 0x80000
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#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
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#define CONFIG_BOOTCOMMAND "nand read 0x72000000 0x200000 0x200000; bootm"
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#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
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"root=/dev/mtdblock5 " \
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"mtdparts=at91_nand:128k(bootstrap)ro, \
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256k(uboot)ro,128k(env1)ro,128k(env2)ro, \
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2M(linux),-(root) " \
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"rw rootfstype=jffs2"
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#endif
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
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#define CONFIG_SYS_PROMPT "U-Boot> "
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_LONGHELP 1
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#define CONFIG_CMDLINE_EDITING 1
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
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#define CONFIG_STACKSIZE (32*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#error CONFIG_USE_IRQ not supported
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#endif
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#endif
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@@ -39,6 +39,10 @@
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#define CONFIG_VERSATILE 1 /* in Versatile Platform Board */
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#define CONFIG_ARCH_VERSATILE 1 /* Specifically, a Versatile */
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#ifndef CONFIG_ARCH_VERSATILE_AB /* AB */
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#define CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */
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#endif
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#define CONFIG_SYS_MEMTEST_START 0x100000
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#define CONFIG_SYS_MEMTEST_END 0x10000000
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#define CONFIG_SYS_HZ (1000000 / 256)
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@@ -101,7 +105,6 @@
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/*
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* Command line configuration.
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*/
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#define CONFIG_CMD_BDI
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_FLASH
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@@ -132,8 +135,13 @@
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "Versatile # " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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/* Monitor Command Prompt */
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#ifdef CONFIG_ARCH_VERSATILE_AB
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# define CONFIG_SYS_PROMPT "VersatileAB # "
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#else
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# define CONFIG_SYS_PROMPT "VersatilePB # "
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#endif
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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@@ -159,13 +167,20 @@
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
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#define CONFIG_SYS_FLASH_BASE 0x34000000
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#define PHYS_FLASH_SIZE 0x04000000 /* 64MB */
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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/*
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* Use the CFI flash driver for ease of use
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*/
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_ENV_IS_IN_FLASH 1
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/*
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* System control register
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*/
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#define VERSATILE_SYS_BASE 0x10000000
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#define VERSATILE_SYS_FLASH_OFFSET 0x4C
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#define VERSATILE_FLASHCTRL \
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@@ -173,19 +188,47 @@
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/* Enable writing to flash */
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#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0)
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define PHYS_FLASH_SIZE 0x34000000 /* 64MB */
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (20 * CONFIG_SYS_HZ) /* Erase Timeout */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (20 * CONFIG_SYS_HZ) /* Write Timeout */
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#define CONFIG_SYS_MAX_FLASH_SECT (256)
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#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
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#define PHYS_FLASH_1 (CONFIG_SYS_FLASH_BASE)
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/*
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* Note that CONFIG_SYS_MAX_FLASH_SECT allows for a parameter block
|
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* i.e.
|
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* the bottom "sector" (bottom boot), or top "sector"
|
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* (top boot), is a seperate erase region divided into
|
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* 4 (equal) smaller sectors. This, notionally, allows
|
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* quicker erase/rewrire of the most frequently changed
|
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* area......
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* CONFIG_SYS_MAX_FLASH_SECT is padded up to a multiple of 4
|
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*/
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#define CONFIG_ENV_IS_IN_FLASH 1 /* env in flash */
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#define CONFIG_ENV_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
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#define CONFIG_ENV_SIZE 0x10000 /* Size of Environment */
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#define CONFIG_ENV_OFFSET 0x01f00000 /* environment starts */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
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#ifdef CONFIG_ARCH_VERSATILE_AB
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#define FLASH_SECTOR_SIZE 0x00020000 /* 128 KB sectors */
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#define CONFIG_ENV_SECT_SIZE (2 * FLASH_SECTOR_SIZE)
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#define CONFIG_SYS_MAX_FLASH_SECT (520)
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#endif
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#endif /* __CONFIG_H */
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#ifdef CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */
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#define FLASH_SECTOR_SIZE 0x00040000 /* 256 KB sectors */
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#define CONFIG_ENV_SECT_SIZE FLASH_SECTOR_SIZE
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#define CONFIG_SYS_MAX_FLASH_SECT (260)
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#endif
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#define CONFIG_SYS_FLASH_BASE 0x34000000
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MONITOR_LEN (4 * CONFIG_ENV_SECT_SIZE)
|
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|
||||
/* The ARM Boot Monitor is shipped in the lowest sector of flash */
|
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|
||||
#define FLASH_TOP (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE)
|
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#define CONFIG_ENV_SIZE 8192
|
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#define CONFIG_ENV_ADDR (FLASH_TOP - CONFIG_ENV_SECT_SIZE)
|
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#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
|
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#define CONFIG_SYS_MONITOR_BASE (CONFIG_ENV_ADDR - CONFIG_SYS_MONITOR_LEN)
|
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|
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#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
|
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#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
||||
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