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arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD

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Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
2024-09-29 19:49:46 -06:00
committed by Tom Rini
parent ac644df9a4
commit bef9fdbed2
242 changed files with 439 additions and 439 deletions
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6
arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
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@@ -12,13 +12,13 @@
#include <asm/armv8/sec_firmware.h>
struct icid_id_table {
#ifndef CONFIG_SPL_BUILD
#ifndef CONFIG_XPL_BUILD
const char *compat;
phys_addr_t compat_addr;
#endif
phys_addr_t reg_addr;
u32 reg;
#ifndef CONFIG_SPL_BUILD
#ifndef CONFIG_XPL_BUILD
u32 id;
#endif
bool le;
@@ -35,7 +35,7 @@ int fdt_set_iommu_prop(void *blob, int off, int smmu_ph, u32 *ids, int num_ids);
void set_icids(void);
void fdt_fixup_icid(void *blob);
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
#define SET_ICID_ENTRY(name, idA, regA, addr, compataddr, _le) \
{ .reg = regA, \
.reg_addr = addr, \

2
arch/arm/include/asm/arch-imx8/boot0.h
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@@ -3,7 +3,7 @@
* Copyright 2019 NXP
*/
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_XPL_BUILD)
/*
* We use absolute address not PC relative address to jump.
* When running SPL on iMX8, the A core starts at address 0, a alias to OCRAM 0x100000,

2
arch/arm/include/asm/arch-lpc32xx/sys_proto.h
View File

@@ -16,7 +16,7 @@ void lpc32xx_slc_nand_init(void);
void lpc32xx_i2c_init(unsigned int devnum);
void lpc32xx_ssp_init(void);
void lpc32xx_usb_init(void);
#if defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_XPL_BUILD)
void ddr_init(const struct emc_dram_settings *dram);
#endif
#endif /* _LPC32XX_SYS_PROTO_H */

2
arch/arm/include/asm/arch-mx6/litesom.h
View File

@@ -8,7 +8,7 @@
int litesom_mmc_init(struct bd_info *bis);
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
void litesom_init_f(void);
#endif

4
arch/arm/include/asm/arch-mx6/mx6-ddr.h
View File

@@ -5,7 +5,7 @@
#ifndef __ASM_ARCH_MX6_DDR_H__
#define __ASM_ARCH_MX6_DDR_H__
#ifndef CONFIG_SPL_BUILD
#ifndef CONFIG_XPL_BUILD
#ifdef CONFIG_MX6Q
#include "mx6q-ddr.h"
#else
@@ -488,7 +488,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *,
const struct mx6_mmdc_calibration *,
const void *);
#endif /* CONFIG_SPL_BUILD */
#endif /* CONFIG_XPL_BUILD */
#define MX6_MMDC_P0_MDCTL 0x021b0000
#define MX6_MMDC_P0_MDPDC 0x021b0004

2
arch/arm/include/asm/arch-mxs/sys_proto.h
View File

@@ -14,7 +14,7 @@
int mxsmmc_initialize(struct bd_info *bis, int id, int (*wp)(int),
int (*cd)(int));
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
#if defined(CONFIG_MX23)
#include <asm/arch/iomux-mx23.h>

4
arch/arm/include/asm/arch-rk3066/boot0.h
View File

@@ -10,7 +10,7 @@
* (containing the magic 'RK30'). This magic constant will be written into
* the final image by the rkimage tool, but we need to reserve space for it here.
*/
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
b 1f /* if overwritten, entry-address is at the next word */
1:
#endif
@@ -68,7 +68,7 @@ back_to_bootrom:
pop {r1-r12, pc}
#endif
#if (defined(CONFIG_SPL_BUILD))
#if (defined(CONFIG_XPL_BUILD))
/* U-Boot proper of armv7 does not need this */
b reset
#endif

6
arch/arm/include/asm/arch-rockchip/boot0.h
View File

@@ -12,7 +12,7 @@
* To make life easier for everyone, we build the SPL binary with
* space for this 4-byte header already included in the binary.
*/
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
/*
* We need to add 4 bytes of space for the 'RK33' at the
* beginning of the executable. However, as we want to keep
@@ -39,7 +39,7 @@ entry_counter:
.word 0
#endif
#if (defined(CONFIG_SPL_BUILD) || defined(CONFIG_ARM64))
#if (defined(CONFIG_XPL_BUILD) || defined(CONFIG_ARM64))
/* U-Boot proper of armv7 do not need this */
b reset
#endif
@@ -54,7 +54,7 @@ _start:
ARM_VECTORS
#endif
#if !defined(CONFIG_TPL_BUILD) && defined(CONFIG_SPL_BUILD) && \
#if !defined(CONFIG_TPL_BUILD) && defined(CONFIG_XPL_BUILD) && \
(CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */
#endif

10
arch/arm/include/asm/arch-rockchip/cru_rv1126.h
View File

@@ -11,7 +11,7 @@
#define KHz 1000
#define OSC_HZ (24 * MHz)
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
#if defined(CONFIG_XPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
#define APLL_HZ (1008 * MHz)
#else
#define APLL_HZ (816 * MHz)
@@ -20,7 +20,7 @@
#define CPLL_HZ (500 * MHz)
#define HPLL_HZ (1400 * MHz)
#define PCLK_PDPMU_HZ (100 * MHz)
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
#if defined(CONFIG_XPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
#define ACLK_PDBUS_HZ (396 * MHz)
#else
#define ACLK_PDBUS_HZ (500 * MHz)
@@ -32,7 +32,7 @@
#define HCLK_PDCORE_HZ (200 * MHz)
#define HCLK_PDAUDIO_HZ (150 * MHz)
#define CLK_OSC0_DIV_HZ (32768)
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
#if defined(CONFIG_XPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
#define ACLK_PDVI_HZ (297 * MHz)
#define CLK_ISP_HZ (297 * MHz)
#define ACLK_PDISPP_HZ (297 * MHz)
@@ -324,7 +324,7 @@ enum {
DCLK_VOP_DIV_SHIFT = 0,
DCLK_VOP_DIV_MASK = 0xff,
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
#if defined(CONFIG_XPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
/* CRU_CLK_SEL49_CON */
ACLK_PDVI_SEL_SHIFT = 6,
ACLK_PDVI_SEL_MASK = 0x3 << ACLK_PDVI_SEL_SHIFT,
@@ -397,7 +397,7 @@ enum {
CLK_GMAC_SRC_DIV_SHIFT = 0,
CLK_GMAC_SRC_DIV_MASK = 0x1f << CLK_GMAC_SRC_DIV_SHIFT,
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
#if defined(CONFIG_XPL_BUILD) && defined(CONFIG_SPL_KERNEL_BOOT)
/* CRU_CLK_SEL68_CON */
ACLK_PDISPP_SEL_SHIFT = 6,
ACLK_PDISPP_SEL_MASK = 0x3 << ACLK_PDISPP_SEL_SHIFT,

4
arch/arm/include/asm/arch-sunxi/boot0.h
View File

@@ -5,7 +5,7 @@
#include <asm/arch/cpu.h>
#if defined(CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER) && !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER) && !defined(CONFIG_XPL_BUILD)
/* reserve space for BOOT0 header information */
b reset
.space 1532
@@ -49,7 +49,7 @@
.word CONFIG_SUNXI_RVBAR_ADDRESS // writable RVBAR mapping addr
.word SUNXI_SRAMC_BASE
.word CONFIG_SUNXI_RVBAR_ALTERNATIVE // address for die variant
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
.word CONFIG_SPL_TEXT_BASE
#else
.word CONFIG_TEXT_BASE

2
arch/arm/include/asm/arch-sunxi/sys_proto.h
View File

@@ -23,7 +23,7 @@ void sdelay(unsigned long);
void return_to_fel(uint32_t lr, uint32_t sp);
/* Board / SoC level designware gmac init */
#if !defined CONFIG_SPL_BUILD && defined CONFIG_SUN7I_GMAC
#if !defined CONFIG_XPL_BUILD && defined CONFIG_SUN7I_GMAC
void eth_init_board(void);
#else
static inline void eth_init_board(void) {}

4
arch/arm/include/asm/fsl_secure_boot.h
View File

@@ -8,8 +8,8 @@
#define __FSL_SECURE_BOOT_H
#ifdef CONFIG_CHAIN_OF_TRUST
#ifndef CONFIG_SPL_BUILD
#ifndef CONFIG_XPL_BUILD
#endif /* #ifndef CONFIG_SPL_BUILD */
#endif /* #ifndef CONFIG_XPL_BUILD */
#endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
#endif

2
arch/arm/include/asm/ti-common/sys_proto.h
View File

@@ -57,7 +57,7 @@ static inline u8 uboot_loaded_by_spl(void)
*/
static inline u32 omap_hw_init_context(void)
{
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_XPL_BUILD
return OMAP_INIT_CONTEXT_SPL;
#else
if (uboot_loaded_by_spl())