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arm64: versal-net: Add PL bit stream load support

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Add support for loading the secure & non-secure pdi images and
PL bitstream on the Versal NET platform. The FPGA driver is enabled
to load the bitstream in PDI format on the AMD Versal NET device.
PDI is the new programmable device image format for Versal NET,
and the bitstream for the Versal NET platform is generated exclusively
in this format.

The source code for the versalnet loadpdi command and the
CONFIG_CMD_VERSAL_NET configuration has been removed. It now utilizes
the fpga load <dev> <address> <length> command to load secure &
non-secure pdi images.

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20250327105200.1262615-2-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Prasad Kummari
2025-03-27 16:21:58 +05:30
committed by Michal Simek
parent b5a88e9d95
commit c2db55499a
7 changed files with 15 additions and 99 deletions
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include/xilinx.h
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@@ -34,6 +34,7 @@ typedef enum { /* typedef xilinx_family */
xilinx_zynq, /* Zynq Family */
xilinx_zynqmp, /* ZynqMP Family */
xilinx_versal, /* Versal Family */
xilinx_versal_net, /* Versal NET Family */
max_xilinx_type /* insert all new types before this */
} xilinx_family; /* end, typedef xilinx_family */