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Convert CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS et al to Kconfig

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This converts the following to Kconfig:
   CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
   CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS

And we remove the entries from the README for a number of already
converted items.

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2022-07-31 21:08:22 -04:00
parent d084a6cbc9
commit d0748898d8
23 changed files with 22 additions and 63 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
include/configs/kontron_sl28.h
View File

@@ -23,7 +23,6 @@
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
/* early stack pointer */

1
include/configs/ls1028a_common.h
View File

@@ -17,7 +17,6 @@
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
/*
* SMP Definitinos

1
include/configs/ls1088a_common.h
View File

@@ -34,7 +34,6 @@
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL
#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
/*
* SMP Definitinos
*/

3
include/configs/ls2080a_common.h
View File

@@ -21,15 +21,12 @@
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL
#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2
/*
* SMP Definitinos
*/
#define CPU_RELEASE_ADDR secondary_boot_addr
#define CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
/*
* This is not an accurate number. It is used in start.S. The frequency
* will be udpated later when get_bus_freq(0) is available.

1
include/configs/lx2160a_common.h
View File

@@ -17,7 +17,6 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2
#define CONFIG_SYS_SDRAM_SIZE 0x200000000UL
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef

5
include/fsl_ddr.h
View File

@@ -14,11 +14,6 @@
struct cmd_tbl;
#ifndef CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
/* All controllers are for main memory */
#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS CONFIG_SYS_NUM_DDR_CTLRS
#endif
#ifdef CONFIG_SYS_FSL_DDR_LE
#define ddr_in32(a) in_le32(a)
#define ddr_out32(a, v) out_le32(a, v)