Convert CONFIG_TEGRA_ENABLE_UARTA et al to Kconfig

This converts the following to Kconfig:
   CONFIG_TEGRA_ENABLE_UARTA
   CONFIG_TEGRA_ENABLE_UARTB
   CONFIG_TEGRA_ENABLE_UARTC
   CONFIG_TEGRA_ENABLE_UARTD
   CONFIG_TEGRA_SPI
   CONFIG_TEGRA_UARTA_GPU
   CONFIG_TEGRA_UARTA_SDIO1
   CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
   CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2022-12-02 16:42:45 -05:00
parent 32b7e39db4
commit d14f3f2725
38 changed files with 49 additions and 36 deletions

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@@ -13,7 +13,6 @@
#include "tegra124-common.h"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define FDT_MODULE "apalis-v1.2"

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@@ -20,7 +20,6 @@
* Apalis UART3: NVIDIA UARTB
* Apalis UART4: NVIDIA UARTC
*/
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define UBOOT_UPDATE \

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@@ -10,14 +10,10 @@
#include "tegra30-common.h"
/* VDD core PMIC */
#define CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1
/* High-level configuration options */
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Beaver"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"

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@@ -10,9 +10,6 @@
#include "tegra30-common.h"
/* VDD core PMIC */
#define CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
/* High-level configuration options */
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Cardhu"
@@ -21,7 +18,6 @@
"fdtfile=tegra30-cardhu-a04.dtb\0"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"

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@@ -19,7 +19,6 @@
#define CONFIG_TEGRA_BOARD_STRING "CEI tk1-som"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"

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@@ -11,8 +11,6 @@
#include "tegra20-common.h"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_TEGRA_UARTA_SDIO1
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* NAND support */

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@@ -21,7 +21,6 @@
* Colibri UART-B: NVIDIA UARTD
* Colibri UART-C: NVIDIA UARTB
*/
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define UBOOT_UPDATE \

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@@ -14,7 +14,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Dalmore"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */

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@@ -14,7 +14,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Harmony"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
/* UARTD: keyboard satellite board UART, default */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE

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@@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"

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@@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* NAND support */

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@@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"

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@@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-0000"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
/* Environment in eMMC, at the end of 2nd "boot sector" */

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@@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-2180"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
/* Environment in eMMC, at the end of 2nd "boot sector" */

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@@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2571"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
/* Environment in eMMC, at the end of 2nd "boot sector" */

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@@ -14,7 +14,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
/* Only MMC/PXE/DHCP for now, add USB back in later when supported */
#define BOOT_TARGET_DEVICES(func) \

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@@ -16,7 +16,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Compal Paz00"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */

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@@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Plutux"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* NAND support */

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@@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */

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@@ -13,7 +13,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten™ NG Evaluation Carrier"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"

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@@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* NAND support */

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@@ -73,8 +73,4 @@
BOOTENV \
BOARD_EXTRA_ENV_SETTINGS
#if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) || defined(CONFIG_TEGRA114_SPI)
#define CONFIG_TEGRA_SPI
#endif
#endif /* __TEGRA_COMMON_POST_H */

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@@ -14,8 +14,6 @@
#define CONFIG_TEGRA_BOARD_STRING "Compulab Trimslice"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_TEGRA_UARTA_GPU
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* SPI */

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@@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Venice2"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */

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@@ -14,7 +14,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Ventana"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTD
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */