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ARM: DRA7: Enable clocks for USB OTGSS and USB PHY
Enabled clocks for dwc3 controller and USB PHY present in DRA7. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
This commit is contained in:
committed by
Marek Vasut
parent
5877de9165
commit
d3cfcb3e2c
@@ -143,7 +143,7 @@ struct prcm_regs {
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u32 cm_div_m2_dpll_unipro;
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u32 cm_ssc_deltamstep_dpll_unipro;
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u32 cm_ssc_modfreqdiv_dpll_unipro;
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u32 cm_coreaon_usb_phy_core_clkctrl;
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u32 cm_coreaon_usb_phy1_core_clkctrl;
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u32 cm_coreaon_usb_phy2_core_clkctrl;
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/* cm2.core */
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@@ -230,7 +230,7 @@ struct prcm_regs {
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u32 cm_l3init_fsusb_clkctrl;
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u32 cm_l3init_ocp2scp1_clkctrl;
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u32 cm_l3init_ocp2scp3_clkctrl;
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u32 cm_l3init_usb_otg_ss_clkctrl;
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u32 cm_l3init_usb_otg_ss1_clkctrl;
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u32 prm_irqstatus_mpu_2;
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